2 * OMAP DMAengine support
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 #include <linux/dmaengine.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/omap-dma.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
26 struct dma_device ddev;
28 struct tasklet_struct task;
29 struct list_head pending;
33 struct virt_dma_chan vc;
34 struct list_head node;
36 struct dma_slave_config cfg;
41 struct omap_desc *desc;
47 uint32_t en; /* number of elements (24-bit) */
48 uint32_t fn; /* number of frames (16-bit) */
52 struct virt_dma_desc vd;
53 enum dma_transfer_direction dir;
56 int16_t fi; /* for OMAP_DMA_SYNC_PACKET */
57 uint8_t es; /* OMAP_DMA_DATA_TYPE_xxx */
58 uint8_t sync_mode; /* OMAP_DMA_SYNC_xxx */
59 uint8_t sync_type; /* OMAP_DMA_xxx_SYNC* */
60 uint8_t periph_port; /* Peripheral port */
66 static const unsigned es_bytes[] = {
67 [OMAP_DMA_DATA_TYPE_S8] = 1,
68 [OMAP_DMA_DATA_TYPE_S16] = 2,
69 [OMAP_DMA_DATA_TYPE_S32] = 4,
72 static inline struct omap_dmadev *to_omap_dma_dev(struct dma_device *d)
74 return container_of(d, struct omap_dmadev, ddev);
77 static inline struct omap_chan *to_omap_dma_chan(struct dma_chan *c)
79 return container_of(c, struct omap_chan, vc.chan);
82 static inline struct omap_desc *to_omap_dma_desc(struct dma_async_tx_descriptor *t)
84 return container_of(t, struct omap_desc, vd.tx);
87 static void omap_dma_desc_free(struct virt_dma_desc *vd)
89 kfree(container_of(vd, struct omap_desc, vd));
92 static void omap_dma_start_sg(struct omap_chan *c, struct omap_desc *d,
95 struct omap_sg *sg = d->sg + idx;
97 if (d->dir == DMA_DEV_TO_MEM)
98 omap_set_dma_dest_params(c->dma_ch, OMAP_DMA_PORT_EMIFF,
99 OMAP_DMA_AMODE_POST_INC, sg->addr, 0, 0);
101 omap_set_dma_src_params(c->dma_ch, OMAP_DMA_PORT_EMIFF,
102 OMAP_DMA_AMODE_POST_INC, sg->addr, 0, 0);
104 omap_set_dma_transfer_params(c->dma_ch, d->es, sg->en, sg->fn,
105 d->sync_mode, c->dma_sig, d->sync_type);
107 omap_start_dma(c->dma_ch);
110 static void omap_dma_start_desc(struct omap_chan *c)
112 struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
122 c->desc = d = to_omap_dma_desc(&vd->tx);
125 if (d->dir == DMA_DEV_TO_MEM)
126 omap_set_dma_src_params(c->dma_ch, d->periph_port,
127 OMAP_DMA_AMODE_CONSTANT, d->dev_addr, 0, d->fi);
129 omap_set_dma_dest_params(c->dma_ch, d->periph_port,
130 OMAP_DMA_AMODE_CONSTANT, d->dev_addr, 0, d->fi);
132 omap_dma_start_sg(c, d, 0);
135 static void omap_dma_callback(int ch, u16 status, void *data)
137 struct omap_chan *c = data;
141 spin_lock_irqsave(&c->vc.lock, flags);
145 if (++c->sgidx < d->sglen) {
146 omap_dma_start_sg(c, d, c->sgidx);
148 omap_dma_start_desc(c);
149 vchan_cookie_complete(&d->vd);
152 vchan_cyclic_callback(&d->vd);
155 spin_unlock_irqrestore(&c->vc.lock, flags);
159 * This callback schedules all pending channels. We could be more
160 * clever here by postponing allocation of the real DMA channels to
161 * this point, and freeing them when our virtual channel becomes idle.
163 * We would then need to deal with 'all channels in-use'
165 static void omap_dma_sched(unsigned long data)
167 struct omap_dmadev *d = (struct omap_dmadev *)data;
170 spin_lock_irq(&d->lock);
171 list_splice_tail_init(&d->pending, &head);
172 spin_unlock_irq(&d->lock);
174 while (!list_empty(&head)) {
175 struct omap_chan *c = list_first_entry(&head,
176 struct omap_chan, node);
178 spin_lock_irq(&c->vc.lock);
179 list_del_init(&c->node);
180 omap_dma_start_desc(c);
181 spin_unlock_irq(&c->vc.lock);
185 static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
187 struct omap_chan *c = to_omap_dma_chan(chan);
189 dev_info(c->vc.chan.device->dev, "allocating channel for %u\n", c->dma_sig);
191 return omap_request_dma(c->dma_sig, "DMA engine",
192 omap_dma_callback, c, &c->dma_ch);
195 static void omap_dma_free_chan_resources(struct dma_chan *chan)
197 struct omap_chan *c = to_omap_dma_chan(chan);
199 vchan_free_chan_resources(&c->vc);
200 omap_free_dma(c->dma_ch);
202 dev_info(c->vc.chan.device->dev, "freeing channel for %u\n", c->dma_sig);
205 static size_t omap_dma_sg_size(struct omap_sg *sg)
207 return sg->en * sg->fn;
210 static size_t omap_dma_desc_size(struct omap_desc *d)
215 for (size = i = 0; i < d->sglen; i++)
216 size += omap_dma_sg_size(&d->sg[i]);
218 return size * es_bytes[d->es];
221 static size_t omap_dma_desc_size_pos(struct omap_desc *d, dma_addr_t addr)
224 size_t size, es_size = es_bytes[d->es];
226 for (size = i = 0; i < d->sglen; i++) {
227 size_t this_size = omap_dma_sg_size(&d->sg[i]) * es_size;
231 else if (addr >= d->sg[i].addr &&
232 addr < d->sg[i].addr + this_size)
233 size += d->sg[i].addr + this_size - addr;
238 static enum dma_status omap_dma_tx_status(struct dma_chan *chan,
239 dma_cookie_t cookie, struct dma_tx_state *txstate)
241 struct omap_chan *c = to_omap_dma_chan(chan);
242 struct virt_dma_desc *vd;
246 ret = dma_cookie_status(chan, cookie, txstate);
247 if (ret == DMA_SUCCESS || !txstate)
250 spin_lock_irqsave(&c->vc.lock, flags);
251 vd = vchan_find_desc(&c->vc, cookie);
253 txstate->residue = omap_dma_desc_size(to_omap_dma_desc(&vd->tx));
254 } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
255 struct omap_desc *d = c->desc;
258 if (d->dir == DMA_MEM_TO_DEV)
259 pos = omap_get_dma_src_pos(c->dma_ch);
260 else if (d->dir == DMA_DEV_TO_MEM)
261 pos = omap_get_dma_dst_pos(c->dma_ch);
265 txstate->residue = omap_dma_desc_size_pos(d, pos);
267 txstate->residue = 0;
269 spin_unlock_irqrestore(&c->vc.lock, flags);
274 static void omap_dma_issue_pending(struct dma_chan *chan)
276 struct omap_chan *c = to_omap_dma_chan(chan);
279 spin_lock_irqsave(&c->vc.lock, flags);
280 if (vchan_issue_pending(&c->vc) && !c->desc) {
281 struct omap_dmadev *d = to_omap_dma_dev(chan->device);
283 if (list_empty(&c->node))
284 list_add_tail(&c->node, &d->pending);
285 spin_unlock(&d->lock);
286 tasklet_schedule(&d->task);
288 spin_unlock_irqrestore(&c->vc.lock, flags);
291 static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
292 struct dma_chan *chan, struct scatterlist *sgl, unsigned sglen,
293 enum dma_transfer_direction dir, unsigned long tx_flags, void *context)
295 struct omap_chan *c = to_omap_dma_chan(chan);
296 enum dma_slave_buswidth dev_width;
297 struct scatterlist *sgent;
300 unsigned i, j = 0, es, en, frame_bytes, sync_type;
303 if (dir == DMA_DEV_TO_MEM) {
304 dev_addr = c->cfg.src_addr;
305 dev_width = c->cfg.src_addr_width;
306 burst = c->cfg.src_maxburst;
307 sync_type = OMAP_DMA_SRC_SYNC;
308 } else if (dir == DMA_MEM_TO_DEV) {
309 dev_addr = c->cfg.dst_addr;
310 dev_width = c->cfg.dst_addr_width;
311 burst = c->cfg.dst_maxburst;
312 sync_type = OMAP_DMA_DST_SYNC;
314 dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
318 /* Bus width translates to the element size (ES) */
320 case DMA_SLAVE_BUSWIDTH_1_BYTE:
321 es = OMAP_DMA_DATA_TYPE_S8;
323 case DMA_SLAVE_BUSWIDTH_2_BYTES:
324 es = OMAP_DMA_DATA_TYPE_S16;
326 case DMA_SLAVE_BUSWIDTH_4_BYTES:
327 es = OMAP_DMA_DATA_TYPE_S32;
329 default: /* not reached */
333 /* Now allocate and setup the descriptor. */
334 d = kzalloc(sizeof(*d) + sglen * sizeof(d->sg[0]), GFP_ATOMIC);
339 d->dev_addr = dev_addr;
341 d->sync_mode = OMAP_DMA_SYNC_FRAME;
342 d->sync_type = sync_type;
343 d->periph_port = OMAP_DMA_PORT_TIPB;
346 * Build our scatterlist entries: each contains the address,
347 * the number of elements (EN) in each frame, and the number of
348 * frames (FN). Number of bytes for this entry = ES * EN * FN.
350 * Burst size translates to number of elements with frame sync.
351 * Note: DMA engine defines burst to be the number of dev-width
355 frame_bytes = es_bytes[es] * en;
356 for_each_sg(sgl, sgent, sglen, i) {
357 d->sg[j].addr = sg_dma_address(sgent);
359 d->sg[j].fn = sg_dma_len(sgent) / frame_bytes;
365 return vchan_tx_prep(&c->vc, &d->vd, tx_flags);
368 static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
369 struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
370 size_t period_len, enum dma_transfer_direction dir, void *context)
372 struct omap_chan *c = to_omap_dma_chan(chan);
373 enum dma_slave_buswidth dev_width;
376 unsigned es, sync_type;
379 if (dir == DMA_DEV_TO_MEM) {
380 dev_addr = c->cfg.src_addr;
381 dev_width = c->cfg.src_addr_width;
382 burst = c->cfg.src_maxburst;
383 sync_type = OMAP_DMA_SRC_SYNC;
384 } else if (dir == DMA_MEM_TO_DEV) {
385 dev_addr = c->cfg.dst_addr;
386 dev_width = c->cfg.dst_addr_width;
387 burst = c->cfg.dst_maxburst;
388 sync_type = OMAP_DMA_DST_SYNC;
390 dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
394 /* Bus width translates to the element size (ES) */
396 case DMA_SLAVE_BUSWIDTH_1_BYTE:
397 es = OMAP_DMA_DATA_TYPE_S8;
399 case DMA_SLAVE_BUSWIDTH_2_BYTES:
400 es = OMAP_DMA_DATA_TYPE_S16;
402 case DMA_SLAVE_BUSWIDTH_4_BYTES:
403 es = OMAP_DMA_DATA_TYPE_S32;
405 default: /* not reached */
409 /* Now allocate and setup the descriptor. */
410 d = kzalloc(sizeof(*d) + sizeof(d->sg[0]), GFP_ATOMIC);
415 d->dev_addr = dev_addr;
418 d->sync_mode = OMAP_DMA_SYNC_PACKET;
419 d->sync_type = sync_type;
420 d->periph_port = OMAP_DMA_PORT_MPUI;
421 d->sg[0].addr = buf_addr;
422 d->sg[0].en = period_len / es_bytes[es];
423 d->sg[0].fn = buf_len / period_len;
428 omap_dma_link_lch(c->dma_ch, c->dma_ch);
429 omap_enable_dma_irq(c->dma_ch, OMAP_DMA_FRAME_IRQ);
430 omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
433 if (!cpu_class_is_omap1()) {
434 omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
435 omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
438 return vchan_tx_prep(&c->vc, &d->vd, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
441 static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *cfg)
443 if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
444 cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
447 memcpy(&c->cfg, cfg, sizeof(c->cfg));
452 static int omap_dma_terminate_all(struct omap_chan *c)
454 struct omap_dmadev *d = to_omap_dma_dev(c->vc.chan.device);
458 spin_lock_irqsave(&c->vc.lock, flags);
460 /* Prevent this channel being scheduled */
462 list_del_init(&c->node);
463 spin_unlock(&d->lock);
466 * Stop DMA activity: we assume the callback will not be called
467 * after omap_stop_dma() returns (even if it does, it will see
468 * c->desc is NULL and exit.)
472 omap_stop_dma(c->dma_ch);
477 omap_dma_unlink_lch(c->dma_ch, c->dma_ch);
480 vchan_get_all_descriptors(&c->vc, &head);
481 spin_unlock_irqrestore(&c->vc.lock, flags);
482 vchan_dma_desc_free_list(&c->vc, &head);
487 static int omap_dma_pause(struct omap_chan *c)
489 /* FIXME: not supported by platform private API */
493 static int omap_dma_resume(struct omap_chan *c)
495 /* FIXME: not supported by platform private API */
499 static int omap_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
502 struct omap_chan *c = to_omap_dma_chan(chan);
506 case DMA_SLAVE_CONFIG:
507 ret = omap_dma_slave_config(c, (struct dma_slave_config *)arg);
510 case DMA_TERMINATE_ALL:
511 ret = omap_dma_terminate_all(c);
515 ret = omap_dma_pause(c);
519 ret = omap_dma_resume(c);
530 static int omap_dma_chan_init(struct omap_dmadev *od, int dma_sig)
534 c = kzalloc(sizeof(*c), GFP_KERNEL);
538 c->dma_sig = dma_sig;
539 c->vc.desc_free = omap_dma_desc_free;
540 vchan_init(&c->vc, &od->ddev);
541 INIT_LIST_HEAD(&c->node);
548 static void omap_dma_free(struct omap_dmadev *od)
550 tasklet_kill(&od->task);
551 while (!list_empty(&od->ddev.channels)) {
552 struct omap_chan *c = list_first_entry(&od->ddev.channels,
553 struct omap_chan, vc.chan.device_node);
555 list_del(&c->vc.chan.device_node);
556 tasklet_kill(&c->vc.task);
562 static int omap_dma_probe(struct platform_device *pdev)
564 struct omap_dmadev *od;
567 od = kzalloc(sizeof(*od), GFP_KERNEL);
571 dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
572 dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
573 od->ddev.device_alloc_chan_resources = omap_dma_alloc_chan_resources;
574 od->ddev.device_free_chan_resources = omap_dma_free_chan_resources;
575 od->ddev.device_tx_status = omap_dma_tx_status;
576 od->ddev.device_issue_pending = omap_dma_issue_pending;
577 od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg;
578 od->ddev.device_prep_dma_cyclic = omap_dma_prep_dma_cyclic;
579 od->ddev.device_control = omap_dma_control;
580 od->ddev.dev = &pdev->dev;
581 INIT_LIST_HEAD(&od->ddev.channels);
582 INIT_LIST_HEAD(&od->pending);
583 spin_lock_init(&od->lock);
585 tasklet_init(&od->task, omap_dma_sched, (unsigned long)od);
587 for (i = 0; i < 127; i++) {
588 rc = omap_dma_chan_init(od, i);
595 rc = dma_async_device_register(&od->ddev);
597 pr_warn("OMAP-DMA: failed to register slave DMA engine device: %d\n",
601 platform_set_drvdata(pdev, od);
604 dev_info(&pdev->dev, "OMAP DMA engine driver\n");
609 static int omap_dma_remove(struct platform_device *pdev)
611 struct omap_dmadev *od = platform_get_drvdata(pdev);
613 dma_async_device_unregister(&od->ddev);
619 static struct platform_driver omap_dma_driver = {
620 .probe = omap_dma_probe,
621 .remove = omap_dma_remove,
623 .name = "omap-dma-engine",
624 .owner = THIS_MODULE,
628 bool omap_dma_filter_fn(struct dma_chan *chan, void *param)
630 if (chan->device->dev->driver == &omap_dma_driver.driver) {
631 struct omap_chan *c = to_omap_dma_chan(chan);
632 unsigned req = *(unsigned *)param;
634 return req == c->dma_sig;
638 EXPORT_SYMBOL_GPL(omap_dma_filter_fn);
640 static struct platform_device *pdev;
642 static const struct platform_device_info omap_dma_dev_info = {
643 .name = "omap-dma-engine",
645 .dma_mask = DMA_BIT_MASK(32),
648 static int omap_dma_init(void)
650 int rc = platform_driver_register(&omap_dma_driver);
653 pdev = platform_device_register_full(&omap_dma_dev_info);
655 platform_driver_unregister(&omap_dma_driver);
661 subsys_initcall(omap_dma_init);
663 static void __exit omap_dma_exit(void)
665 platform_device_unregister(pdev);
666 platform_driver_unregister(&omap_dma_driver);
668 module_exit(omap_dma_exit);
670 MODULE_AUTHOR("Russell King");
671 MODULE_LICENSE("GPL");