drivers/dma/dmatest.c

   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  * Copyright (C) 2013 Intel Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/delay.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/dmaengine.h>
  16 #include <linux/freezer.h>
  17 #include <linux/init.h>
  18 #include <linux/kthread.h>
  19 #include <linux/module.h>
  20 #include <linux/moduleparam.h>
  21 #include <linux/random.h>
  22 #include <linux/slab.h>
  23 #include <linux/wait.h>
  24
  25 static unsigned int test_buf_size = 16384;
  26 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  27 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  28
  29 static char test_channel[20];
  30 module_param_string(channel, test_channel, sizeof(test_channel),
  31                 S_IRUGO | S_IWUSR);
  32 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  33
  34 static char test_device[20];
  35 module_param_string(device, test_device, sizeof(test_device),
  36                 S_IRUGO | S_IWUSR);
  37 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  38
  39 static unsigned int threads_per_chan = 1;
  40 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  41 MODULE_PARM_DESC(threads_per_chan,
  42                 "Number of threads to start per channel (default: 1)");
  43
  44 static unsigned int max_channels;
  45 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  46 MODULE_PARM_DESC(max_channels,
  47                 "Maximum number of channels to use (default: all)");
  48
  49 static unsigned int iterations;
  50 module_param(iterations, uint, S_IRUGO | S_IWUSR);
  51 MODULE_PARM_DESC(iterations,
  52                 "Iterations before stopping test (default: infinite)");
  53
  54 static unsigned int xor_sources = 3;
  55 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  56 MODULE_PARM_DESC(xor_sources,
  57                 "Number of xor source buffers (default: 3)");
  58
  59 static unsigned int pq_sources = 3;
  60 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  61 MODULE_PARM_DESC(pq_sources,
  62                 "Number of p+q source buffers (default: 3)");
  63
  64 static int timeout = 3000;
  65 module_param(timeout, uint, S_IRUGO | S_IWUSR);
  66 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  67                  "Pass -1 for infinite timeout");
  68
  69 static bool noverify;
  70 module_param(noverify, bool, S_IRUGO | S_IWUSR);
  71 MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
  72
  73 static bool verbose;
  74 module_param(verbose, bool, S_IRUGO | S_IWUSR);
  75 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  76
  77 /**
  78  * struct dmatest_params - test parameters.
  79  * @buf_size:           size of the memcpy test buffer
  80  * @channel:            bus ID of the channel to test
  81  * @device:             bus ID of the DMA Engine to test
  82  * @threads_per_chan:   number of threads to start per channel
  83  * @max_channels:       maximum number of channels to use
  84  * @iterations:         iterations before stopping test
  85  * @xor_sources:        number of xor source buffers
  86  * @pq_sources:         number of p+q source buffers
  87  * @timeout:            transfer timeout in msec, -1 for infinite timeout
  88  */
  89 struct dmatest_params {
  90         unsigned int    buf_size;
  91         char            channel[20];
  92         char            device[20];
  93         unsigned int    threads_per_chan;
  94         unsigned int    max_channels;
  95         unsigned int    iterations;
  96         unsigned int    xor_sources;
  97         unsigned int    pq_sources;
  98         int             timeout;
  99         bool            noverify;
 100 };
 101
 102 /**
 103  * struct dmatest_info - test information.
 104  * @params:             test parameters
 105  * @lock:               access protection to the fields of this structure
 106  */
 107 static struct dmatest_info {
 108         /* Test parameters */
 109         struct dmatest_params   params;
 110
 111         /* Internal state */
 112         struct list_head        channels;
 113         unsigned int            nr_channels;
 114         struct mutex            lock;
 115         bool                    did_init;
 116 } test_info = {
 117         .channels = LIST_HEAD_INIT(test_info.channels),
 118         .lock = __MUTEX_INITIALIZER(test_info.lock),
 119 };
 120
 121 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
 122 static int dmatest_run_get(char *val, const struct kernel_param *kp);
 123 static struct kernel_param_ops run_ops = {
 124         .set = dmatest_run_set,
 125         .get = dmatest_run_get,
 126 };
 127 static bool dmatest_run;
 128 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
 129 MODULE_PARM_DESC(run, "Run the test (default: false)");
 130
 131 /* Maximum amount of mismatched bytes in buffer to print */
 132 #define MAX_ERROR_COUNT         32
 133
 134 /*
 135  * Initialization patterns. All bytes in the source buffer has bit 7
 136  * set, all bytes in the destination buffer has bit 7 cleared.
 137  *
 138  * Bit 6 is set for all bytes which are to be copied by the DMA
 139  * engine. Bit 5 is set for all bytes which are to be overwritten by
 140  * the DMA engine.
 141  *
 142  * The remaining bits are the inverse of a counter which increments by
 143  * one for each byte address.
 144  */
 145 #define PATTERN_SRC             0x80
 146 #define PATTERN_DST             0x00
 147 #define PATTERN_COPY            0x40
 148 #define PATTERN_OVERWRITE       0x20
 149 #define PATTERN_COUNT_MASK      0x1f
 150
 151 struct dmatest_thread {
 152         struct list_head        node;
 153         struct dmatest_info     *info;
 154         struct task_struct      *task;
 155         struct dma_chan         *chan;
 156         u8                      **srcs;
 157         u8                      **dsts;
 158         enum dma_transaction_type type;
 159         bool                    done;
 160 };
 161
 162 struct dmatest_chan {
 163         struct list_head        node;
 164         struct dma_chan         *chan;
 165         struct list_head        threads;
 166 };
 167
 168 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
 169 static bool wait;
 170
 171 static bool is_threaded_test_run(struct dmatest_info *info)
 172 {
 173         struct dmatest_chan *dtc;
 174
 175         list_for_each_entry(dtc, &info->channels, node) {
 176                 struct dmatest_thread *thread;
 177
 178                 list_for_each_entry(thread, &dtc->threads, node) {
 179                         if (!thread->done)
 180                                 return true;
 181                 }
 182         }
 183
 184         return false;
 185 }
 186
 187 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
 188 {
 189         struct dmatest_info *info = &test_info;
 190         struct dmatest_params *params = &info->params;
 191
 192         if (params->iterations)
 193                 wait_event(thread_wait, !is_threaded_test_run(info));
 194         wait = true;
 195         return param_get_bool(val, kp);
 196 }
 197
 198 static struct kernel_param_ops wait_ops = {
 199         .get = dmatest_wait_get,
 200         .set = param_set_bool,
 201 };
 202 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
 203 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
 204
 205 static bool dmatest_match_channel(struct dmatest_params *params,
 206                 struct dma_chan *chan)
 207 {
 208         if (params->channel[0] == '\0')
 209                 return true;
 210         return strcmp(dma_chan_name(chan), params->channel) == 0;
 211 }
 212
 213 static bool dmatest_match_device(struct dmatest_params *params,
 214                 struct dma_device *device)
 215 {
 216         if (params->device[0] == '\0')
 217                 return true;
 218         return strcmp(dev_name(device->dev), params->device) == 0;
 219 }
 220
 221 static unsigned long dmatest_random(void)
 222 {
 223         unsigned long buf;
 224
 225         prandom_bytes(&buf, sizeof(buf));
 226         return buf;
 227 }
 228
 229 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
 230                 unsigned int buf_size)
 231 {
 232         unsigned int i;
 233         u8 *buf;
 234
 235         for (; (buf = *bufs); bufs++) {
 236                 for (i = 0; i < start; i++)
 237                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 238                 for ( ; i < start + len; i++)
 239                         buf[i] = PATTERN_SRC | PATTERN_COPY
 240                                 | (~i & PATTERN_COUNT_MASK);
 241                 for ( ; i < buf_size; i++)
 242                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 243                 buf++;
 244         }
 245 }
 246
 247 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
 248                 unsigned int buf_size)
 249 {
 250         unsigned int i;
 251         u8 *buf;
 252
 253         for (; (buf = *bufs); bufs++) {
 254                 for (i = 0; i < start; i++)
 255                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 256                 for ( ; i < start + len; i++)
 257                         buf[i] = PATTERN_DST | PATTERN_OVERWRITE
 258                                 | (~i & PATTERN_COUNT_MASK);
 259                 for ( ; i < buf_size; i++)
 260                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 261         }
 262 }
 263
 264 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 265                 unsigned int counter, bool is_srcbuf)
 266 {
 267         u8              diff = actual ^ pattern;
 268         u8              expected = pattern | (~counter & PATTERN_COUNT_MASK);
 269         const char      *thread_name = current->comm;
 270
 271         if (is_srcbuf)
 272                 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
 273                         thread_name, index, expected, actual);
 274         else if ((pattern & PATTERN_COPY)
 275                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 276                 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
 277                         thread_name, index, expected, actual);
 278         else if (diff & PATTERN_SRC)
 279                 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
 280                         thread_name, index, expected, actual);
 281         else
 282                 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
 283                         thread_name, index, expected, actual);
 284 }
 285
 286 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 287                 unsigned int end, unsigned int counter, u8 pattern,
 288                 bool is_srcbuf)
 289 {
 290         unsigned int i;
 291         unsigned int error_count = 0;
 292         u8 actual;
 293         u8 expected;
 294         u8 *buf;
 295         unsigned int counter_orig = counter;
 296
 297         for (; (buf = *bufs); bufs++) {
 298                 counter = counter_orig;
 299                 for (i = start; i < end; i++) {
 300                         actual = buf[i];
 301                         expected = pattern | (~counter & PATTERN_COUNT_MASK);
 302                         if (actual != expected) {
 303                                 if (error_count < MAX_ERROR_COUNT)
 304                                         dmatest_mismatch(actual, pattern, i,
 305                                                          counter, is_srcbuf);
 306                                 error_count++;
 307                         }
 308                         counter++;
 309                 }
 310         }
 311
 312         if (error_count > MAX_ERROR_COUNT)
 313                 pr_warn("%s: %u errors suppressed\n",
 314                         current->comm, error_count - MAX_ERROR_COUNT);
 315
 316         return error_count;
 317 }
 318
 319 /* poor man's completion - we want to use wait_event_freezable() on it */
 320 struct dmatest_done {
 321         bool                    done;
 322         wait_queue_head_t       *wait;
 323 };
 324
 325 static void dmatest_callback(void *arg)
 326 {
 327         struct dmatest_done *done = arg;
 328
 329         done->done = true;
 330         wake_up_all(done->wait);
 331 }
 332
 333 static unsigned int min_odd(unsigned int x, unsigned int y)
 334 {
 335         unsigned int val = min(x, y);
 336
 337         return val % 2 ? val : val - 1;
 338 }
 339
 340 static void result(const char *err, unsigned int n, unsigned int src_off,
 341                    unsigned int dst_off, unsigned int len, unsigned long data)
 342 {
 343         pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
 344                 current->comm, n, err, src_off, dst_off, len, data);
 345 }
 346
 347 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
 348                        unsigned int dst_off, unsigned int len,
 349                        unsigned long data)
 350 {
 351         pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)",
 352                    current->comm, n, err, src_off, dst_off, len, data);
 353 }
 354
 355 #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
 356         if (verbose) \
 357                 result(err, n, src_off, dst_off, len, data); \
 358         else \
 359                 dbg_result(err, n, src_off, dst_off, len, data); \
 360 })
 361
 362 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
 363 {
 364         unsigned long long per_sec = 1000000;
 365
 366         if (runtime <= 0)
 367                 return 0;
 368
 369         /* drop precision until runtime is 32-bits */
 370         while (runtime > UINT_MAX) {
 371                 runtime >>= 1;
 372                 per_sec <<= 1;
 373         }
 374
 375         per_sec *= val;
 376         do_div(per_sec, runtime);
 377         return per_sec;
 378 }
 379
 380 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
 381 {
 382         return dmatest_persec(runtime, len >> 10);
 383 }
 384
 385 /*
 386  * This function repeatedly tests DMA transfers of various lengths and
 387  * offsets for a given operation type until it is told to exit by
 388  * kthread_stop(). There may be multiple threads running this function
 389  * in parallel for a single channel, and there may be multiple channels
 390  * being tested in parallel.
 391  *
 392  * Before each test, the source and destination buffer is initialized
 393  * with a known pattern. This pattern is different depending on
 394  * whether it's in an area which is supposed to be copied or
 395  * overwritten, and different in the source and destination buffers.
 396  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 397  * we'll notice.
 398  */
 399 static int dmatest_func(void *data)
 400 {
 401         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
 402         struct dmatest_thread   *thread = data;
 403         struct dmatest_done     done = { .wait = &done_wait };
 404         struct dmatest_info     *info;
 405         struct dmatest_params   *params;
 406         struct dma_chan         *chan;
 407         struct dma_device       *dev;
 408         unsigned int            src_off, dst_off, len;
 409         unsigned int            error_count;
 410         unsigned int            failed_tests = 0;
 411         unsigned int            total_tests = 0;
 412         dma_cookie_t            cookie;
 413         enum dma_status         status;
 414         enum dma_ctrl_flags     flags;
 415         u8                      *pq_coefs = NULL;
 416         int                     ret;
 417         int                     src_cnt;
 418         int                     dst_cnt;
 419         int                     i;
 420         ktime_t                 ktime;
 421         s64                     runtime = 0;
 422         unsigned long long      total_len = 0;
 423
 424         set_freezable();
 425
 426         ret = -ENOMEM;
 427
 428         smp_rmb();
 429         info = thread->info;
 430         params = &info->params;
 431         chan = thread->chan;
 432         dev = chan->device;
 433         if (thread->type == DMA_MEMCPY)
 434                 src_cnt = dst_cnt = 1;
 435         else if (thread->type == DMA_XOR) {
 436                 /* force odd to ensure dst = src */
 437                 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
 438                 dst_cnt = 1;
 439         } else if (thread->type == DMA_PQ) {
 440                 /* force odd to ensure dst = src */
 441                 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
 442                 dst_cnt = 2;
 443
 444                 pq_coefs = kmalloc(params->pq_sources+1, GFP_KERNEL);
 445                 if (!pq_coefs)
 446                         goto err_thread_type;
 447
 448                 for (i = 0; i < src_cnt; i++)
 449                         pq_coefs[i] = 1;
 450         } else
 451                 goto err_thread_type;
 452
 453         thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
 454         if (!thread->srcs)
 455                 goto err_srcs;
 456         for (i = 0; i < src_cnt; i++) {
 457                 thread->srcs[i] = kmalloc(params->buf_size, GFP_KERNEL);
 458                 if (!thread->srcs[i])
 459                         goto err_srcbuf;
 460         }
 461         thread->srcs[i] = NULL;
 462
 463         thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
 464         if (!thread->dsts)
 465                 goto err_dsts;
 466         for (i = 0; i < dst_cnt; i++) {
 467                 thread->dsts[i] = kmalloc(params->buf_size, GFP_KERNEL);
 468                 if (!thread->dsts[i])
 469                         goto err_dstbuf;
 470         }
 471         thread->dsts[i] = NULL;
 472
 473         set_user_nice(current, 10);
 474
 475         /*
 476          * src and dst buffers are freed by ourselves below
 477          */
 478         flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
 479
 480         ktime = ktime_get();
 481         while (!kthread_should_stop()
 482                && !(params->iterations && total_tests >= params->iterations)) {
 483                 struct dma_async_tx_descriptor *tx = NULL;
 484                 struct dmaengine_unmap_data *um;
 485                 dma_addr_t srcs[src_cnt];
 486                 dma_addr_t *dsts;
 487                 u8 align = 0;
 488
 489                 total_tests++;
 490
 491                 /* honor alignment restrictions */
 492                 if (thread->type == DMA_MEMCPY)
 493                         align = dev->copy_align;
 494                 else if (thread->type == DMA_XOR)
 495                         align = dev->xor_align;
 496                 else if (thread->type == DMA_PQ)
 497                         align = dev->pq_align;
 498
 499                 if (1 << align > params->buf_size) {
 500                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 501                                params->buf_size, 1 << align);
 502                         break;
 503                 }
 504
 505                 if (params->noverify) {
 506                         len = params->buf_size;
 507                         src_off = 0;
 508                         dst_off = 0;
 509                 } else {
 510                         len = dmatest_random() % params->buf_size + 1;
 511                         len = (len >> align) << align;
 512                         if (!len)
 513                                 len = 1 << align;
 514                         src_off = dmatest_random() % (params->buf_size - len + 1);
 515                         dst_off = dmatest_random() % (params->buf_size - len + 1);
 516
 517                         src_off = (src_off >> align) << align;
 518                         dst_off = (dst_off >> align) << align;
 519
 520                         dmatest_init_srcs(thread->srcs, src_off, len,
 521                                           params->buf_size);
 522                         dmatest_init_dsts(thread->dsts, dst_off, len,
 523                                           params->buf_size);
 524                 }
 525
 526                 len = (len >> align) << align;
 527                 if (!len)
 528                         len = 1 << align;
 529                 total_len += len;
 530
 531                 um = dmaengine_get_unmap_data(dev->dev, src_cnt+dst_cnt,
 532                                               GFP_KERNEL);
 533                 if (!um) {
 534                         failed_tests++;
 535                         result("unmap data NULL", total_tests,
 536                                src_off, dst_off, len, ret);
 537                         continue;
 538                 }
 539
 540                 um->len = params->buf_size;
 541                 for (i = 0; i < src_cnt; i++) {
 542                         void *buf = thread->srcs[i];
 543                         struct page *pg = virt_to_page(buf);
 544                         unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
 545
 546                         um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
 547                                                    um->len, DMA_TO_DEVICE);
 548                         srcs[i] = um->addr[i] + src_off;
 549                         ret = dma_mapping_error(dev->dev, um->addr[i]);
 550                         if (ret) {
 551                                 dmaengine_unmap_put(um);
 552                                 result("src mapping error", total_tests,
 553                                        src_off, dst_off, len, ret);
 554                                 failed_tests++;
 555                                 continue;
 556                         }
 557                         um->to_cnt++;
 558                 }
 559                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 560                 dsts = &um->addr[src_cnt];
 561                 for (i = 0; i < dst_cnt; i++) {
 562                         void *buf = thread->dsts[i];
 563                         struct page *pg = virt_to_page(buf);
 564                         unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
 565
 566                         dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
 567                                                DMA_BIDIRECTIONAL);
 568                         ret = dma_mapping_error(dev->dev, dsts[i]);
 569                         if (ret) {
 570                                 dmaengine_unmap_put(um);
 571                                 result("dst mapping error", total_tests,
 572                                        src_off, dst_off, len, ret);
 573                                 failed_tests++;
 574                                 continue;
 575                         }
 576                         um->bidi_cnt++;
 577                 }
 578
 579                 if (thread->type == DMA_MEMCPY)
 580                         tx = dev->device_prep_dma_memcpy(chan,
 581                                                          dsts[0] + dst_off,
 582                                                          srcs[0], len, flags);
 583                 else if (thread->type == DMA_XOR)
 584                         tx = dev->device_prep_dma_xor(chan,
 585                                                       dsts[0] + dst_off,
 586                                                       srcs, src_cnt,
 587                                                       len, flags);
 588                 else if (thread->type == DMA_PQ) {
 589                         dma_addr_t dma_pq[dst_cnt];
 590
 591                         for (i = 0; i < dst_cnt; i++)
 592                                 dma_pq[i] = dsts[i] + dst_off;
 593                         tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
 594                                                      src_cnt, pq_coefs,
 595                                                      len, flags);
 596                 }
 597
 598                 if (!tx) {
 599                         dmaengine_unmap_put(um);
 600                         result("prep error", total_tests, src_off,
 601                                dst_off, len, ret);
 602                         msleep(100);
 603                         failed_tests++;
 604                         continue;
 605                 }
 606
 607                 done.done = false;
 608                 tx->callback = dmatest_callback;
 609                 tx->callback_param = &done;
 610                 cookie = tx->tx_submit(tx);
 611
 612                 if (dma_submit_error(cookie)) {
 613                         dmaengine_unmap_put(um);
 614                         result("submit error", total_tests, src_off,
 615                                dst_off, len, ret);
 616                         msleep(100);
 617                         failed_tests++;
 618                         continue;
 619                 }
 620                 dma_async_issue_pending(chan);
 621
 622                 wait_event_freezable_timeout(done_wait, done.done,
 623                                              msecs_to_jiffies(params->timeout));
 624
 625                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 626
 627                 if (!done.done) {
 628                         /*
 629                          * We're leaving the timed out dma operation with
 630                          * dangling pointer to done_wait.  To make this
 631                          * correct, we'll need to allocate wait_done for
 632                          * each test iteration and perform "who's gonna
 633                          * free it this time?" dancing.  For now, just
 634                          * leave it dangling.
 635                          */
 636                         dmaengine_unmap_put(um);
 637                         result("test timed out", total_tests, src_off, dst_off,
 638                                len, 0);
 639                         failed_tests++;
 640                         continue;
 641                 } else if (status != DMA_COMPLETE) {
 642                         dmaengine_unmap_put(um);
 643                         result(status == DMA_ERROR ?
 644                                "completion error status" :
 645                                "completion busy status", total_tests, src_off,
 646                                dst_off, len, ret);
 647                         failed_tests++;
 648                         continue;
 649                 }
 650
 651                 dmaengine_unmap_put(um);
 652
 653                 if (params->noverify) {
 654                         verbose_result("test passed", total_tests, src_off,
 655                                        dst_off, len, 0);
 656                         continue;
 657                 }
 658
 659                 pr_debug("%s: verifying source buffer...\n", current->comm);
 660                 error_count = dmatest_verify(thread->srcs, 0, src_off,
 661                                 0, PATTERN_SRC, true);
 662                 error_count += dmatest_verify(thread->srcs, src_off,
 663                                 src_off + len, src_off,
 664                                 PATTERN_SRC | PATTERN_COPY, true);
 665                 error_count += dmatest_verify(thread->srcs, src_off + len,
 666                                 params->buf_size, src_off + len,
 667                                 PATTERN_SRC, true);
 668
 669                 pr_debug("%s: verifying dest buffer...\n", current->comm);
 670                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 671                                 0, PATTERN_DST, false);
 672                 error_count += dmatest_verify(thread->dsts, dst_off,
 673                                 dst_off + len, src_off,
 674                                 PATTERN_SRC | PATTERN_COPY, false);
 675                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 676                                 params->buf_size, dst_off + len,
 677                                 PATTERN_DST, false);
 678
 679                 if (error_count) {
 680                         result("data error", total_tests, src_off, dst_off,
 681                                len, error_count);
 682                         failed_tests++;
 683                 } else {
 684                         verbose_result("test passed", total_tests, src_off,
 685                                        dst_off, len, 0);
 686                 }
 687         }
 688         runtime = ktime_us_delta(ktime_get(), ktime);
 689
 690         ret = 0;
 691         for (i = 0; thread->dsts[i]; i++)
 692                 kfree(thread->dsts[i]);
 693 err_dstbuf:
 694         kfree(thread->dsts);
 695 err_dsts:
 696         for (i = 0; thread->srcs[i]; i++)
 697                 kfree(thread->srcs[i]);
 698 err_srcbuf:
 699         kfree(thread->srcs);
 700 err_srcs:
 701         kfree(pq_coefs);
 702 err_thread_type:
 703         pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
 704                 current->comm, total_tests, failed_tests,
 705                 dmatest_persec(runtime, total_tests),
 706                 dmatest_KBs(runtime, total_len), ret);
 707
 708         /* terminate all transfers on specified channels */
 709         if (ret)
 710                 dmaengine_terminate_all(chan);
 711
 712         thread->done = true;
 713         wake_up(&thread_wait);
 714
 715         return ret;
 716 }
 717
 718 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 719 {
 720         struct dmatest_thread   *thread;
 721         struct dmatest_thread   *_thread;
 722         int                     ret;
 723
 724         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 725                 ret = kthread_stop(thread->task);
 726                 pr_debug("thread %s exited with status %d\n",
 727                          thread->task->comm, ret);
 728                 list_del(&thread->node);
 729                 put_task_struct(thread->task);
 730                 kfree(thread);
 731         }
 732
 733         /* terminate all transfers on specified channels */
 734         dmaengine_terminate_all(dtc->chan);
 735
 736         kfree(dtc);
 737 }
 738
 739 static int dmatest_add_threads(struct dmatest_info *info,
 740                 struct dmatest_chan *dtc, enum dma_transaction_type type)
 741 {
 742         struct dmatest_params *params = &info->params;
 743         struct dmatest_thread *thread;
 744         struct dma_chan *chan = dtc->chan;
 745         char *op;
 746         unsigned int i;
 747
 748         if (type == DMA_MEMCPY)
 749                 op = "copy";
 750         else if (type == DMA_XOR)
 751                 op = "xor";
 752         else if (type == DMA_PQ)
 753                 op = "pq";
 754         else
 755                 return -EINVAL;
 756
 757         for (i = 0; i < params->threads_per_chan; i++) {
 758                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 759                 if (!thread) {
 760                         pr_warn("No memory for %s-%s%u\n",
 761                                 dma_chan_name(chan), op, i);
 762                         break;
 763                 }
 764                 thread->info = info;
 765                 thread->chan = dtc->chan;
 766                 thread->type = type;
 767                 smp_wmb();
 768                 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
 769                                 dma_chan_name(chan), op, i);
 770                 if (IS_ERR(thread->task)) {
 771                         pr_warn("Failed to create thread %s-%s%u\n",
 772                                 dma_chan_name(chan), op, i);
 773                         kfree(thread);
 774                         break;
 775                 }
 776
 777                 /* srcbuf and dstbuf are allocated by the thread itself */
 778                 get_task_struct(thread->task);
 779                 list_add_tail(&thread->node, &dtc->threads);
 780                 wake_up_process(thread->task);
 781         }
 782
 783         return i;
 784 }
 785
 786 static int dmatest_add_channel(struct dmatest_info *info,
 787                 struct dma_chan *chan)
 788 {
 789         struct dmatest_chan     *dtc;
 790         struct dma_device       *dma_dev = chan->device;
 791         unsigned int            thread_count = 0;
 792         int cnt;
 793
 794         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 795         if (!dtc) {
 796                 pr_warn("No memory for %s\n", dma_chan_name(chan));
 797                 return -ENOMEM;
 798         }
 799
 800         dtc->chan = chan;
 801         INIT_LIST_HEAD(&dtc->threads);
 802
 803         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 804                 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
 805                 thread_count += cnt > 0 ? cnt : 0;
 806         }
 807         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 808                 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
 809                 thread_count += cnt > 0 ? cnt : 0;
 810         }
 811         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 812                 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
 813                 thread_count += cnt > 0 ? cnt : 0;
 814         }
 815
 816         pr_info("Started %u threads using %s\n",
 817                 thread_count, dma_chan_name(chan));
 818
 819         list_add_tail(&dtc->node, &info->channels);
 820         info->nr_channels++;
 821
 822         return 0;
 823 }
 824
 825 static bool filter(struct dma_chan *chan, void *param)
 826 {
 827         struct dmatest_params *params = param;
 828
 829         if (!dmatest_match_channel(params, chan) ||
 830             !dmatest_match_device(params, chan->device))
 831                 return false;
 832         else
 833                 return true;
 834 }
 835
 836 static void request_channels(struct dmatest_info *info,
 837                              enum dma_transaction_type type)
 838 {
 839         dma_cap_mask_t mask;
 840
 841         dma_cap_zero(mask);
 842         dma_cap_set(type, mask);
 843         for (;;) {
 844                 struct dmatest_params *params = &info->params;
 845                 struct dma_chan *chan;
 846
 847                 chan = dma_request_channel(mask, filter, params);
 848                 if (chan) {
 849                         if (dmatest_add_channel(info, chan)) {
 850                                 dma_release_channel(chan);
 851                                 break; /* add_channel failed, punt */
 852                         }
 853                 } else
 854                         break; /* no more channels available */
 855                 if (params->max_channels &&
 856                     info->nr_channels >= params->max_channels)
 857                         break; /* we have all we need */
 858         }
 859 }
 860
 861 static void run_threaded_test(struct dmatest_info *info)
 862 {
 863         struct dmatest_params *params = &info->params;
 864
 865         /* Copy test parameters */
 866         params->buf_size = test_buf_size;
 867         strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
 868         strlcpy(params->device, strim(test_device), sizeof(params->device));
 869         params->threads_per_chan = threads_per_chan;
 870         params->max_channels = max_channels;
 871         params->iterations = iterations;
 872         params->xor_sources = xor_sources;
 873         params->pq_sources = pq_sources;
 874         params->timeout = timeout;
 875         params->noverify = noverify;
 876
 877         request_channels(info, DMA_MEMCPY);
 878         request_channels(info, DMA_XOR);
 879         request_channels(info, DMA_PQ);
 880 }
 881
 882 static void stop_threaded_test(struct dmatest_info *info)
 883 {
 884         struct dmatest_chan *dtc, *_dtc;
 885         struct dma_chan *chan;
 886
 887         list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
 888                 list_del(&dtc->node);
 889                 chan = dtc->chan;
 890                 dmatest_cleanup_channel(dtc);
 891                 pr_debug("dropped channel %s\n", dma_chan_name(chan));
 892                 dma_release_channel(chan);
 893         }
 894
 895         info->nr_channels = 0;
 896 }
 897
 898 static void restart_threaded_test(struct dmatest_info *info, bool run)
 899 {
 900         /* we might be called early to set run=, defer running until all
 901          * parameters have been evaluated
 902          */
 903         if (!info->did_init)
 904                 return;
 905
 906         /* Stop any running test first */
 907         stop_threaded_test(info);
 908
 909         /* Run test with new parameters */
 910         run_threaded_test(info);
 911 }
 912
 913 static int dmatest_run_get(char *val, const struct kernel_param *kp)
 914 {
 915         struct dmatest_info *info = &test_info;
 916
 917         mutex_lock(&info->lock);
 918         if (is_threaded_test_run(info)) {
 919                 dmatest_run = true;
 920         } else {
 921                 stop_threaded_test(info);
 922                 dmatest_run = false;
 923         }
 924         mutex_unlock(&info->lock);
 925
 926         return param_get_bool(val, kp);
 927 }
 928
 929 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
 930 {
 931         struct dmatest_info *info = &test_info;
 932         int ret;
 933
 934         mutex_lock(&info->lock);
 935         ret = param_set_bool(val, kp);
 936         if (ret) {
 937                 mutex_unlock(&info->lock);
 938                 return ret;
 939         }
 940
 941         if (is_threaded_test_run(info))
 942                 ret = -EBUSY;
 943         else if (dmatest_run)
 944                 restart_threaded_test(info, dmatest_run);
 945
 946         mutex_unlock(&info->lock);
 947
 948         return ret;
 949 }
 950
 951 static int __init dmatest_init(void)
 952 {
 953         struct dmatest_info *info = &test_info;
 954         struct dmatest_params *params = &info->params;
 955
 956         if (dmatest_run) {
 957                 mutex_lock(&info->lock);
 958                 run_threaded_test(info);
 959                 mutex_unlock(&info->lock);
 960         }
 961
 962         if (params->iterations && wait)
 963                 wait_event(thread_wait, !is_threaded_test_run(info));
 964
 965         /* module parameters are stable, inittime tests are started,
 966          * let userspace take over 'run' control
 967          */
 968         info->did_init = true;
 969
 970         return 0;
 971 }
 972 /* when compiled-in wait for drivers to load first */
 973 late_initcall(dmatest_init);
 974
 975 static void __exit dmatest_exit(void)
 976 {
 977         struct dmatest_info *info = &test_info;
 978
 979         mutex_lock(&info->lock);
 980         stop_threaded_test(info);
 981         mutex_unlock(&info->lock);
 982 }
 983 module_exit(dmatest_exit);
 984
 985 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
 986 MODULE_LICENSE("GPL v2");