1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Apple ADMAC support"
90 depends on ARCH_APPLE || COMPILE_TEST
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
97 tristate "Atmel AHB DMA support"
101 Support the Atmel AHB DMA controller.
104 tristate "Atmel XDMA support"
108 Support the Atmel XDMA controller.
111 tristate "Analog Devices AXI-DMAC DMA support"
112 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
114 select DMA_VIRTUAL_CHANNELS
117 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
118 controller is often used in Analog Devices' reference designs for FPGA
122 tristate "Broadcom SBA RAID engine support"
123 depends on ARM64 || COMPILE_TEST
124 depends on MAILBOX && RAID6_PQ
126 select DMA_ENGINE_RAID
127 select ASYNC_TX_DISABLE_XOR_VAL_DMA
128 select ASYNC_TX_DISABLE_PQ_VAL_DMA
129 default m if ARCH_BCM_IPROC
131 Enable support for Broadcom SBA RAID Engine. The SBA RAID
132 engine is available on most of the Broadcom iProc SoCs. It
133 has the capability to offload memcpy, xor and pq computation
137 tristate "BCM2835 DMA engine support"
138 depends on ARCH_BCM2835
140 select DMA_VIRTUAL_CHANNELS
143 tristate "JZ4780 DMA support"
144 depends on MIPS || COMPILE_TEST
146 select DMA_VIRTUAL_CHANNELS
148 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
149 If you have a board based on such a SoC and wish to use DMA for
150 devices which can use the DMA controller, say Y or M here.
153 tristate "SA-11x0 DMA support"
154 depends on ARCH_SA1100 || COMPILE_TEST
156 select DMA_VIRTUAL_CHANNELS
158 Support the DMA engine found on Intel StrongARM SA-1100 and
159 SA-1110 SoCs. This DMA engine can only be used with on-chip
163 tristate "Allwinner A10 DMA SoCs support"
164 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
165 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
167 select DMA_VIRTUAL_CHANNELS
169 Enable support for the DMA controller present in the sun4i,
170 sun5i and sun7i Allwinner ARM SoCs.
173 tristate "Allwinner A31 SoCs DMA support"
174 depends on ARCH_SUNXI || COMPILE_TEST
175 depends on RESET_CONTROLLER
177 select DMA_VIRTUAL_CHANNELS
179 Support for the DMA engine first found in Allwinner A31 SoCs.
182 tristate "Synopsys DesignWare AXI DMA support"
186 select DMA_VIRTUAL_CHANNELS
188 Enable support for Synopsys DesignWare AXI DMA controller.
189 NOTE: This driver wasn't tested on 64 bit platform because
190 of lack 64 bit platform with Synopsys DW AXI DMAC.
193 bool "Cirrus Logic EP93xx DMA support"
194 depends on ARCH_EP93XX || COMPILE_TEST
197 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
200 tristate "Freescale Elo series DMA support"
203 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
205 Enable support for the Freescale Elo series DMA controllers.
206 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
207 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
208 some Txxx and Bxxx parts.
211 tristate "Freescale eDMA engine support"
214 select DMA_VIRTUAL_CHANNELS
216 Support the Freescale eDMA engine with programmable channel
217 multiplexing capability for DMA request sources(slot).
218 This module can be found on Freescale Vybrid and LS-1 SoCs.
221 tristate "NXP Layerscape qDMA engine support"
222 depends on ARM || ARM64
224 select DMA_VIRTUAL_CHANNELS
225 select DMA_ENGINE_RAID
226 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
228 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
229 Channel virtualization is supported through enqueuing of DMA jobs to,
230 or dequeuing DMA jobs from, different work queues.
231 This module can be found on NXP Layerscape SoCs.
232 The qdma driver only work on SoCs with a DPAA hardware block.
235 tristate "Freescale RAID engine Support"
236 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
238 select DMA_ENGINE_RAID
240 Enable support for Freescale RAID Engine. RAID Engine is
241 available on some QorIQ SoCs (like P5020/P5040). It has
242 the capability to offload memcpy, xor and pq computation
246 tristate "HiSilicon DMA Engine support"
247 depends on ARM64 || COMPILE_TEST
250 select DMA_VIRTUAL_CHANNELS
252 Support HiSilicon Kunpeng DMA engine.
255 tristate "IMG MDC support"
256 depends on MIPS || COMPILE_TEST
257 depends on MFD_SYSCON
259 select DMA_VIRTUAL_CHANNELS
261 Enable support for the IMG multi-threaded DMA controller (MDC).
264 tristate "i.MX DMA support"
268 Support the i.MX DMA engine. This engine is integrated into
269 Freescale i.MX1/21/27 chips.
272 tristate "i.MX SDMA support"
275 select DMA_VIRTUAL_CHANNELS
277 Support the i.MX SDMA engine. This engine is integrated into
278 Freescale i.MX25/31/35/51/53/6 chips.
281 tristate "Intel integrated DMA 64-bit support"
283 select DMA_VIRTUAL_CHANNELS
285 Enable DMA support for Intel Low Power Subsystem such as found on
288 config INTEL_IDXD_BUS
293 tristate "Intel Data Accelerators support"
294 depends on PCI && X86_64 && !UML
300 Enable support for the Intel(R) data accelerators present
303 Say Y if you have such a platform.
307 config INTEL_IDXD_COMPAT
308 bool "Legacy behavior for idxd driver"
309 depends on PCI && X86_64
310 select INTEL_IDXD_BUS
312 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
313 The old behavior performed driver bind/unbind for device and wq
314 devices all under the dsa driver. The compat driver will emulate
315 the legacy behavior in order to allow existing support apps (i.e.
316 accel-config) to continue function. It is expected that accel-config
317 v3.2 and earlier will need the compat mode. A distro with later
318 accel-config version can disable this compat config.
320 Say Y if you have old applications that require such behavior.
324 # Config symbol that collects all the dependencies that's necessary to
325 # support shared virtual memory for the devices supported by idxd.
326 config INTEL_IDXD_SVM
327 bool "Accelerator Shared Virtual Memory Support"
328 depends on INTEL_IDXD
329 depends on INTEL_IOMMU_SVM
334 config INTEL_IDXD_PERFMON
335 bool "Intel Data Accelerators performance monitor support"
336 depends on INTEL_IDXD
338 Enable performance monitor (pmu) support for the Intel(R)
339 data accelerators present in Intel Xeon CPU. With this
340 enabled, perf can be used to monitor the DSA (Intel Data
341 Streaming Accelerator) events described in the Intel DSA
347 tristate "Intel I/OAT DMA support"
348 depends on PCI && X86_64 && !UML
350 select DMA_ENGINE_RAID
353 Enable support for the Intel(R) I/OAT DMA engine present
354 in recent Intel Xeon chipsets.
356 Say Y here if you have such a chipset.
360 config INTEL_IOP_ADMA
361 tristate "Intel IOP32x ADMA support"
362 depends on ARCH_IOP32X || COMPILE_TEST
364 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
366 Enable support for the Intel(R) IOP Series RAID engines.
369 tristate "Hisilicon K3 DMA support"
370 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
372 select DMA_VIRTUAL_CHANNELS
374 Support the DMA engine for Hisilicon K3 platform
377 config LPC18XX_DMAMUX
378 bool "NXP LPC18xx/43xx DMA MUX for PL080"
379 depends on ARCH_LPC18XX || COMPILE_TEST
380 depends on OF && AMBA_PL08X
383 Enable support for DMA on NXP LPC18xx/43xx platforms
384 with PL080 and multiplexed DMA request lines.
387 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
388 depends on M5441x || COMPILE_TEST
390 select DMA_VIRTUAL_CHANNELS
392 Support the Freescale ColdFire eDMA engine, 64-channel
393 implementation that performs complex data transfers with
394 minimal intervention from a host processor.
395 This module can be found on Freescale ColdFire mcf5441x SoCs.
397 config MILBEAUT_HDMAC
398 tristate "Milbeaut AHB DMA support"
399 depends on ARCH_MILBEAUT || COMPILE_TEST
402 select DMA_VIRTUAL_CHANNELS
404 Say yes here to support the Socionext Milbeaut
407 config MILBEAUT_XDMAC
408 tristate "Milbeaut AXI DMA support"
409 depends on ARCH_MILBEAUT || COMPILE_TEST
412 select DMA_VIRTUAL_CHANNELS
414 Say yes here to support the Socionext Milbeaut
418 tristate "MMP PDMA support"
419 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
422 Support the MMP PDMA engine for PXA and MMP platform.
425 tristate "MMP Two-Channel DMA support"
426 depends on ARCH_MMP || COMPILE_TEST
428 select GENERIC_ALLOCATOR
430 Support the MMP Two-Channel DMA engine.
431 This engine used for MMP Audio DMA and pxa910 SQU.
434 tristate "MOXART DMA support"
435 depends on ARCH_MOXART
437 select DMA_VIRTUAL_CHANNELS
439 Enable support for the MOXA ART SoC DMA controller.
441 Say Y here if you enabled MMP ADMA, otherwise say N.
444 tristate "Freescale MPC512x built-in DMA engine support"
445 depends on PPC_MPC512x || PPC_MPC831x
448 Enable support for the Freescale MPC512x built-in DMA engine.
451 bool "Marvell XOR engine support"
452 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
454 select DMA_ENGINE_RAID
455 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
457 Enable support for the Marvell XOR engine.
460 bool "Marvell XOR engine version 2 support "
463 select DMA_ENGINE_RAID
464 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
465 select GENERIC_MSI_IRQ_DOMAIN
467 Enable support for the Marvell version 2 XOR engine.
469 This engine provides acceleration for copy, XOR and RAID6
470 operations, and is available on Marvell Armada 7K and 8K
474 bool "MXS DMA support"
475 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
479 Support the MXS DMA engine. This engine including APBH-DMA
480 and APBX-DMA is integrated into some Freescale chips.
483 bool "MX3x Image Processing Unit support"
488 If you plan to use the Image Processing unit in the i.MX3x, say
489 Y here. If unsure, select Y.
492 int "Number of dynamically mapped interrupts for IPU"
497 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
498 To avoid bloating the irq_desc[] array we allocate a sufficient
499 number of IRQ slots and map them dynamically to specific sources.
502 tristate "Renesas Type-AXI NBPF DMA support"
504 depends on ARM || COMPILE_TEST
506 Support for "Type-AXI" NBPF DMA IPs from Renesas
509 tristate "Actions Semi Owl SoCs DMA support"
510 depends on ARCH_ACTIONS
512 select DMA_VIRTUAL_CHANNELS
514 Enable support for the Actions Semi Owl SoCs DMA controller.
517 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
518 depends on PCI && (X86_32 || COMPILE_TEST)
521 Enable support for Intel EG20T PCH DMA engine.
523 This driver also can be used for LAPIS Semiconductor IOH(Input/
524 Output Hub), ML7213, ML7223 and ML7831.
525 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
526 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
527 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
528 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
531 tristate "DMA API Driver for PL330"
535 Select if your platform has one or more PL330 DMACs.
536 You need to provide platform specific settings via
537 platform_data for a dma-pl330 device.
540 bool "PXA DMA support"
541 depends on (ARCH_MMP || ARCH_PXA)
543 select DMA_VIRTUAL_CHANNELS
545 Support the DMA engine for PXA. It is also compatible with MMP PDMA
546 platform. The internal DMA IP of all PXA variants is supported, with
547 16 to 32 channels for peripheral to memory or memory to memory
551 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
555 Some PLX ExpressLane PCI Switches support additional DMA engines.
556 These are exposed via extra functions on the switch's
557 upstream port. Each function exposes one DMA channel.
560 bool "ST-Ericsson DMA40 support"
561 depends on ARCH_U8500
564 Support for ST-Ericsson DMA40 controller
567 tristate "ST FDMA dmaengine support"
569 depends on REMOTEPROC
570 select ST_SLIM_REMOTEPROC
572 select DMA_VIRTUAL_CHANNELS
574 Enable support for ST FDMA controller.
575 It supports 16 independent DMA channels, accepts up to 32 DMA requests
577 Say Y here if you have such a chipset.
581 bool "STMicroelectronics STM32 DMA support"
582 depends on ARCH_STM32 || COMPILE_TEST
584 select DMA_VIRTUAL_CHANNELS
586 Enable support for the on-chip DMA controller on STMicroelectronics
588 If you have a board based on such a MCU and wish to use DMA say Y
592 bool "STMicroelectronics STM32 dma multiplexer support"
593 depends on STM32_DMA || COMPILE_TEST
595 Enable support for the on-chip DMA multiplexer on STMicroelectronics
597 If you have a board based on such a MCU and wish to use DMAMUX say Y
601 bool "STMicroelectronics STM32 master dma support"
602 depends on ARCH_STM32 || COMPILE_TEST
605 select DMA_VIRTUAL_CHANNELS
607 Enable support for the on-chip MDMA controller on STMicroelectronics
609 If you have a board based on STM32 SoC and wish to use the master DMA
613 tristate "Spreadtrum DMA support"
614 depends on ARCH_SPRD || COMPILE_TEST
616 select DMA_VIRTUAL_CHANNELS
618 Enable support for the on-chip DMA controller on Spreadtrum platform.
621 bool "Samsung S3C24XX DMA support"
622 depends on ARCH_S3C24XX || COMPILE_TEST
624 select DMA_VIRTUAL_CHANNELS
626 Support for the Samsung S3C24XX DMA controller driver. The
627 DMA controller is having multiple DMA channels which can be
628 configured for different peripherals like audio, UART, SPI.
629 The DMA controller can transfer data from memory to peripheral,
630 periphal to memory, periphal to periphal and memory to memory.
633 tristate "Toshiba TXx9 SoC DMA support"
634 depends on MACH_TX49XX
637 Support the TXx9 SoC internal DMA controller. This can be
638 integrated in chips such as the Toshiba TX4927/38/39.
640 config TEGRA186_GPC_DMA
641 tristate "NVIDIA Tegra GPC DMA support"
642 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
646 Support for the NVIDIA Tegra General Purpose Central DMA controller.
647 The DMA controller has multiple DMA channels which can be configured
648 for different peripherals like UART, SPI, etc which are on APB bus.
649 This DMA controller transfers data from memory to peripheral FIFO
650 or vice versa. It also supports memory to memory data transfer.
652 config TEGRA20_APB_DMA
653 tristate "NVIDIA Tegra20 APB DMA support"
654 depends on ARCH_TEGRA || COMPILE_TEST
657 Support for the NVIDIA Tegra20 APB DMA controller driver. The
658 DMA controller is having multiple DMA channel which can be
659 configured for different peripherals like audio, UART, SPI,
660 I2C etc which is in APB bus.
661 This DMA controller transfers data from memory to peripheral fifo
662 or vice versa. It does not support memory to memory data transfer.
665 tristate "NVIDIA Tegra210 ADMA support"
666 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
668 select DMA_VIRTUAL_CHANNELS
670 Support for the NVIDIA Tegra210 ADMA controller driver. The
671 DMA controller has multiple DMA channels and is used to service
672 various audio clients in the Tegra210 audio processing engine
673 (APE). This DMA controller transfers data from memory to
674 peripheral and vice versa. It does not support memory to
675 memory data transfer.
678 tristate "Timberdale FPGA DMA support"
679 depends on MFD_TIMBERDALE || COMPILE_TEST
682 Enable support for the Timberdale FPGA DMA engine.
684 config UNIPHIER_MDMAC
685 tristate "UniPhier MIO DMAC"
686 depends on ARCH_UNIPHIER || COMPILE_TEST
689 select DMA_VIRTUAL_CHANNELS
691 Enable support for the MIO DMAC (Media I/O DMA controller) on the
692 UniPhier platform. This DMA controller is used as the external
693 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
695 config UNIPHIER_XDMAC
696 tristate "UniPhier XDMAC support"
697 depends on ARCH_UNIPHIER || COMPILE_TEST
700 select DMA_VIRTUAL_CHANNELS
702 Enable support for the XDMAC (external DMA controller) on the
703 UniPhier platform. This DMA controller can transfer data from
704 memory to memory, memory to peripheral and peripheral to memory.
707 tristate "APM X-Gene DMA support"
708 depends on ARCH_XGENE || COMPILE_TEST
710 select DMA_ENGINE_RAID
711 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
713 Enable support for the APM X-Gene SoC DMA engine.
716 tristate "Xilinx AXI DMAS Engine"
717 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
720 Enable support for Xilinx AXI VDMA Soft IP.
722 AXI VDMA engine provides high-bandwidth direct memory access
723 between memory and AXI4-Stream video type target
724 peripherals including peripherals which support AXI4-
725 Stream Video Protocol. It has two stream interfaces/
726 channels, Memory Mapped to Stream (MM2S) and Stream to
727 Memory Mapped (S2MM) for the data transfers.
728 AXI CDMA engine provides high-bandwidth direct memory access
729 between a memory-mapped source address and a memory-mapped
731 AXI DMA engine provides high-bandwidth one dimensional direct
732 memory access between memory and AXI4-Stream target peripherals.
733 AXI MCDMA engine provides high-bandwidth direct memory access
734 between memory and AXI4-Stream target peripherals. It provides
735 the scatter gather interface with multiple channels independent
736 configuration support.
738 config XILINX_ZYNQMP_DMA
739 tristate "Xilinx ZynqMP DMA Engine"
740 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
743 Enable support for Xilinx ZynqMP DMA controller.
745 config XILINX_ZYNQMP_DPDMA
746 tristate "Xilinx DPDMA Engine"
747 depends on HAS_IOMEM && OF
749 select DMA_VIRTUAL_CHANNELS
751 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
752 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
753 driver provides the dmaengine required by the DisplayPort subsystem
757 source "drivers/dma/bestcomm/Kconfig"
759 source "drivers/dma/mediatek/Kconfig"
761 source "drivers/dma/ptdma/Kconfig"
763 source "drivers/dma/qcom/Kconfig"
765 source "drivers/dma/dw/Kconfig"
767 source "drivers/dma/dw-edma/Kconfig"
769 source "drivers/dma/hsu/Kconfig"
771 source "drivers/dma/sf-pdma/Kconfig"
773 source "drivers/dma/sh/Kconfig"
775 source "drivers/dma/ti/Kconfig"
777 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
779 source "drivers/dma/lgm/Kconfig"
782 comment "DMA Clients"
783 depends on DMA_ENGINE
786 bool "Async_tx: Offload support for the async_tx api"
787 depends on DMA_ENGINE
789 This allows the async_tx api to take advantage of offload engines for
790 memcpy, memset, xor, and raid6 p+q operations. If your platform has
791 a dma engine that can perform raid operations and you have enabled
797 tristate "DMA Test client"
798 depends on DMA_ENGINE
799 select DMA_ENGINE_RAID
801 Simple DMA test client. Say N unless you're debugging a
804 config DMA_ENGINE_RAID