1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Apple ADMAC support"
90 depends on ARCH_APPLE || COMPILE_TEST
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
97 tristate "Atmel AHB DMA support"
100 select DMA_VIRTUAL_CHANNELS
102 Support the Atmel AHB DMA controller.
105 tristate "Atmel XDMA support"
109 Support the Atmel XDMA controller.
112 tristate "Analog Devices AXI-DMAC DMA support"
113 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
115 select DMA_VIRTUAL_CHANNELS
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
123 tristate "Broadcom SBA RAID engine support"
124 depends on ARM64 || COMPILE_TEST
125 depends on MAILBOX && RAID6_PQ
127 select DMA_ENGINE_RAID
128 select ASYNC_TX_DISABLE_XOR_VAL_DMA
129 select ASYNC_TX_DISABLE_PQ_VAL_DMA
130 default m if ARCH_BCM_IPROC
132 Enable support for Broadcom SBA RAID Engine. The SBA RAID
133 engine is available on most of the Broadcom iProc SoCs. It
134 has the capability to offload memcpy, xor and pq computation
138 tristate "BCM2835 DMA engine support"
139 depends on ARCH_BCM2835
141 select DMA_VIRTUAL_CHANNELS
144 tristate "JZ4780 DMA support"
145 depends on MIPS || COMPILE_TEST
147 select DMA_VIRTUAL_CHANNELS
149 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
150 If you have a board based on such a SoC and wish to use DMA for
151 devices which can use the DMA controller, say Y or M here.
154 tristate "SA-11x0 DMA support"
155 depends on ARCH_SA1100 || COMPILE_TEST
157 select DMA_VIRTUAL_CHANNELS
159 Support the DMA engine found on Intel StrongARM SA-1100 and
160 SA-1110 SoCs. This DMA engine can only be used with on-chip
164 tristate "Allwinner A10 DMA SoCs support"
165 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
166 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
168 select DMA_VIRTUAL_CHANNELS
170 Enable support for the DMA controller present in the sun4i,
171 sun5i and sun7i Allwinner ARM SoCs.
174 tristate "Allwinner A31 SoCs DMA support"
175 depends on ARCH_SUNXI || COMPILE_TEST
176 depends on RESET_CONTROLLER
178 select DMA_VIRTUAL_CHANNELS
180 Support for the DMA engine first found in Allwinner A31 SoCs.
183 tristate "Synopsys DesignWare AXI DMA support"
187 select DMA_VIRTUAL_CHANNELS
189 Enable support for Synopsys DesignWare AXI DMA controller.
190 NOTE: This driver wasn't tested on 64 bit platform because
191 of lack 64 bit platform with Synopsys DW AXI DMAC.
194 bool "Cirrus Logic EP93xx DMA support"
195 depends on ARCH_EP93XX || COMPILE_TEST
198 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
201 tristate "Freescale Elo series DMA support"
204 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
206 Enable support for the Freescale Elo series DMA controllers.
207 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
208 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
209 some Txxx and Bxxx parts.
212 tristate "Freescale eDMA engine support"
215 select DMA_VIRTUAL_CHANNELS
217 Support the Freescale eDMA engine with programmable channel
218 multiplexing capability for DMA request sources(slot).
219 This module can be found on Freescale Vybrid and LS-1 SoCs.
222 tristate "NXP Layerscape qDMA engine support"
223 depends on ARM || ARM64
225 select DMA_VIRTUAL_CHANNELS
226 select DMA_ENGINE_RAID
227 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
229 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
230 Channel virtualization is supported through enqueuing of DMA jobs to,
231 or dequeuing DMA jobs from, different work queues.
232 This module can be found on NXP Layerscape SoCs.
233 The qdma driver only work on SoCs with a DPAA hardware block.
236 tristate "Freescale RAID engine Support"
237 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
239 select DMA_ENGINE_RAID
241 Enable support for Freescale RAID Engine. RAID Engine is
242 available on some QorIQ SoCs (like P5020/P5040). It has
243 the capability to offload memcpy, xor and pq computation
247 tristate "HiSilicon DMA Engine support"
248 depends on ARCH_HISI || COMPILE_TEST
251 select DMA_VIRTUAL_CHANNELS
253 Support HiSilicon Kunpeng DMA engine.
256 tristate "IMG MDC support"
257 depends on MIPS || COMPILE_TEST
258 depends on MFD_SYSCON
260 select DMA_VIRTUAL_CHANNELS
262 Enable support for the IMG multi-threaded DMA controller (MDC).
265 tristate "i.MX DMA support"
269 Support the i.MX DMA engine. This engine is integrated into
270 Freescale i.MX1/21/27 chips.
273 tristate "i.MX SDMA support"
276 select DMA_VIRTUAL_CHANNELS
278 Support the i.MX SDMA engine. This engine is integrated into
279 Freescale i.MX25/31/35/51/53/6 chips.
282 tristate "Intel integrated DMA 64-bit support"
284 select DMA_VIRTUAL_CHANNELS
286 Enable DMA support for Intel Low Power Subsystem such as found on
289 config INTEL_IDXD_BUS
294 tristate "Intel Data Accelerators support"
295 depends on PCI && X86_64 && !UML
301 Enable support for the Intel(R) data accelerators present
304 Say Y if you have such a platform.
308 config INTEL_IDXD_COMPAT
309 bool "Legacy behavior for idxd driver"
310 depends on PCI && X86_64
311 select INTEL_IDXD_BUS
313 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
314 The old behavior performed driver bind/unbind for device and wq
315 devices all under the dsa driver. The compat driver will emulate
316 the legacy behavior in order to allow existing support apps (i.e.
317 accel-config) to continue function. It is expected that accel-config
318 v3.2 and earlier will need the compat mode. A distro with later
319 accel-config version can disable this compat config.
321 Say Y if you have old applications that require such behavior.
325 # Config symbol that collects all the dependencies that's necessary to
326 # support shared virtual memory for the devices supported by idxd.
327 config INTEL_IDXD_SVM
328 bool "Accelerator Shared Virtual Memory Support"
329 depends on INTEL_IDXD
330 depends on INTEL_IOMMU_SVM
335 config INTEL_IDXD_PERFMON
336 bool "Intel Data Accelerators performance monitor support"
337 depends on INTEL_IDXD
339 Enable performance monitor (pmu) support for the Intel(R)
340 data accelerators present in Intel Xeon CPU. With this
341 enabled, perf can be used to monitor the DSA (Intel Data
342 Streaming Accelerator) events described in the Intel DSA
348 tristate "Intel I/OAT DMA support"
349 depends on PCI && X86_64 && !UML
351 select DMA_ENGINE_RAID
354 Enable support for the Intel(R) I/OAT DMA engine present
355 in recent Intel Xeon chipsets.
357 Say Y here if you have such a chipset.
362 tristate "Hisilicon K3 DMA support"
363 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
365 select DMA_VIRTUAL_CHANNELS
367 Support the DMA engine for Hisilicon K3 platform
370 config LPC18XX_DMAMUX
371 bool "NXP LPC18xx/43xx DMA MUX for PL080"
372 depends on ARCH_LPC18XX || COMPILE_TEST
373 depends on OF && AMBA_PL08X
376 Enable support for DMA on NXP LPC18xx/43xx platforms
377 with PL080 and multiplexed DMA request lines.
380 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
381 depends on M5441x || COMPILE_TEST
383 select DMA_VIRTUAL_CHANNELS
385 Support the Freescale ColdFire eDMA engine, 64-channel
386 implementation that performs complex data transfers with
387 minimal intervention from a host processor.
388 This module can be found on Freescale ColdFire mcf5441x SoCs.
390 config MILBEAUT_HDMAC
391 tristate "Milbeaut AHB DMA support"
392 depends on ARCH_MILBEAUT || COMPILE_TEST
395 select DMA_VIRTUAL_CHANNELS
397 Say yes here to support the Socionext Milbeaut
400 config MILBEAUT_XDMAC
401 tristate "Milbeaut AXI DMA support"
402 depends on ARCH_MILBEAUT || COMPILE_TEST
405 select DMA_VIRTUAL_CHANNELS
407 Say yes here to support the Socionext Milbeaut
411 tristate "MMP PDMA support"
412 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
415 Support the MMP PDMA engine for PXA and MMP platform.
418 tristate "MMP Two-Channel DMA support"
419 depends on ARCH_MMP || COMPILE_TEST
421 select GENERIC_ALLOCATOR
423 Support the MMP Two-Channel DMA engine.
424 This engine used for MMP Audio DMA and pxa910 SQU.
427 tristate "MOXART DMA support"
428 depends on ARCH_MOXART
430 select DMA_VIRTUAL_CHANNELS
432 Enable support for the MOXA ART SoC DMA controller.
434 Say Y here if you enabled MMP ADMA, otherwise say N.
437 tristate "Freescale MPC512x built-in DMA engine support"
438 depends on PPC_MPC512x || PPC_MPC831x
441 Enable support for the Freescale MPC512x built-in DMA engine.
444 bool "Marvell XOR engine support"
445 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
447 select DMA_ENGINE_RAID
448 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
450 Enable support for the Marvell XOR engine.
453 bool "Marvell XOR engine version 2 support "
456 select DMA_ENGINE_RAID
457 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
458 select GENERIC_MSI_IRQ
460 Enable support for the Marvell version 2 XOR engine.
462 This engine provides acceleration for copy, XOR and RAID6
463 operations, and is available on Marvell Armada 7K and 8K
467 bool "MXS DMA support"
468 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
472 Support the MXS DMA engine. This engine including APBH-DMA
473 and APBX-DMA is integrated into some Freescale chips.
476 bool "MX3x Image Processing Unit support"
481 If you plan to use the Image Processing unit in the i.MX3x, say
482 Y here. If unsure, select Y.
485 int "Number of dynamically mapped interrupts for IPU"
490 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
491 To avoid bloating the irq_desc[] array we allocate a sufficient
492 number of IRQ slots and map them dynamically to specific sources.
495 tristate "Renesas Type-AXI NBPF DMA support"
497 depends on ARM || COMPILE_TEST
499 Support for "Type-AXI" NBPF DMA IPs from Renesas
502 tristate "Actions Semi Owl SoCs DMA support"
503 depends on ARCH_ACTIONS
505 select DMA_VIRTUAL_CHANNELS
507 Enable support for the Actions Semi Owl SoCs DMA controller.
510 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
511 depends on PCI && (X86_32 || COMPILE_TEST)
514 Enable support for Intel EG20T PCH DMA engine.
516 This driver also can be used for LAPIS Semiconductor IOH(Input/
517 Output Hub), ML7213, ML7223 and ML7831.
518 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
519 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
520 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
521 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
524 tristate "DMA API Driver for PL330"
528 Select if your platform has one or more PL330 DMACs.
529 You need to provide platform specific settings via
530 platform_data for a dma-pl330 device.
533 bool "PXA DMA support"
534 depends on (ARCH_MMP || ARCH_PXA)
536 select DMA_VIRTUAL_CHANNELS
538 Support the DMA engine for PXA. It is also compatible with MMP PDMA
539 platform. The internal DMA IP of all PXA variants is supported, with
540 16 to 32 channels for peripheral to memory or memory to memory
544 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
548 Some PLX ExpressLane PCI Switches support additional DMA engines.
549 These are exposed via extra functions on the switch's
550 upstream port. Each function exposes one DMA channel.
553 bool "ST-Ericsson DMA40 support"
554 depends on ARCH_U8500
557 Support for ST-Ericsson DMA40 controller
560 tristate "ST FDMA dmaengine support"
562 depends on REMOTEPROC
563 select ST_SLIM_REMOTEPROC
565 select DMA_VIRTUAL_CHANNELS
567 Enable support for ST FDMA controller.
568 It supports 16 independent DMA channels, accepts up to 32 DMA requests
570 Say Y here if you have such a chipset.
574 bool "STMicroelectronics STM32 DMA support"
575 depends on ARCH_STM32 || COMPILE_TEST
577 select DMA_VIRTUAL_CHANNELS
579 Enable support for the on-chip DMA controller on STMicroelectronics
581 If you have a board based on such a MCU and wish to use DMA say Y
585 bool "STMicroelectronics STM32 dma multiplexer support"
586 depends on STM32_DMA || COMPILE_TEST
588 Enable support for the on-chip DMA multiplexer on STMicroelectronics
590 If you have a board based on such a MCU and wish to use DMAMUX say Y
594 bool "STMicroelectronics STM32 master dma support"
595 depends on ARCH_STM32 || COMPILE_TEST
598 select DMA_VIRTUAL_CHANNELS
600 Enable support for the on-chip MDMA controller on STMicroelectronics
602 If you have a board based on STM32 SoC and wish to use the master DMA
606 tristate "Spreadtrum DMA support"
607 depends on ARCH_SPRD || COMPILE_TEST
609 select DMA_VIRTUAL_CHANNELS
611 Enable support for the on-chip DMA controller on Spreadtrum platform.
614 tristate "Toshiba TXx9 SoC DMA support"
615 depends on MACH_TX49XX
618 Support the TXx9 SoC internal DMA controller. This can be
619 integrated in chips such as the Toshiba TX4927/38/39.
621 config TEGRA186_GPC_DMA
622 tristate "NVIDIA Tegra GPC DMA support"
623 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
627 Support for the NVIDIA Tegra General Purpose Central DMA controller.
628 The DMA controller has multiple DMA channels which can be configured
629 for different peripherals like UART, SPI, etc which are on APB bus.
630 This DMA controller transfers data from memory to peripheral FIFO
631 or vice versa. It also supports memory to memory data transfer.
633 config TEGRA20_APB_DMA
634 tristate "NVIDIA Tegra20 APB DMA support"
635 depends on ARCH_TEGRA || COMPILE_TEST
638 Support for the NVIDIA Tegra20 APB DMA controller driver. The
639 DMA controller is having multiple DMA channel which can be
640 configured for different peripherals like audio, UART, SPI,
641 I2C etc which is in APB bus.
642 This DMA controller transfers data from memory to peripheral fifo
643 or vice versa. It does not support memory to memory data transfer.
646 tristate "NVIDIA Tegra210 ADMA support"
647 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
649 select DMA_VIRTUAL_CHANNELS
651 Support for the NVIDIA Tegra210 ADMA controller driver. The
652 DMA controller has multiple DMA channels and is used to service
653 various audio clients in the Tegra210 audio processing engine
654 (APE). This DMA controller transfers data from memory to
655 peripheral and vice versa. It does not support memory to
656 memory data transfer.
659 tristate "Timberdale FPGA DMA support"
660 depends on MFD_TIMBERDALE || COMPILE_TEST
663 Enable support for the Timberdale FPGA DMA engine.
665 config UNIPHIER_MDMAC
666 tristate "UniPhier MIO DMAC"
667 depends on ARCH_UNIPHIER || COMPILE_TEST
670 select DMA_VIRTUAL_CHANNELS
672 Enable support for the MIO DMAC (Media I/O DMA controller) on the
673 UniPhier platform. This DMA controller is used as the external
674 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
676 config UNIPHIER_XDMAC
677 tristate "UniPhier XDMAC support"
678 depends on ARCH_UNIPHIER || COMPILE_TEST
681 select DMA_VIRTUAL_CHANNELS
683 Enable support for the XDMAC (external DMA controller) on the
684 UniPhier platform. This DMA controller can transfer data from
685 memory to memory, memory to peripheral and peripheral to memory.
688 tristate "APM X-Gene DMA support"
689 depends on ARCH_XGENE || COMPILE_TEST
691 select DMA_ENGINE_RAID
692 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
694 Enable support for the APM X-Gene SoC DMA engine.
697 tristate "Xilinx AXI DMAS Engine"
698 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
701 Enable support for Xilinx AXI VDMA Soft IP.
703 AXI VDMA engine provides high-bandwidth direct memory access
704 between memory and AXI4-Stream video type target
705 peripherals including peripherals which support AXI4-
706 Stream Video Protocol. It has two stream interfaces/
707 channels, Memory Mapped to Stream (MM2S) and Stream to
708 Memory Mapped (S2MM) for the data transfers.
709 AXI CDMA engine provides high-bandwidth direct memory access
710 between a memory-mapped source address and a memory-mapped
712 AXI DMA engine provides high-bandwidth one dimensional direct
713 memory access between memory and AXI4-Stream target peripherals.
714 AXI MCDMA engine provides high-bandwidth direct memory access
715 between memory and AXI4-Stream target peripherals. It provides
716 the scatter gather interface with multiple channels independent
717 configuration support.
720 tristate "Xilinx DMA/Bridge Subsystem DMA Engine"
723 select DMA_VIRTUAL_CHANNELS
726 Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA
727 provides high performance block data movement between Host memory
728 and the DMA subsystem. These direct memory transfers can be both in
729 the Host to Card (H2C) and Card to Host (C2H) transfers.
730 The core also provides up to 16 user interrupt wires that generate
731 interrupts to the host.
733 config XILINX_ZYNQMP_DMA
734 tristate "Xilinx ZynqMP DMA Engine"
735 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
738 Enable support for Xilinx ZynqMP DMA controller.
740 config XILINX_ZYNQMP_DPDMA
741 tristate "Xilinx DPDMA Engine"
742 depends on HAS_IOMEM && OF
744 select DMA_VIRTUAL_CHANNELS
746 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
747 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
748 driver provides the dmaengine required by the DisplayPort subsystem
752 source "drivers/dma/bestcomm/Kconfig"
754 source "drivers/dma/mediatek/Kconfig"
756 source "drivers/dma/ptdma/Kconfig"
758 source "drivers/dma/qcom/Kconfig"
760 source "drivers/dma/dw/Kconfig"
762 source "drivers/dma/dw-edma/Kconfig"
764 source "drivers/dma/hsu/Kconfig"
766 source "drivers/dma/sf-pdma/Kconfig"
768 source "drivers/dma/sh/Kconfig"
770 source "drivers/dma/ti/Kconfig"
772 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
774 source "drivers/dma/lgm/Kconfig"
777 comment "DMA Clients"
778 depends on DMA_ENGINE
781 bool "Async_tx: Offload support for the async_tx api"
782 depends on DMA_ENGINE
784 This allows the async_tx api to take advantage of offload engines for
785 memcpy, memset, xor, and raid6 p+q operations. If your platform has
786 a dma engine that can perform raid operations and you have enabled
792 tristate "DMA Test client"
793 depends on DMA_ENGINE
794 select DMA_ENGINE_RAID
796 Simple DMA test client. Say N unless you're debugging a
799 config DMA_ENGINE_RAID