1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Apple ADMAC support"
90 depends on ARCH_APPLE || COMPILE_TEST
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
97 tristate "Atmel AHB DMA support"
100 select DMA_VIRTUAL_CHANNELS
102 Support the Atmel AHB DMA controller.
105 tristate "Atmel XDMA support"
109 Support the Atmel XDMA controller.
112 tristate "Analog Devices AXI-DMAC DMA support"
113 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
115 select DMA_VIRTUAL_CHANNELS
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
123 tristate "Broadcom SBA RAID engine support"
124 depends on ARM64 || COMPILE_TEST
125 depends on MAILBOX && RAID6_PQ
127 select DMA_ENGINE_RAID
128 select ASYNC_TX_DISABLE_XOR_VAL_DMA
129 select ASYNC_TX_DISABLE_PQ_VAL_DMA
130 default m if ARCH_BCM_IPROC
132 Enable support for Broadcom SBA RAID Engine. The SBA RAID
133 engine is available on most of the Broadcom iProc SoCs. It
134 has the capability to offload memcpy, xor and pq computation
138 tristate "BCM2835 DMA engine support"
139 depends on ARCH_BCM2835
141 select DMA_VIRTUAL_CHANNELS
144 tristate "JZ4780 DMA support"
145 depends on MIPS || COMPILE_TEST
147 select DMA_VIRTUAL_CHANNELS
149 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
150 If you have a board based on such a SoC and wish to use DMA for
151 devices which can use the DMA controller, say Y or M here.
154 tristate "SA-11x0 DMA support"
155 depends on ARCH_SA1100 || COMPILE_TEST
157 select DMA_VIRTUAL_CHANNELS
159 Support the DMA engine found on Intel StrongARM SA-1100 and
160 SA-1110 SoCs. This DMA engine can only be used with on-chip
164 tristate "Allwinner A10 DMA SoCs support"
165 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
166 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
168 select DMA_VIRTUAL_CHANNELS
170 Enable support for the DMA controller present in the sun4i,
171 sun5i and sun7i Allwinner ARM SoCs.
174 tristate "Allwinner A31 SoCs DMA support"
175 depends on ARCH_SUNXI || COMPILE_TEST
176 depends on RESET_CONTROLLER
178 select DMA_VIRTUAL_CHANNELS
180 Support for the DMA engine first found in Allwinner A31 SoCs.
183 tristate "Synopsys DesignWare AXI DMA support"
187 select DMA_VIRTUAL_CHANNELS
189 Enable support for Synopsys DesignWare AXI DMA controller.
190 NOTE: This driver wasn't tested on 64 bit platform because
191 of lack 64 bit platform with Synopsys DW AXI DMAC.
194 bool "Cirrus Logic EP93xx DMA support"
195 depends on ARCH_EP93XX || COMPILE_TEST
198 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
201 tristate "Freescale Elo series DMA support"
204 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
206 Enable support for the Freescale Elo series DMA controllers.
207 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
208 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
209 some Txxx and Bxxx parts.
212 tristate "Freescale eDMA engine support"
216 select DMA_VIRTUAL_CHANNELS
218 Support the Freescale eDMA engine with programmable channel
219 multiplexing capability for DMA request sources(slot).
220 This module can be found on Freescale Vybrid and LS-1 SoCs.
223 tristate "NXP Layerscape qDMA engine support"
224 depends on ARM || ARM64
226 select DMA_VIRTUAL_CHANNELS
227 select DMA_ENGINE_RAID
228 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
230 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
231 Channel virtualization is supported through enqueuing of DMA jobs to,
232 or dequeuing DMA jobs from, different work queues.
233 This module can be found on NXP Layerscape SoCs.
234 The qdma driver only work on SoCs with a DPAA hardware block.
237 tristate "Freescale RAID engine Support"
238 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
240 select DMA_ENGINE_RAID
242 Enable support for Freescale RAID Engine. RAID Engine is
243 available on some QorIQ SoCs (like P5020/P5040). It has
244 the capability to offload memcpy, xor and pq computation
248 tristate "HiSilicon DMA Engine support"
249 depends on ARCH_HISI || COMPILE_TEST
252 select DMA_VIRTUAL_CHANNELS
254 Support HiSilicon Kunpeng DMA engine.
257 tristate "IMG MDC support"
258 depends on MIPS || COMPILE_TEST
259 depends on MFD_SYSCON
261 select DMA_VIRTUAL_CHANNELS
263 Enable support for the IMG multi-threaded DMA controller (MDC).
266 tristate "i.MX DMA support"
270 Support the i.MX DMA engine. This engine is integrated into
271 Freescale i.MX1/21/27 chips.
274 tristate "i.MX SDMA support"
277 select DMA_VIRTUAL_CHANNELS
279 Support the i.MX SDMA engine. This engine is integrated into
280 Freescale i.MX25/31/35/51/53/6 chips.
283 tristate "Intel integrated DMA 64-bit support"
286 select DMA_VIRTUAL_CHANNELS
288 Enable DMA support for Intel Low Power Subsystem such as found on
291 config INTEL_IDXD_BUS
296 tristate "Intel Data Accelerators support"
297 depends on PCI && X86_64 && !UML
303 Enable support for the Intel(R) data accelerators present
306 Say Y if you have such a platform.
310 config INTEL_IDXD_COMPAT
311 bool "Legacy behavior for idxd driver"
312 depends on PCI && X86_64
313 select INTEL_IDXD_BUS
315 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
316 The old behavior performed driver bind/unbind for device and wq
317 devices all under the dsa driver. The compat driver will emulate
318 the legacy behavior in order to allow existing support apps (i.e.
319 accel-config) to continue function. It is expected that accel-config
320 v3.2 and earlier will need the compat mode. A distro with later
321 accel-config version can disable this compat config.
323 Say Y if you have old applications that require such behavior.
327 # Config symbol that collects all the dependencies that's necessary to
328 # support shared virtual memory for the devices supported by idxd.
329 config INTEL_IDXD_SVM
330 bool "Accelerator Shared Virtual Memory Support"
331 depends on INTEL_IDXD
332 depends on INTEL_IOMMU_SVM
337 config INTEL_IDXD_PERFMON
338 bool "Intel Data Accelerators performance monitor support"
339 depends on INTEL_IDXD
341 Enable performance monitor (pmu) support for the Intel(R)
342 data accelerators present in Intel Xeon CPU. With this
343 enabled, perf can be used to monitor the DSA (Intel Data
344 Streaming Accelerator) events described in the Intel DSA
350 tristate "Intel I/OAT DMA support"
351 depends on PCI && X86_64 && !UML
353 select DMA_ENGINE_RAID
356 Enable support for the Intel(R) I/OAT DMA engine present
357 in recent Intel Xeon chipsets.
359 Say Y here if you have such a chipset.
364 tristate "Hisilicon K3 DMA support"
365 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
367 select DMA_VIRTUAL_CHANNELS
369 Support the DMA engine for Hisilicon K3 platform
372 config LPC18XX_DMAMUX
373 bool "NXP LPC18xx/43xx DMA MUX for PL080"
374 depends on ARCH_LPC18XX || COMPILE_TEST
375 depends on OF && AMBA_PL08X
378 Enable support for DMA on NXP LPC18xx/43xx platforms
379 with PL080 and multiplexed DMA request lines.
382 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
383 depends on M5441x || COMPILE_TEST
385 select DMA_VIRTUAL_CHANNELS
387 Support the Freescale ColdFire eDMA engine, 64-channel
388 implementation that performs complex data transfers with
389 minimal intervention from a host processor.
390 This module can be found on Freescale ColdFire mcf5441x SoCs.
392 config MILBEAUT_HDMAC
393 tristate "Milbeaut AHB DMA support"
394 depends on ARCH_MILBEAUT || COMPILE_TEST
397 select DMA_VIRTUAL_CHANNELS
399 Say yes here to support the Socionext Milbeaut
402 config MILBEAUT_XDMAC
403 tristate "Milbeaut AXI DMA support"
404 depends on ARCH_MILBEAUT || COMPILE_TEST
407 select DMA_VIRTUAL_CHANNELS
409 Say yes here to support the Socionext Milbeaut
413 tristate "MMP PDMA support"
414 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
417 Support the MMP PDMA engine for PXA and MMP platform.
420 tristate "MMP Two-Channel DMA support"
421 depends on ARCH_MMP || COMPILE_TEST
423 select GENERIC_ALLOCATOR
425 Support the MMP Two-Channel DMA engine.
426 This engine used for MMP Audio DMA and pxa910 SQU.
429 tristate "MOXART DMA support"
430 depends on ARCH_MOXART
432 select DMA_VIRTUAL_CHANNELS
434 Enable support for the MOXA ART SoC DMA controller.
436 Say Y here if you enabled MMP ADMA, otherwise say N.
439 tristate "Freescale MPC512x built-in DMA engine support"
440 depends on PPC_MPC512x || PPC_MPC831x
443 Enable support for the Freescale MPC512x built-in DMA engine.
446 bool "Marvell XOR engine support"
447 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
449 select DMA_ENGINE_RAID
450 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
452 Enable support for the Marvell XOR engine.
455 bool "Marvell XOR engine version 2 support "
458 select DMA_ENGINE_RAID
459 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
460 select GENERIC_MSI_IRQ
462 Enable support for the Marvell version 2 XOR engine.
464 This engine provides acceleration for copy, XOR and RAID6
465 operations, and is available on Marvell Armada 7K and 8K
469 bool "MXS DMA support"
470 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
474 Support the MXS DMA engine. This engine including APBH-DMA
475 and APBX-DMA is integrated into some Freescale chips.
478 bool "MX3x Image Processing Unit support"
483 If you plan to use the Image Processing unit in the i.MX3x, say
484 Y here. If unsure, select Y.
487 int "Number of dynamically mapped interrupts for IPU"
492 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
493 To avoid bloating the irq_desc[] array we allocate a sufficient
494 number of IRQ slots and map them dynamically to specific sources.
497 tristate "Renesas Type-AXI NBPF DMA support"
499 depends on ARM || COMPILE_TEST
501 Support for "Type-AXI" NBPF DMA IPs from Renesas
504 tristate "Actions Semi Owl SoCs DMA support"
505 depends on ARCH_ACTIONS
507 select DMA_VIRTUAL_CHANNELS
509 Enable support for the Actions Semi Owl SoCs DMA controller.
512 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
513 depends on PCI && (X86_32 || COMPILE_TEST)
516 Enable support for Intel EG20T PCH DMA engine.
518 This driver also can be used for LAPIS Semiconductor IOH(Input/
519 Output Hub), ML7213, ML7223 and ML7831.
520 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
521 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
522 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
523 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
526 tristate "DMA API Driver for PL330"
530 Select if your platform has one or more PL330 DMACs.
531 You need to provide platform specific settings via
532 platform_data for a dma-pl330 device.
535 bool "PXA DMA support"
536 depends on (ARCH_MMP || ARCH_PXA)
538 select DMA_VIRTUAL_CHANNELS
540 Support the DMA engine for PXA. It is also compatible with MMP PDMA
541 platform. The internal DMA IP of all PXA variants is supported, with
542 16 to 32 channels for peripheral to memory or memory to memory
546 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
550 Some PLX ExpressLane PCI Switches support additional DMA engines.
551 These are exposed via extra functions on the switch's
552 upstream port. Each function exposes one DMA channel.
555 bool "ST-Ericsson DMA40 support"
556 depends on ARCH_U8500
560 Support for ST-Ericsson DMA40 controller
563 tristate "ST FDMA dmaengine support"
565 depends on REMOTEPROC
566 select ST_SLIM_REMOTEPROC
568 select DMA_VIRTUAL_CHANNELS
570 Enable support for ST FDMA controller.
571 It supports 16 independent DMA channels, accepts up to 32 DMA requests
573 Say Y here if you have such a chipset.
577 bool "STMicroelectronics STM32 DMA support"
578 depends on ARCH_STM32 || COMPILE_TEST
580 select DMA_VIRTUAL_CHANNELS
582 Enable support for the on-chip DMA controller on STMicroelectronics
584 If you have a board based on such a MCU and wish to use DMA say Y
588 bool "STMicroelectronics STM32 dma multiplexer support"
589 depends on STM32_DMA || COMPILE_TEST
591 Enable support for the on-chip DMA multiplexer on STMicroelectronics
593 If you have a board based on such a MCU and wish to use DMAMUX say Y
597 bool "STMicroelectronics STM32 master dma support"
598 depends on ARCH_STM32 || COMPILE_TEST
601 select DMA_VIRTUAL_CHANNELS
603 Enable support for the on-chip MDMA controller on STMicroelectronics
605 If you have a board based on STM32 SoC and wish to use the master DMA
609 tristate "Spreadtrum DMA support"
610 depends on ARCH_SPRD || COMPILE_TEST
612 select DMA_VIRTUAL_CHANNELS
614 Enable support for the on-chip DMA controller on Spreadtrum platform.
617 tristate "Toshiba TXx9 SoC DMA support"
618 depends on MACH_TX49XX
621 Support the TXx9 SoC internal DMA controller. This can be
622 integrated in chips such as the Toshiba TX4927/38/39.
624 config TEGRA186_GPC_DMA
625 tristate "NVIDIA Tegra GPC DMA support"
626 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
629 select DMA_VIRTUAL_CHANNELS
631 Support for the NVIDIA Tegra General Purpose Central DMA controller.
632 The DMA controller has multiple DMA channels which can be configured
633 for different peripherals like UART, SPI, etc which are on APB bus.
634 This DMA controller transfers data from memory to peripheral FIFO
635 or vice versa. It also supports memory to memory data transfer.
637 config TEGRA20_APB_DMA
638 tristate "NVIDIA Tegra20 APB DMA support"
639 depends on ARCH_TEGRA || COMPILE_TEST
642 Support for the NVIDIA Tegra20 APB DMA controller driver. The
643 DMA controller is having multiple DMA channel which can be
644 configured for different peripherals like audio, UART, SPI,
645 I2C etc which is in APB bus.
646 This DMA controller transfers data from memory to peripheral fifo
647 or vice versa. It does not support memory to memory data transfer.
650 tristate "NVIDIA Tegra210 ADMA support"
651 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
653 select DMA_VIRTUAL_CHANNELS
655 Support for the NVIDIA Tegra210 ADMA controller driver. The
656 DMA controller has multiple DMA channels and is used to service
657 various audio clients in the Tegra210 audio processing engine
658 (APE). This DMA controller transfers data from memory to
659 peripheral and vice versa. It does not support memory to
660 memory data transfer.
663 tristate "Timberdale FPGA DMA support"
664 depends on MFD_TIMBERDALE || COMPILE_TEST
667 Enable support for the Timberdale FPGA DMA engine.
669 config UNIPHIER_MDMAC
670 tristate "UniPhier MIO DMAC"
671 depends on ARCH_UNIPHIER || COMPILE_TEST
674 select DMA_VIRTUAL_CHANNELS
676 Enable support for the MIO DMAC (Media I/O DMA controller) on the
677 UniPhier platform. This DMA controller is used as the external
678 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
680 config UNIPHIER_XDMAC
681 tristate "UniPhier XDMAC support"
682 depends on ARCH_UNIPHIER || COMPILE_TEST
685 select DMA_VIRTUAL_CHANNELS
687 Enable support for the XDMAC (external DMA controller) on the
688 UniPhier platform. This DMA controller can transfer data from
689 memory to memory, memory to peripheral and peripheral to memory.
692 tristate "APM X-Gene DMA support"
693 depends on ARCH_XGENE || COMPILE_TEST
695 select DMA_ENGINE_RAID
696 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
698 Enable support for the APM X-Gene SoC DMA engine.
701 tristate "Xilinx AXI DMAS Engine"
702 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
705 Enable support for Xilinx AXI VDMA Soft IP.
707 AXI VDMA engine provides high-bandwidth direct memory access
708 between memory and AXI4-Stream video type target
709 peripherals including peripherals which support AXI4-
710 Stream Video Protocol. It has two stream interfaces/
711 channels, Memory Mapped to Stream (MM2S) and Stream to
712 Memory Mapped (S2MM) for the data transfers.
713 AXI CDMA engine provides high-bandwidth direct memory access
714 between a memory-mapped source address and a memory-mapped
716 AXI DMA engine provides high-bandwidth one dimensional direct
717 memory access between memory and AXI4-Stream target peripherals.
718 AXI MCDMA engine provides high-bandwidth direct memory access
719 between memory and AXI4-Stream target peripherals. It provides
720 the scatter gather interface with multiple channels independent
721 configuration support.
724 tristate "Xilinx DMA/Bridge Subsystem DMA Engine"
727 select DMA_VIRTUAL_CHANNELS
730 Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA
731 provides high performance block data movement between Host memory
732 and the DMA subsystem. These direct memory transfers can be both in
733 the Host to Card (H2C) and Card to Host (C2H) transfers.
734 The core also provides up to 16 user interrupt wires that generate
735 interrupts to the host.
737 config XILINX_ZYNQMP_DMA
738 tristate "Xilinx ZynqMP DMA Engine"
739 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
742 Enable support for Xilinx ZynqMP DMA controller.
744 config XILINX_ZYNQMP_DPDMA
745 tristate "Xilinx DPDMA Engine"
746 depends on HAS_IOMEM && OF
748 select DMA_VIRTUAL_CHANNELS
750 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
751 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
752 driver provides the dmaengine required by the DisplayPort subsystem
756 source "drivers/dma/bestcomm/Kconfig"
758 source "drivers/dma/mediatek/Kconfig"
760 source "drivers/dma/ptdma/Kconfig"
762 source "drivers/dma/qcom/Kconfig"
764 source "drivers/dma/dw/Kconfig"
766 source "drivers/dma/dw-edma/Kconfig"
768 source "drivers/dma/hsu/Kconfig"
770 source "drivers/dma/sf-pdma/Kconfig"
772 source "drivers/dma/sh/Kconfig"
774 source "drivers/dma/ti/Kconfig"
776 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
778 source "drivers/dma/lgm/Kconfig"
781 comment "DMA Clients"
782 depends on DMA_ENGINE
785 bool "Async_tx: Offload support for the async_tx api"
786 depends on DMA_ENGINE
788 This allows the async_tx api to take advantage of offload engines for
789 memcpy, memset, xor, and raid6 p+q operations. If your platform has
790 a dma engine that can perform raid operations and you have enabled
796 tristate "DMA Test client"
797 depends on DMA_ENGINE
798 select DMA_ENGINE_RAID
800 Simple DMA test client. Say N unless you're debugging a
803 config DMA_ENGINE_RAID