1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2020 Michael Walle <michael@walle.cc>
5 * Driver for Freescale Cryptographic Accelerator and Assurance
6 * Module (CAAM) hardware random number generator.
14 #include <linux/kernel.h>
15 #include "desc_constr.h"
19 #define CAAM_RNG_MAX_FIFO_STORE_SIZE 16
20 #define CAAM_RNG_DESC_LEN (3 * CAAM_CMD_SZ + CAAM_PTR_SZ)
22 struct caam_rng_priv {
23 u32 desc[CAAM_RNG_DESC_LEN / 4];
24 u8 data[CAAM_RNG_MAX_FIFO_STORE_SIZE] __aligned(ARCH_DMA_MINALIGN);
27 static int caam_rng_read_one(struct caam_rng_priv *priv)
29 int size = ALIGN(CAAM_RNG_MAX_FIFO_STORE_SIZE, ARCH_DMA_MINALIGN);
32 ret = run_descriptor_jr(priv->desc);
36 invalidate_dcache_range((unsigned long)priv->data,
37 (unsigned long)priv->data + size);
42 static int caam_rng_read(struct udevice *dev, void *data, size_t len)
44 struct caam_rng_priv *priv = dev_get_priv(dev);
50 ret = caam_rng_read_one(priv);
54 size = min(len, (size_t)CAAM_RNG_MAX_FIFO_STORE_SIZE);
56 memcpy(buffer, priv->data, size);
64 static int caam_rng_probe(struct udevice *dev)
66 struct caam_rng_priv *priv = dev_get_priv(dev);
67 ulong size = ALIGN(CAAM_RNG_DESC_LEN, ARCH_DMA_MINALIGN);
69 inline_cnstr_jobdesc_rng(priv->desc, priv->data,
70 CAAM_RNG_MAX_FIFO_STORE_SIZE);
71 flush_dcache_range((unsigned long)priv->desc,
72 (unsigned long)priv->desc + size);
77 static const struct dm_rng_ops caam_rng_ops = {
78 .read = caam_rng_read,
81 U_BOOT_DRIVER(caam_rng) = {
85 .probe = caam_rng_probe,
86 .priv_auto_alloc_size = sizeof(struct caam_rng_priv),
87 .flags = DM_FLAG_ALLOC_PRIV_DMA,