1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
17 #include <asm/cache.h>
18 #include <linux/errno.h>
20 #define CRYPTO_MAX_ALG_NAME 80
21 #define SHA1_DIGEST_SIZE 20
22 #define SHA256_DIGEST_SIZE 32
24 struct caam_hash_template {
25 char name[CRYPTO_MAX_ALG_NAME];
26 unsigned int digestsize;
30 enum caam_hash_algos {
35 static struct caam_hash_template driver_hash[] = {
38 .digestsize = SHA1_DIGEST_SIZE,
39 .alg_type = OP_ALG_ALGSEL_SHA1,
43 .digestsize = SHA256_DIGEST_SIZE,
44 .alg_type = OP_ALG_ALGSEL_SHA256,
48 static enum caam_hash_algos get_hash_type(struct hash_algo *algo)
50 if (!strcmp(algo->name, driver_hash[SHA1].name))
56 /* Create the context for progressive hashing using h/w acceleration.
58 * @ctxp: Pointer to the pointer of the context for hashing
59 * @caam_algo: Enum for SHA1 or SHA256
60 * @return 0 if ok, -ENOMEM on error
62 static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo)
64 *ctxp = calloc(1, sizeof(struct sha_ctx));
66 debug("Cannot allocate memory for context\n");
73 * Update sg table for progressive hashing using h/w acceleration
75 * The context is freed by this function if an error occurs.
76 * We support at most 32 Scatter/Gather Entries.
78 * @hash_ctx: Pointer to the context for hashing
79 * @buf: Pointer to the buffer being hashed
80 * @size: Size of the buffer being hashed
81 * @is_last: 1 if this is the last update; 0 otherwise
82 * @caam_algo: Enum for SHA1 or SHA256
83 * @return 0 if ok, -EINVAL on error
85 static int caam_hash_update(void *hash_ctx, const void *buf,
86 unsigned int size, int is_last,
87 enum caam_hash_algos caam_algo)
90 phys_addr_t addr = virt_to_phys((void *)buf);
91 struct sha_ctx *ctx = hash_ctx;
93 if (ctx->sg_num >= MAX_SG_32) {
98 #ifdef CONFIG_PHYS_64BIT
99 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32));
101 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0);
103 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_lo, (uint32_t)addr);
105 sec_out32(&ctx->sg_tbl[ctx->sg_num].len_flag,
106 (size & SG_ENTRY_LENGTH_MASK));
111 final = sec_in32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag) |
113 sec_out32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag, final);
120 * Perform progressive hashing on the given buffer and copy hash at
123 * The context is freed after completion of hash operation.
125 * @hash_ctx: Pointer to the context for hashing
126 * @dest_buf: Pointer to the destination buffer where hash is to be copied
127 * @size: Size of the buffer being hashed
128 * @caam_algo: Enum for SHA1 or SHA256
129 * @return 0 if ok, -EINVAL on error
131 static int caam_hash_finish(void *hash_ctx, void *dest_buf,
132 int size, enum caam_hash_algos caam_algo)
135 struct sha_ctx *ctx = hash_ctx;
138 if (size < driver_hash[caam_algo].digestsize) {
143 for (i = 0; i < ctx->sg_num; i++)
144 len += (sec_in32(&ctx->sg_tbl[i].len_flag) &
145 SG_ENTRY_LENGTH_MASK);
147 inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len,
149 driver_hash[caam_algo].alg_type,
150 driver_hash[caam_algo].digestsize,
153 ret = run_descriptor_jr(ctx->sha_desc);
156 debug("Error %x\n", ret);
158 memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
164 int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
165 unsigned char *pout, enum caam_hash_algos algo)
171 desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
173 debug("Not enough memory for descriptor allocation\n");
177 if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) ||
178 !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) {
179 puts("Error: Address arguments are not aligned\n");
183 size = ALIGN(buf_len, ARCH_DMA_MINALIGN);
184 flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size);
186 inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout,
187 driver_hash[algo].alg_type,
188 driver_hash[algo].digestsize,
191 size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN);
192 flush_dcache_range((unsigned long)desc, (unsigned long)desc + size);
194 ret = run_descriptor_jr(desc);
196 size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
197 invalidate_dcache_range((unsigned long)pout,
198 (unsigned long)pout + size);
204 void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
205 unsigned char *pout, unsigned int chunk_size)
207 if (caam_hash(pbuf, buf_len, pout, SHA256))
208 printf("CAAM was not setup properly or it is faulty\n");
211 void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
212 unsigned char *pout, unsigned int chunk_size)
214 if (caam_hash(pbuf, buf_len, pout, SHA1))
215 printf("CAAM was not setup properly or it is faulty\n");
218 int hw_sha_init(struct hash_algo *algo, void **ctxp)
220 return caam_hash_init(ctxp, get_hash_type(algo));
223 int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
224 unsigned int size, int is_last)
226 return caam_hash_update(ctx, buf, size, is_last, get_hash_type(algo));
229 int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
232 return caam_hash_finish(ctx, dest_buf, size, get_hash_type(algo));