1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Hardware crypto devices"
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
10 If you say N, all options in this submenu will be skipped and disabled.
14 source "drivers/crypto/allwinner/Kconfig"
16 config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
28 config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
34 Use VIA PadLock for AES algorithm.
36 Available in VIA C3 and newer CPUs.
38 If unsure say M. The compiled module will be
41 config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
48 Use VIA PadLock for SHA1/SHA256 algorithms.
50 Available in VIA C7 and newer processors.
52 If unsure say M. The compiled module will be
55 config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
59 select CRYPTO_SKCIPHER
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
68 tristate "Support for s390 cryptographic adapters"
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like:
74 + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
79 bool "Enable debug features for s390 cryptographic adapters"
81 depends on DEBUG_KERNEL
84 Say 'Y' here to enable some additional debug features on the
85 s390 cryptographic adapters driver.
87 There will be some more sysfs attributes displayed for ap cards
88 and queues and some flags on crypto requests are interpreted as
89 debugging messages to force error injection.
91 Do not enable on production level kernel build.
95 config ZCRYPT_MULTIDEVNODES
96 bool "Support for multiple zcrypt device nodes"
101 With this option enabled the zcrypt device driver can
102 provide multiple devices nodes in /dev. Each device
103 node can get customized to limit access and narrow
104 down the use of the available crypto hardware.
107 tristate "Kernel API for protected key handling"
111 With this option enabled the pkey kernel module provides an API
112 for creation and handling of protected keys. Other parts of the
113 kernel or userspace applications may use these functions.
115 Select this option if you want to enable the kernel and userspace
116 API for proteced key handling.
118 Please note that creation of protected keys from secure keys
119 requires to have at least one CEX card in coprocessor mode
120 available at runtime.
122 config CRYPTO_PAES_S390
123 tristate "PAES cipher algorithms"
128 select CRYPTO_SKCIPHER
130 This is the s390 hardware accelerated implementation of the
131 AES cipher algorithms for use with protected key.
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
136 config CRYPTO_SHA1_S390
137 tristate "SHA1 digest algorithm"
141 This is the s390 hardware accelerated implementation of the
142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
144 It is available as of z990.
146 config CRYPTO_SHA256_S390
147 tristate "SHA256 digest algorithm"
151 This is the s390 hardware accelerated implementation of the
152 SHA256 secure hash standard (DFIPS 180-2).
154 It is available as of z9.
156 config CRYPTO_SHA512_S390
157 tristate "SHA384 and SHA512 digest algorithm"
161 This is the s390 hardware accelerated implementation of the
162 SHA512 secure hash standard.
164 It is available as of z10.
166 config CRYPTO_SHA3_256_S390
167 tristate "SHA3_224 and SHA3_256 digest algorithm"
171 This is the s390 hardware accelerated implementation of the
172 SHA3_256 secure hash standard.
174 It is available as of z14.
176 config CRYPTO_SHA3_512_S390
177 tristate "SHA3_384 and SHA3_512 digest algorithm"
181 This is the s390 hardware accelerated implementation of the
182 SHA3_512 secure hash standard.
184 It is available as of z14.
186 config CRYPTO_DES_S390
187 tristate "DES and Triple DES cipher algorithms"
190 select CRYPTO_SKCIPHER
191 select CRYPTO_LIB_DES
193 This is the s390 hardware accelerated implementation of the
194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
196 As of z990 the ECB and CBC mode are hardware accelerated.
197 As of z196 the CTR mode is hardware accelerated.
199 config CRYPTO_AES_S390
200 tristate "AES cipher algorithms"
203 select CRYPTO_SKCIPHER
205 This is the s390 hardware accelerated implementation of the
206 AES cipher algorithms (FIPS-197).
208 As of z9 the ECB and CBC modes are hardware accelerated
210 As of z10 the ECB and CBC modes are hardware accelerated
211 for all AES key sizes.
212 As of z196 the CTR mode is hardware accelerated for all AES
213 key sizes and XTS mode is hardware accelerated for 256 and
217 tristate "Pseudo random number generator device driver"
221 Select this option if you want to use the s390 pseudo random number
222 generator. The PRNG is part of the cryptographic processor functions
223 and uses triple-DES to generate secure random numbers like the
224 ANSI X9.17 standard. User-space programs access the
225 pseudo-random-number device through the char device /dev/prandom.
227 It is available as of z9.
229 config CRYPTO_GHASH_S390
230 tristate "GHASH hash function"
234 This is the s390 hardware accelerated implementation of GHASH,
235 the hash function used in GCM (Galois/Counter mode).
237 It is available as of z196.
239 config CRYPTO_CRC32_S390
240 tristate "CRC-32 algorithms"
245 Select this option if you want to use hardware accelerated
246 implementations of CRC algorithms. With this option, you
247 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248 and CRC-32C (Castagnoli).
250 It is available with IBM z13 or later.
252 config CRYPTO_DEV_NIAGARA2
253 tristate "Niagara2 Stream Processing Unit driver"
254 select CRYPTO_LIB_DES
255 select CRYPTO_SKCIPHER
262 Each core of a Niagara2 processor contains a Stream
263 Processing Unit, which itself contains several cryptographic
264 sub-units. One set provides the Modular Arithmetic Unit,
265 used for SSL offload. The other set provides the Cipher
266 Group, which can perform encryption, decryption, hashing,
267 checksumming, and raw copies.
269 config CRYPTO_DEV_SL3516
270 tristate "Storlink SL3516 crypto offloader"
271 depends on ARCH_GEMINI || COMPILE_TEST
272 depends on HAS_IOMEM && PM
273 select CRYPTO_SKCIPHER
279 This option allows you to have support for SL3516 crypto offloader.
281 config CRYPTO_DEV_SL3516_DEBUG
282 bool "Enable SL3516 stats"
283 depends on CRYPTO_DEV_SL3516
286 Say y to enable SL3516 debug stats.
287 This will create /sys/kernel/debug/sl3516/stats for displaying
288 the number of requests per algorithm and other internal stats.
290 config CRYPTO_DEV_HIFN_795X
291 tristate "Driver HIFN 795x crypto accelerator chips"
292 select CRYPTO_LIB_DES
293 select CRYPTO_SKCIPHER
294 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
296 depends on !ARCH_DMA_ADDR_T_64BIT
298 This option allows you to have support for HIFN 795x crypto adapters.
300 config CRYPTO_DEV_HIFN_795X_RNG
301 bool "HIFN 795x random number generator"
302 depends on CRYPTO_DEV_HIFN_795X
304 Select this option if you want to enable the random number generator
305 on the HIFN 795x crypto adapters.
307 source "drivers/crypto/caam/Kconfig"
309 config CRYPTO_DEV_TALITOS
310 tristate "Talitos Freescale Security Engine (SEC)"
312 select CRYPTO_AUTHENC
313 select CRYPTO_SKCIPHER
315 select CRYPTO_LIB_DES
319 Say 'Y' here to use the Freescale Security Engine (SEC)
320 to offload cryptographic algorithm computation.
322 The Freescale SEC is present on PowerQUICC 'E' processors, such
323 as the MPC8349E and MPC8548E.
325 To compile this driver as a module, choose M here: the module
326 will be called talitos.
328 config CRYPTO_DEV_TALITOS1
329 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
330 depends on CRYPTO_DEV_TALITOS
331 depends on PPC_8xx || PPC_82xx
334 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
335 found on MPC82xx or the Freescale Security Engine (SEC Lite)
336 version 1.2 found on MPC8xx
338 config CRYPTO_DEV_TALITOS2
339 bool "SEC2+ (SEC version 2.0 or upper)"
340 depends on CRYPTO_DEV_TALITOS
341 default y if !PPC_8xx
343 Say 'Y' here to use the Freescale Security Engine (SEC)
344 version 2 and following as found on MPC83xx, MPC85xx, etc ...
346 config CRYPTO_DEV_IXP4XX
347 tristate "Driver for IXP4xx crypto hardware acceleration"
348 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
354 select CRYPTO_LIB_DES
356 select CRYPTO_AUTHENC
357 select CRYPTO_SKCIPHER
359 Driver for the IXP4xx NPE crypto engine.
361 config CRYPTO_DEV_PPC4XX
362 tristate "Driver AMCC PPC4xx crypto accelerator"
363 depends on PPC && 4xx
367 select CRYPTO_LIB_AES
371 select CRYPTO_SKCIPHER
373 This option allows you to have support for AMCC crypto acceleration.
375 config HW_RANDOM_PPC4XX
376 bool "PowerPC 4xx generic true random number generator support"
377 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
380 This option provides the kernel-side support for the TRNG hardware
381 found in the security function of some PowerPC 4xx SoCs.
383 config CRYPTO_DEV_OMAP
384 tristate "Support for OMAP crypto HW accelerators"
385 depends on ARCH_OMAP2PLUS
387 OMAP processors have various crypto HW accelerators. Select this if
388 you want to use the OMAP modules for any of the crypto algorithms.
392 config CRYPTO_DEV_OMAP_SHAM
393 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
394 depends on ARCH_OMAP2PLUS
402 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
403 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
405 config CRYPTO_DEV_OMAP_AES
406 tristate "Support for OMAP AES hw engine"
407 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
409 select CRYPTO_SKCIPHER
416 OMAP processors have AES module accelerator. Select this if you
417 want to use the OMAP module for AES algorithms.
419 config CRYPTO_DEV_OMAP_DES
420 tristate "Support for OMAP DES/3DES hw engine"
421 depends on ARCH_OMAP2PLUS
422 select CRYPTO_LIB_DES
423 select CRYPTO_SKCIPHER
426 OMAP processors have DES/3DES module accelerator. Select this if you
427 want to use the OMAP module for DES and 3DES algorithms. Currently
428 the ECB and CBC modes of operation are supported by the driver. Also
429 accesses made on unaligned boundaries are supported.
431 endif # CRYPTO_DEV_OMAP
433 config CRYPTO_DEV_PICOXCELL
434 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
435 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
438 select CRYPTO_AUTHENC
439 select CRYPTO_SKCIPHER
440 select CRYPTO_LIB_DES
445 This option enables support for the hardware offload engines in the
446 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
447 and for 3gpp Layer 2 ciphering support.
449 Saying m here will build a module named picoxcell_crypto.
451 config CRYPTO_DEV_SAHARA
452 tristate "Support for SAHARA crypto accelerator"
453 depends on ARCH_MXC && OF
454 select CRYPTO_SKCIPHER
458 This option enables support for the SAHARA HW crypto accelerator
459 found in some Freescale i.MX chips.
461 config CRYPTO_DEV_EXYNOS_RNG
462 tristate "Exynos HW pseudo random number generator support"
463 depends on ARCH_EXYNOS || COMPILE_TEST
467 This driver provides kernel-side support through the
468 cryptographic API for the pseudo random number generator hardware
469 found on Exynos SoCs.
471 To compile this driver as a module, choose M here: the
472 module will be called exynos-rng.
476 config CRYPTO_DEV_S5P
477 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
478 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
481 select CRYPTO_SKCIPHER
483 This option allows you to have support for S5P crypto acceleration.
484 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
485 algorithms execution.
487 config CRYPTO_DEV_EXYNOS_HASH
488 bool "Support for Samsung Exynos HASH accelerator"
489 depends on CRYPTO_DEV_S5P
490 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
495 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
496 This will select software SHA1, MD5 and SHA256 as they are
497 needed for small and zero-size messages.
498 HASH algorithms will be disabled if EXYNOS_RNG
499 is enabled due to hw conflict.
502 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
505 This enables support for the NX hardware cryptographic accelerator
506 coprocessor that is in IBM PowerPC P7+ or later processors. This
507 does not actually enable any drivers, it only allows you to select
508 which acceleration type (encryption and/or compression) to enable.
511 source "drivers/crypto/nx/Kconfig"
514 config CRYPTO_DEV_UX500
515 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
516 depends on ARCH_U8500
518 Driver for ST-Ericsson UX500 crypto engine.
521 source "drivers/crypto/ux500/Kconfig"
522 endif # if CRYPTO_DEV_UX500
524 config CRYPTO_DEV_ATMEL_AUTHENC
525 bool "Support for Atmel IPSEC/SSL hw accelerator"
526 depends on ARCH_AT91 || COMPILE_TEST
527 depends on CRYPTO_DEV_ATMEL_AES
529 Some Atmel processors can combine the AES and SHA hw accelerators
530 to enhance support of IPSEC/SSL.
531 Select this if you want to use the Atmel modules for
532 authenc(hmac(shaX),Y(cbc)) algorithms.
534 config CRYPTO_DEV_ATMEL_AES
535 tristate "Support for Atmel AES hw accelerator"
536 depends on ARCH_AT91 || COMPILE_TEST
539 select CRYPTO_SKCIPHER
540 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
541 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
543 Some Atmel processors have AES hw accelerator.
544 Select this if you want to use the Atmel module for
547 To compile this driver as a module, choose M here: the module
548 will be called atmel-aes.
550 config CRYPTO_DEV_ATMEL_TDES
551 tristate "Support for Atmel DES/TDES hw accelerator"
552 depends on ARCH_AT91 || COMPILE_TEST
553 select CRYPTO_LIB_DES
554 select CRYPTO_SKCIPHER
556 Some Atmel processors have DES/TDES hw accelerator.
557 Select this if you want to use the Atmel module for
560 To compile this driver as a module, choose M here: the module
561 will be called atmel-tdes.
563 config CRYPTO_DEV_ATMEL_SHA
564 tristate "Support for Atmel SHA hw accelerator"
565 depends on ARCH_AT91 || COMPILE_TEST
568 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
570 Select this if you want to use the Atmel module for
571 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
573 To compile this driver as a module, choose M here: the module
574 will be called atmel-sha.
576 config CRYPTO_DEV_ATMEL_I2C
580 config CRYPTO_DEV_ATMEL_ECC
581 tristate "Support for Microchip / Atmel ECC hw accelerator"
583 select CRYPTO_DEV_ATMEL_I2C
587 Microhip / Atmel ECC hw accelerator.
588 Select this if you want to use the Microchip / Atmel module for
591 To compile this driver as a module, choose M here: the module
592 will be called atmel-ecc.
594 config CRYPTO_DEV_ATMEL_SHA204A
595 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
597 select CRYPTO_DEV_ATMEL_I2C
601 Microhip / Atmel SHA accelerator and RNG.
602 Select this if you want to use the Microchip / Atmel SHA204A
603 module as a random number generator. (Other functions of the
604 chip are currently not exposed by this driver)
606 To compile this driver as a module, choose M here: the module
607 will be called atmel-sha204a.
609 config CRYPTO_DEV_CCP
610 bool "Support for AMD Secure Processor"
611 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
613 The AMD Secure Processor provides support for the Cryptographic Coprocessor
614 (CCP) and the Platform Security Processor (PSP) devices.
617 source "drivers/crypto/ccp/Kconfig"
620 config CRYPTO_DEV_MXS_DCP
621 tristate "Support for Freescale MXS DCP"
622 depends on (ARCH_MXS || ARCH_MXC)
627 select CRYPTO_SKCIPHER
630 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
631 co-processor on the die.
633 To compile this driver as a module, choose M here: the module
634 will be called mxs-dcp.
636 source "drivers/crypto/qat/Kconfig"
637 source "drivers/crypto/cavium/cpt/Kconfig"
638 source "drivers/crypto/cavium/nitrox/Kconfig"
639 source "drivers/crypto/marvell/Kconfig"
641 config CRYPTO_DEV_CAVIUM_ZIP
642 tristate "Cavium ZIP driver"
643 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
645 Select this option if you want to enable compression/decompression
646 acceleration on Cavium's ARM based SoCs
648 config CRYPTO_DEV_QCE
649 tristate "Qualcomm crypto engine accelerator"
650 depends on ARCH_QCOM || COMPILE_TEST
653 This driver supports Qualcomm crypto engine accelerator
654 hardware. To compile this driver as a module, choose M here. The
655 module will be called qcrypto.
657 config CRYPTO_DEV_QCE_SKCIPHER
659 depends on CRYPTO_DEV_QCE
661 select CRYPTO_LIB_DES
666 select CRYPTO_SKCIPHER
668 config CRYPTO_DEV_QCE_SHA
670 depends on CRYPTO_DEV_QCE
674 config CRYPTO_DEV_QCE_AEAD
676 depends on CRYPTO_DEV_QCE
677 select CRYPTO_AUTHENC
678 select CRYPTO_LIB_DES
681 prompt "Algorithms enabled for QCE acceleration"
682 default CRYPTO_DEV_QCE_ENABLE_ALL
683 depends on CRYPTO_DEV_QCE
685 This option allows to choose whether to build support for all algorithms
686 (default), hashes-only, or skciphers-only.
688 The QCE engine does not appear to scale as well as the CPU to handle
689 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
690 QCE handles only 2 requests in parallel.
692 Ipsec throughput seems to improve when disabling either family of
693 algorithms, sharing the load with the CPU. Enabling skciphers-only
694 appears to work best.
696 config CRYPTO_DEV_QCE_ENABLE_ALL
697 bool "All supported algorithms"
698 select CRYPTO_DEV_QCE_SKCIPHER
699 select CRYPTO_DEV_QCE_SHA
700 select CRYPTO_DEV_QCE_AEAD
702 Enable all supported algorithms:
703 - AES (CBC, CTR, ECB, XTS)
707 - SHA256, HMAC-SHA256
709 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
710 bool "Symmetric-key ciphers only"
711 select CRYPTO_DEV_QCE_SKCIPHER
713 Enable symmetric-key ciphers only:
714 - AES (CBC, CTR, ECB, XTS)
718 config CRYPTO_DEV_QCE_ENABLE_SHA
719 bool "Hash/HMAC only"
720 select CRYPTO_DEV_QCE_SHA
722 Enable hashes/HMAC algorithms only:
724 - SHA256, HMAC-SHA256
726 config CRYPTO_DEV_QCE_ENABLE_AEAD
727 bool "AEAD algorithms only"
728 select CRYPTO_DEV_QCE_AEAD
730 Enable AEAD algorithms only:
736 config CRYPTO_DEV_QCE_SW_MAX_LEN
737 int "Default maximum request size to use software for AES"
738 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
741 This sets the default maximum request size to perform AES requests
742 using software instead of the crypto engine. It can be changed by
743 setting the aes_sw_max_len parameter.
745 Small blocks are processed faster in software than hardware.
746 Considering the 256-bit ciphers, software is 2-3 times faster than
747 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
748 With 128-bit keys, the break-even point would be around 1024-bytes.
750 The default is set a little lower, to 512 bytes, to balance the
751 cost in CPU usage. The minimum recommended setting is 16-bytes
752 (1 AES block), since AES-GCM will fail if you set it lower.
753 Setting this to zero will send all requests to the hardware.
755 Note that 192-bit keys are not supported by the hardware and are
756 always processed by the software fallback, and all DES requests
757 are done by the hardware.
759 config CRYPTO_DEV_QCOM_RNG
760 tristate "Qualcomm Random Number Generator Driver"
761 depends on ARCH_QCOM || COMPILE_TEST
764 This driver provides support for the Random Number
765 Generator hardware found on Qualcomm SoCs.
767 To compile this driver as a module, choose M here. The
768 module will be called qcom-rng. If unsure, say N.
770 config CRYPTO_DEV_VMX
771 bool "Support for VMX cryptographic acceleration instructions"
772 depends on PPC64 && VSX
774 Support for VMX cryptographic acceleration instructions.
776 source "drivers/crypto/vmx/Kconfig"
778 config CRYPTO_DEV_IMGTEC_HASH
779 tristate "Imagination Technologies hardware hash accelerator"
780 depends on MIPS || COMPILE_TEST
786 This driver interfaces with the Imagination Technologies
787 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
790 config CRYPTO_DEV_ROCKCHIP
791 tristate "Rockchip's Cryptographic Engine driver"
792 depends on OF && ARCH_ROCKCHIP
794 select CRYPTO_LIB_DES
799 select CRYPTO_SKCIPHER
802 This driver interfaces with the hardware crypto accelerator.
803 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
805 config CRYPTO_DEV_ZYNQMP_AES
806 tristate "Support for Xilinx ZynqMP AES hw accelerator"
807 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
812 Xilinx ZynqMP has AES-GCM engine used for symmetric key
813 encryption and decryption. This driver interfaces with AES hw
814 accelerator. Select this if you want to use the ZynqMP module
817 config CRYPTO_DEV_MEDIATEK
818 tristate "MediaTek's EIP97 Cryptographic Engine driver"
819 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
820 select CRYPTO_LIB_AES
822 select CRYPTO_SKCIPHER
828 This driver allows you to utilize the hardware crypto accelerator
829 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
830 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
832 source "drivers/crypto/chelsio/Kconfig"
834 source "drivers/crypto/virtio/Kconfig"
836 config CRYPTO_DEV_BCM_SPU
837 tristate "Broadcom symmetric crypto/hash acceleration support"
838 depends on ARCH_BCM_IPROC
841 select CRYPTO_AUTHENC
842 select CRYPTO_LIB_DES
848 This driver provides support for Broadcom crypto acceleration using the
849 Secure Processing Unit (SPU). The SPU driver registers skcipher,
850 ahash, and aead algorithms with the kernel cryptographic API.
852 source "drivers/crypto/stm32/Kconfig"
854 config CRYPTO_DEV_SAFEXCEL
855 tristate "Inside Secure's SafeXcel cryptographic engine driver"
856 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
857 select CRYPTO_LIB_AES
858 select CRYPTO_AUTHENC
859 select CRYPTO_SKCIPHER
860 select CRYPTO_LIB_DES
867 select CRYPTO_CHACHA20POLY1305
870 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
871 engines designed by Inside Secure. It currently accelerates DES, 3DES and
872 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
873 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
874 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
876 config CRYPTO_DEV_ARTPEC6
877 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
878 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
883 select CRYPTO_SKCIPHER
890 Enables the driver for the on-chip crypto accelerator
893 To compile this driver as a module, choose M here.
895 config CRYPTO_DEV_CCREE
896 tristate "Support for ARM TrustZone CryptoCell family of security processors"
897 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
900 select CRYPTO_SKCIPHER
901 select CRYPTO_LIB_DES
903 select CRYPTO_AUTHENC
917 Say 'Y' to enable a driver for the REE interface of the Arm
918 TrustZone CryptoCell family of processors. Currently the
919 CryptoCell 713, 703, 712, 710 and 630 are supported.
920 Choose this if you wish to use hardware acceleration of
921 cryptographic operations on the system REE.
924 source "drivers/crypto/hisilicon/Kconfig"
926 source "drivers/crypto/amlogic/Kconfig"
928 config CRYPTO_DEV_SA2UL
929 tristate "Support for TI security accelerator"
930 depends on ARCH_K3 || COMPILE_TEST
933 select CRYPTO_AES_ARM64
935 select CRYPTO_AUTHENC
942 K3 devices include a security accelerator engine that may be
943 used for crypto offload. Select this if you want to use hardware
944 acceleration for cryptographic algorithms on these devices.
946 source "drivers/crypto/keembay/Kconfig"