drivers/cpufreq/tegra20-cpufreq.c

   1 /*
   2  * Copyright (C) 2010 Google, Inc.
   3  *
   4  * Author:
   5  *      Colin Cross <ccross@google.com>
   6  *      Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
   7  *
   8  * This software is licensed under the terms of the GNU General Public
   9  * License version 2, as published by the Free Software Foundation, and
  10  * may be copied, distributed, and modified under those terms.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <linux/clk.h>
  20 #include <linux/cpufreq.h>
  21 #include <linux/err.h>
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/types.h>
  25
  26 static struct cpufreq_frequency_table freq_table[] = {
  27         { .frequency = 216000 },
  28         { .frequency = 312000 },
  29         { .frequency = 456000 },
  30         { .frequency = 608000 },
  31         { .frequency = 760000 },
  32         { .frequency = 816000 },
  33         { .frequency = 912000 },
  34         { .frequency = 1000000 },
  35         { .frequency = CPUFREQ_TABLE_END },
  36 };
  37
  38 #define NUM_CPUS        2
  39
  40 static struct clk *cpu_clk;
  41 static struct clk *pll_x_clk;
  42 static struct clk *pll_p_clk;
  43 static bool pll_x_prepared;
  44
  45 static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
  46                                            unsigned int index)
  47 {
  48         unsigned int ifreq = clk_get_rate(pll_p_clk) / 1000;
  49
  50         /*
  51          * Don't switch to intermediate freq if:
  52          * - we are already at it, i.e. policy->cur == ifreq
  53          * - index corresponds to ifreq
  54          */
  55         if ((freq_table[index].frequency == ifreq) || (policy->cur == ifreq))
  56                 return 0;
  57
  58         return ifreq;
  59 }
  60
  61 static int tegra_target_intermediate(struct cpufreq_policy *policy,
  62                                      unsigned int index)
  63 {
  64         int ret;
  65
  66         /*
  67          * Take an extra reference to the main pll so it doesn't turn
  68          * off when we move the cpu off of it as enabling it again while we
  69          * switch to it from tegra_target() would take additional time.
  70          *
  71          * When target-freq is equal to intermediate freq we don't need to
  72          * switch to an intermediate freq and so this routine isn't called.
  73          * Also, we wouldn't be using pll_x anymore and must not take extra
  74          * reference to it, as it can be disabled now to save some power.
  75          */
  76         clk_prepare_enable(pll_x_clk);
  77
  78         ret = clk_set_parent(cpu_clk, pll_p_clk);
  79         if (ret)
  80                 clk_disable_unprepare(pll_x_clk);
  81         else
  82                 pll_x_prepared = true;
  83
  84         return ret;
  85 }
  86
  87 static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
  88 {
  89         unsigned long rate = freq_table[index].frequency;
  90         unsigned int ifreq = clk_get_rate(pll_p_clk) / 1000;
  91         int ret = 0;
  92
  93         /*
  94          * target freq == pll_p, don't need to take extra reference to pll_x_clk
  95          * as it isn't used anymore.
  96          */
  97         if (rate == ifreq)
  98                 return clk_set_parent(cpu_clk, pll_p_clk);
  99
 100         ret = clk_set_rate(pll_x_clk, rate * 1000);
 101         /* Restore to earlier frequency on error, i.e. pll_x */
 102         if (ret)
 103                 pr_err("Failed to change pll_x to %lu\n", rate);
 104
 105         ret = clk_set_parent(cpu_clk, pll_x_clk);
 106         /* This shouldn't fail while changing or restoring */
 107         WARN_ON(ret);
 108
 109         /*
 110          * Drop count to pll_x clock only if we switched to intermediate freq
 111          * earlier while transitioning to a target frequency.
 112          */
 113         if (pll_x_prepared) {
 114                 clk_disable_unprepare(pll_x_clk);
 115                 pll_x_prepared = false;
 116         }
 117
 118         return ret;
 119 }
 120
 121 static int tegra_cpu_init(struct cpufreq_policy *policy)
 122 {
 123         int ret;
 124
 125         if (policy->cpu >= NUM_CPUS)
 126                 return -EINVAL;
 127
 128         clk_prepare_enable(cpu_clk);
 129
 130         /* FIXME: what's the actual transition time? */
 131         ret = cpufreq_generic_init(policy, freq_table, 300 * 1000);
 132         if (ret) {
 133                 clk_disable_unprepare(cpu_clk);
 134                 return ret;
 135         }
 136
 137         policy->clk = cpu_clk;
 138         policy->suspend_freq = freq_table[0].frequency;
 139         return 0;
 140 }
 141
 142 static int tegra_cpu_exit(struct cpufreq_policy *policy)
 143 {
 144         clk_disable_unprepare(cpu_clk);
 145         return 0;
 146 }
 147
 148 static struct cpufreq_driver tegra_cpufreq_driver = {
 149         .flags                  = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 150         .verify                 = cpufreq_generic_frequency_table_verify,
 151         .get_intermediate       = tegra_get_intermediate,
 152         .target_intermediate    = tegra_target_intermediate,
 153         .target_index           = tegra_target,
 154         .get                    = cpufreq_generic_get,
 155         .init                   = tegra_cpu_init,
 156         .exit                   = tegra_cpu_exit,
 157         .name                   = "tegra",
 158         .attr                   = cpufreq_generic_attr,
 159         .suspend                = cpufreq_generic_suspend,
 160 };
 161
 162 static int __init tegra_cpufreq_init(void)
 163 {
 164         int err;
 165
 166         cpu_clk = clk_get_sys(NULL, "cclk");
 167         if (IS_ERR(cpu_clk))
 168                 return PTR_ERR(cpu_clk);
 169
 170         pll_x_clk = clk_get_sys(NULL, "pll_x");
 171         if (IS_ERR(pll_x_clk)) {
 172                 err = PTR_ERR(pll_x_clk);
 173                 goto put_cpu;
 174         }
 175
 176         pll_p_clk = clk_get_sys(NULL, "pll_p");
 177         if (IS_ERR(pll_p_clk)) {
 178                 err = PTR_ERR(pll_p_clk);
 179                 goto put_pll_x;
 180         }
 181
 182         err = cpufreq_register_driver(&tegra_cpufreq_driver);
 183         if (err)
 184                 goto put_pll_p;
 185
 186         return 0;
 187
 188 put_pll_p:
 189         clk_put(pll_p_clk);
 190 put_pll_x:
 191         clk_put(pll_x_clk);
 192 put_cpu:
 193         clk_put(cpu_clk);
 194
 195         return err;
 196 }
 197
 198 static void __exit tegra_cpufreq_exit(void)
 199 {
 200         cpufreq_unregister_driver(&tegra_cpufreq_driver);
 201         clk_put(pll_p_clk);
 202         clk_put(pll_x_clk);
 203         clk_put(cpu_clk);
 204 }
 205
 206 MODULE_AUTHOR("Colin Cross <ccross@android.com>");
 207 MODULE_DESCRIPTION("NVIDIA Tegra20 cpufreq driver");
 208 MODULE_LICENSE("GPL");
 209 module_init(tegra_cpufreq_init);
 210 module_exit(tegra_cpufreq_exit);