1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
7 * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
8 * the CPU frequency subset and voltage value of each OPP varies
9 * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
10 * defines the voltage and frequency value based on the msm-id in SMEM
11 * and speedbin blown in the efuse combination.
12 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
13 * to provide the OPP framework with required information.
14 * This is used to determine the voltage and frequency value for each OPP of
15 * operating-points-v2 table when it is parsed by the OPP framework.
18 #include <linux/cpu.h>
19 #include <linux/err.h>
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/nvmem-consumer.h>
25 #include <linux/of_device.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_domain.h>
28 #include <linux/pm_opp.h>
29 #include <linux/slab.h>
30 #include <linux/soc/qcom/smem.h>
32 #define MSM_ID_SMEM 137
41 enum _msm8996_version {
44 NUM_OF_MSM8996_VERSIONS,
47 struct qcom_cpufreq_drv;
49 struct qcom_cpufreq_match_data {
50 int (*get_version)(struct device *cpu_dev,
51 struct nvmem_cell *speedbin_nvmem,
52 struct qcom_cpufreq_drv *drv);
53 const char **genpd_names;
56 struct qcom_cpufreq_drv {
57 struct opp_table **opp_tables;
58 struct opp_table **genpd_opp_tables;
60 const struct qcom_cpufreq_match_data *data;
63 static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
65 static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
69 enum _msm8996_version version;
71 msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
73 return NUM_OF_MSM8996_VERSIONS;
75 /* The first 4 bytes are format, next to them is the actual msm-id */
78 switch ((enum _msm_id)*msm_id) {
88 version = NUM_OF_MSM8996_VERSIONS;
94 static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
95 struct nvmem_cell *speedbin_nvmem,
96 struct qcom_cpufreq_drv *drv)
100 enum _msm8996_version msm8996_version;
102 msm8996_version = qcom_cpufreq_get_msm_id();
103 if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
104 dev_err(cpu_dev, "Not Snapdragon 820/821!");
108 speedbin = nvmem_cell_read(speedbin_nvmem, &len);
109 if (IS_ERR(speedbin))
110 return PTR_ERR(speedbin);
112 switch (msm8996_version) {
114 drv->versions = 1 << (unsigned int)(*speedbin);
117 drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
128 static const struct qcom_cpufreq_match_data match_data_kryo = {
129 .get_version = qcom_cpufreq_kryo_name_version,
132 static const char *qcs404_genpd_names[] = { "cpr", NULL };
134 static const struct qcom_cpufreq_match_data match_data_qcs404 = {
135 .genpd_names = qcs404_genpd_names,
138 static int qcom_cpufreq_probe(struct platform_device *pdev)
140 struct qcom_cpufreq_drv *drv;
141 struct nvmem_cell *speedbin_nvmem;
142 struct device_node *np;
143 struct device *cpu_dev;
145 const struct of_device_id *match;
148 cpu_dev = get_cpu_device(0);
152 np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
156 ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
162 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
166 match = pdev->dev.platform_data;
167 drv->data = match->data;
173 if (drv->data->get_version) {
174 speedbin_nvmem = of_nvmem_cell_get(np, NULL);
175 if (IS_ERR(speedbin_nvmem)) {
176 if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
178 "Could not get nvmem cell: %ld\n",
179 PTR_ERR(speedbin_nvmem));
180 ret = PTR_ERR(speedbin_nvmem);
184 ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv);
186 nvmem_cell_put(speedbin_nvmem);
189 nvmem_cell_put(speedbin_nvmem);
193 drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables),
195 if (!drv->opp_tables) {
200 drv->genpd_opp_tables = kcalloc(num_possible_cpus(),
201 sizeof(*drv->genpd_opp_tables),
203 if (!drv->genpd_opp_tables) {
208 for_each_possible_cpu(cpu) {
209 cpu_dev = get_cpu_device(cpu);
210 if (NULL == cpu_dev) {
215 if (drv->data->get_version) {
216 drv->opp_tables[cpu] =
217 dev_pm_opp_set_supported_hw(cpu_dev,
219 if (IS_ERR(drv->opp_tables[cpu])) {
220 ret = PTR_ERR(drv->opp_tables[cpu]);
222 "Failed to set supported hardware\n");
227 if (drv->data->genpd_names) {
228 drv->genpd_opp_tables[cpu] =
229 dev_pm_opp_attach_genpd(cpu_dev,
230 drv->data->genpd_names,
232 if (IS_ERR(drv->genpd_opp_tables[cpu])) {
233 ret = PTR_ERR(drv->genpd_opp_tables[cpu]);
234 if (ret != -EPROBE_DEFER)
236 "Could not attach to pm_domain: %d\n",
243 cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
245 if (!IS_ERR(cpufreq_dt_pdev)) {
246 platform_set_drvdata(pdev, drv);
250 ret = PTR_ERR(cpufreq_dt_pdev);
251 dev_err(cpu_dev, "Failed to register platform device\n");
254 for_each_possible_cpu(cpu) {
255 if (IS_ERR_OR_NULL(drv->genpd_opp_tables[cpu]))
257 dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
259 kfree(drv->genpd_opp_tables);
261 for_each_possible_cpu(cpu) {
262 if (IS_ERR_OR_NULL(drv->opp_tables[cpu]))
264 dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
266 kfree(drv->opp_tables);
273 static int qcom_cpufreq_remove(struct platform_device *pdev)
275 struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev);
278 platform_device_unregister(cpufreq_dt_pdev);
280 for_each_possible_cpu(cpu) {
281 if (drv->opp_tables[cpu])
282 dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
283 if (drv->genpd_opp_tables[cpu])
284 dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
287 kfree(drv->opp_tables);
288 kfree(drv->genpd_opp_tables);
294 static struct platform_driver qcom_cpufreq_driver = {
295 .probe = qcom_cpufreq_probe,
296 .remove = qcom_cpufreq_remove,
298 .name = "qcom-cpufreq-nvmem",
302 static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
303 { .compatible = "qcom,apq8096", .data = &match_data_kryo },
304 { .compatible = "qcom,msm8996", .data = &match_data_kryo },
305 { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
310 * Since the driver depends on smem and nvmem drivers, which may
311 * return EPROBE_DEFER, all the real activity is done in the probe,
312 * which may be defered as well. The init here is only registering
313 * the driver and the platform device.
315 static int __init qcom_cpufreq_init(void)
317 struct device_node *np = of_find_node_by_path("/");
318 const struct of_device_id *match;
324 match = of_match_node(qcom_cpufreq_match_list, np);
329 ret = platform_driver_register(&qcom_cpufreq_driver);
330 if (unlikely(ret < 0))
333 cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
334 -1, match, sizeof(*match));
335 ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
339 platform_driver_unregister(&qcom_cpufreq_driver);
342 module_init(qcom_cpufreq_init);
344 static void __exit qcom_cpufreq_exit(void)
346 platform_device_unregister(cpufreq_pdev);
347 platform_driver_unregister(&qcom_cpufreq_driver);
349 module_exit(qcom_cpufreq_exit);
351 MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
352 MODULE_LICENSE("GPL v2");