drivers/cpufreq/qcom-cpufreq-hw.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2018, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #include <linux/bitfield.h>
   7 #include <linux/cpufreq.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/module.h>
  11 #include <linux/of_address.h>
  12 #include <linux/of_platform.h>
  13 #include <linux/pm_opp.h>
  14 #include <linux/slab.h>
  15
  16 #define LUT_MAX_ENTRIES                 40U
  17 #define LUT_SRC                         GENMASK(31, 30)
  18 #define LUT_L_VAL                       GENMASK(7, 0)
  19 #define LUT_CORE_COUNT                  GENMASK(18, 16)
  20 #define LUT_VOLT                        GENMASK(11, 0)
  21 #define LUT_ROW_SIZE                    32
  22 #define CLK_HW_DIV                      2
  23 #define LUT_TURBO_IND                   1
  24
  25 /* Register offsets */
  26 #define REG_ENABLE                      0x0
  27 #define REG_FREQ_LUT                    0x110
  28 #define REG_VOLT_LUT                    0x114
  29 #define REG_PERF_STATE                  0x920
  30
  31 static unsigned long cpu_hw_rate, xo_rate;
  32 static struct platform_device *global_pdev;
  33
  34 static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
  35                                         unsigned int index)
  36 {
  37         void __iomem *perf_state_reg = policy->driver_data;
  38         unsigned long freq = policy->freq_table[index].frequency;
  39
  40         writel_relaxed(index, perf_state_reg);
  41
  42         arch_set_freq_scale(policy->related_cpus, freq,
  43                             policy->cpuinfo.max_freq);
  44         return 0;
  45 }
  46
  47 static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)
  48 {
  49         void __iomem *perf_state_reg;
  50         struct cpufreq_policy *policy;
  51         unsigned int index;
  52
  53         policy = cpufreq_cpu_get_raw(cpu);
  54         if (!policy)
  55                 return 0;
  56
  57         perf_state_reg = policy->driver_data;
  58
  59         index = readl_relaxed(perf_state_reg);
  60         index = min(index, LUT_MAX_ENTRIES - 1);
  61
  62         return policy->freq_table[index].frequency;
  63 }
  64
  65 static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
  66                                                 unsigned int target_freq)
  67 {
  68         void __iomem *perf_state_reg = policy->driver_data;
  69         int index;
  70         unsigned long freq;
  71
  72         index = policy->cached_resolved_idx;
  73         if (index < 0)
  74                 return 0;
  75
  76         writel_relaxed(index, perf_state_reg);
  77
  78         freq = policy->freq_table[index].frequency;
  79         arch_set_freq_scale(policy->related_cpus, freq,
  80                             policy->cpuinfo.max_freq);
  81
  82         return freq;
  83 }
  84
  85 static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
  86                                     struct cpufreq_policy *policy,
  87                                     void __iomem *base)
  88 {
  89         u32 data, src, lval, i, core_count, prev_freq = 0, freq;
  90         u32 volt;
  91         struct cpufreq_frequency_table  *table;
  92
  93         table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL);
  94         if (!table)
  95                 return -ENOMEM;
  96
  97         for (i = 0; i < LUT_MAX_ENTRIES; i++) {
  98                 data = readl_relaxed(base + REG_FREQ_LUT +
  99                                       i * LUT_ROW_SIZE);
 100                 src = FIELD_GET(LUT_SRC, data);
 101                 lval = FIELD_GET(LUT_L_VAL, data);
 102                 core_count = FIELD_GET(LUT_CORE_COUNT, data);
 103
 104                 data = readl_relaxed(base + REG_VOLT_LUT +
 105                                       i * LUT_ROW_SIZE);
 106                 volt = FIELD_GET(LUT_VOLT, data) * 1000;
 107
 108                 if (src)
 109                         freq = xo_rate * lval / 1000;
 110                 else
 111                         freq = cpu_hw_rate / 1000;
 112
 113                 if (freq != prev_freq && core_count != LUT_TURBO_IND) {
 114                         table[i].frequency = freq;
 115                         dev_pm_opp_add(cpu_dev, freq * 1000, volt);
 116                         dev_dbg(cpu_dev, "index=%d freq=%d, core_count %d\n", i,
 117                                 freq, core_count);
 118                 } else if (core_count == LUT_TURBO_IND) {
 119                         table[i].frequency = CPUFREQ_ENTRY_INVALID;
 120                 }
 121
 122                 /*
 123                  * Two of the same frequencies with the same core counts means
 124                  * end of table
 125                  */
 126                 if (i > 0 && prev_freq == freq) {
 127                         struct cpufreq_frequency_table *prev = &table[i - 1];
 128
 129                         /*
 130                          * Only treat the last frequency that might be a boost
 131                          * as the boost frequency
 132                          */
 133                         if (prev->frequency == CPUFREQ_ENTRY_INVALID) {
 134                                 prev->frequency = prev_freq;
 135                                 prev->flags = CPUFREQ_BOOST_FREQ;
 136                                 dev_pm_opp_add(cpu_dev, prev_freq * 1000, volt);
 137                         }
 138
 139                         break;
 140                 }
 141
 142                 prev_freq = freq;
 143         }
 144
 145         table[i].frequency = CPUFREQ_TABLE_END;
 146         policy->freq_table = table;
 147         dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus);
 148
 149         return 0;
 150 }
 151
 152 static void qcom_get_related_cpus(int index, struct cpumask *m)
 153 {
 154         struct device_node *cpu_np;
 155         struct of_phandle_args args;
 156         int cpu, ret;
 157
 158         for_each_possible_cpu(cpu) {
 159                 cpu_np = of_cpu_device_node_get(cpu);
 160                 if (!cpu_np)
 161                         continue;
 162
 163                 ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
 164                                                  "#freq-domain-cells", 0,
 165                                                  &args);
 166                 of_node_put(cpu_np);
 167                 if (ret < 0)
 168                         continue;
 169
 170                 if (index == args.args[0])
 171                         cpumask_set_cpu(cpu, m);
 172         }
 173 }
 174
 175 static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
 176 {
 177         struct device *dev = &global_pdev->dev;
 178         struct of_phandle_args args;
 179         struct device_node *cpu_np;
 180         struct device *cpu_dev;
 181         struct resource *res;
 182         void __iomem *base;
 183         int ret, index;
 184
 185         cpu_dev = get_cpu_device(policy->cpu);
 186         if (!cpu_dev) {
 187                 pr_err("%s: failed to get cpu%d device\n", __func__,
 188                        policy->cpu);
 189                 return -ENODEV;
 190         }
 191
 192         cpu_np = of_cpu_device_node_get(policy->cpu);
 193         if (!cpu_np)
 194                 return -EINVAL;
 195
 196         ret = of_parse_phandle_with_args(cpu_np, "qcom,freq-domain",
 197                                          "#freq-domain-cells", 0, &args);
 198         of_node_put(cpu_np);
 199         if (ret)
 200                 return ret;
 201
 202         index = args.args[0];
 203
 204         res = platform_get_resource(global_pdev, IORESOURCE_MEM, index);
 205         if (!res)
 206                 return -ENODEV;
 207
 208         base = devm_ioremap(dev, res->start, resource_size(res));
 209         if (!base)
 210                 return -ENOMEM;
 211
 212         /* HW should be in enabled state to proceed */
 213         if (!(readl_relaxed(base + REG_ENABLE) & 0x1)) {
 214                 dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
 215                 ret = -ENODEV;
 216                 goto error;
 217         }
 218
 219         qcom_get_related_cpus(index, policy->cpus);
 220         if (!cpumask_weight(policy->cpus)) {
 221                 dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
 222                 ret = -ENOENT;
 223                 goto error;
 224         }
 225
 226         policy->driver_data = base + REG_PERF_STATE;
 227
 228         ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy, base);
 229         if (ret) {
 230                 dev_err(dev, "Domain-%d failed to read LUT\n", index);
 231                 goto error;
 232         }
 233
 234         ret = dev_pm_opp_get_opp_count(cpu_dev);
 235         if (ret <= 0) {
 236                 dev_err(cpu_dev, "Failed to add OPPs\n");
 237                 ret = -ENODEV;
 238                 goto error;
 239         }
 240
 241         dev_pm_opp_of_register_em(policy->cpus);
 242
 243         policy->fast_switch_possible = true;
 244
 245         return 0;
 246 error:
 247         devm_iounmap(dev, base);
 248         return ret;
 249 }
 250
 251 static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy)
 252 {
 253         struct device *cpu_dev = get_cpu_device(policy->cpu);
 254         void __iomem *base = policy->driver_data - REG_PERF_STATE;
 255
 256         dev_pm_opp_remove_all_dynamic(cpu_dev);
 257         kfree(policy->freq_table);
 258         devm_iounmap(&global_pdev->dev, base);
 259
 260         return 0;
 261 }
 262
 263 static struct freq_attr *qcom_cpufreq_hw_attr[] = {
 264         &cpufreq_freq_attr_scaling_available_freqs,
 265         &cpufreq_freq_attr_scaling_boost_freqs,
 266         NULL
 267 };
 268
 269 static struct cpufreq_driver cpufreq_qcom_hw_driver = {
 270         .flags          = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
 271                           CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
 272                           CPUFREQ_IS_COOLING_DEV,
 273         .verify         = cpufreq_generic_frequency_table_verify,
 274         .target_index   = qcom_cpufreq_hw_target_index,
 275         .get            = qcom_cpufreq_hw_get,
 276         .init           = qcom_cpufreq_hw_cpu_init,
 277         .exit           = qcom_cpufreq_hw_cpu_exit,
 278         .fast_switch    = qcom_cpufreq_hw_fast_switch,
 279         .name           = "qcom-cpufreq-hw",
 280         .attr           = qcom_cpufreq_hw_attr,
 281 };
 282
 283 static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
 284 {
 285         struct clk *clk;
 286         int ret;
 287
 288         clk = clk_get(&pdev->dev, "xo");
 289         if (IS_ERR(clk))
 290                 return PTR_ERR(clk);
 291
 292         xo_rate = clk_get_rate(clk);
 293         clk_put(clk);
 294
 295         clk = clk_get(&pdev->dev, "alternate");
 296         if (IS_ERR(clk))
 297                 return PTR_ERR(clk);
 298
 299         cpu_hw_rate = clk_get_rate(clk) / CLK_HW_DIV;
 300         clk_put(clk);
 301
 302         global_pdev = pdev;
 303
 304         ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
 305         if (ret)
 306                 dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
 307         else
 308                 dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n");
 309
 310         return ret;
 311 }
 312
 313 static int qcom_cpufreq_hw_driver_remove(struct platform_device *pdev)
 314 {
 315         return cpufreq_unregister_driver(&cpufreq_qcom_hw_driver);
 316 }
 317
 318 static const struct of_device_id qcom_cpufreq_hw_match[] = {
 319         { .compatible = "qcom,cpufreq-hw" },
 320         {}
 321 };
 322 MODULE_DEVICE_TABLE(of, qcom_cpufreq_hw_match);
 323
 324 static struct platform_driver qcom_cpufreq_hw_driver = {
 325         .probe = qcom_cpufreq_hw_driver_probe,
 326         .remove = qcom_cpufreq_hw_driver_remove,
 327         .driver = {
 328                 .name = "qcom-cpufreq-hw",
 329                 .of_match_table = qcom_cpufreq_hw_match,
 330         },
 331 };
 332
 333 static int __init qcom_cpufreq_hw_init(void)
 334 {
 335         return platform_driver_register(&qcom_cpufreq_hw_driver);
 336 }
 337 device_initcall(qcom_cpufreq_hw_init);
 338
 339 static void __exit qcom_cpufreq_hw_exit(void)
 340 {
 341         platform_driver_unregister(&qcom_cpufreq_hw_driver);
 342 }
 343 module_exit(qcom_cpufreq_hw_exit);
 344
 345 MODULE_DESCRIPTION("QCOM CPUFREQ HW Driver");
 346 MODULE_LICENSE("GPL v2");