1 // SPDX-License-Identifier: GPL-2.0-only
3 * (c) 2003-2012 Advanced Micro Devices, Inc.
6 * Andreas Herrmann <herrmann.der.user@googlemail.com>
8 * Based on the powernow-k7.c module written by Dave Jones.
9 * (C) 2003 Dave Jones on behalf of SuSE Labs
10 * (C) 2004 Dominik Brodowski <linux@brodo.de>
11 * (C) 2004 Pavel Machek <pavel@ucw.cz>
12 * Based upon datasheets & sample CPUs kindly provided by AMD.
14 * Valuable input gratefully received from Dave Jones, Pavel Machek,
15 * Dominik Brodowski, Jacob Shin, and others.
16 * Originally developed by Paul Devriendt.
18 * Processor information obtained from Chapter 9 (Power and Thermal
19 * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for
20 * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x
21 * Power Management" in BKDGs for newer AMD CPU families.
23 * Tables for specific CPUs can be inferred from AMD's processor
24 * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf)
27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 #include <linux/kernel.h>
30 #include <linux/smp.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/cpufreq.h>
34 #include <linux/slab.h>
35 #include <linux/string.h>
36 #include <linux/cpumask.h>
38 #include <linux/delay.h>
41 #include <asm/cpu_device_id.h>
43 #include <linux/acpi.h>
44 #include <linux/mutex.h>
45 #include <acpi/processor.h>
47 #define VERSION "version 2.20.00"
48 #include "powernow-k8.h"
50 /* serialize freq changes */
51 static DEFINE_MUTEX(fidvid_mutex);
53 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
55 static struct cpufreq_driver cpufreq_amd64_driver;
57 /* Return a frequency in MHz, given an input fid */
58 static u32 find_freq_from_fid(u32 fid)
60 return 800 + (fid * 100);
63 /* Return a frequency in KHz, given an input fid */
64 static u32 find_khz_freq_from_fid(u32 fid)
66 return 1000 * find_freq_from_fid(fid);
69 /* Return the vco fid for an input fid
71 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
72 * only from corresponding high fids. This returns "high" fid corresponding to
75 static u32 convert_fid_to_vco_fid(u32 fid)
77 if (fid < HI_FID_TABLE_BOTTOM)
84 * Return 1 if the pending bit is set. Unless we just instructed the processor
85 * to transition to a new state, seeing this bit set is really bad news.
87 static int pending_bit_stuck(void)
91 rdmsr(MSR_FIDVID_STATUS, lo, hi);
92 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
96 * Update the global current fid / vid values from the status msr.
99 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
106 pr_debug("detected change pending stuck\n");
109 rdmsr(MSR_FIDVID_STATUS, lo, hi);
110 } while (lo & MSR_S_LO_CHANGE_PENDING);
112 data->currvid = hi & MSR_S_HI_CURRENT_VID;
113 data->currfid = lo & MSR_S_LO_CURRENT_FID;
118 /* the isochronous relief time */
119 static void count_off_irt(struct powernow_k8_data *data)
121 udelay((1 << data->irt) * 10);
124 /* the voltage stabilization time */
125 static void count_off_vst(struct powernow_k8_data *data)
127 udelay(data->vstable * VST_UNITS_20US);
130 /* need to init the control msr to a safe value (for each cpu) */
131 static void fidvid_msr_init(void)
136 rdmsr(MSR_FIDVID_STATUS, lo, hi);
137 vid = hi & MSR_S_HI_CURRENT_VID;
138 fid = lo & MSR_S_LO_CURRENT_FID;
139 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
140 hi = MSR_C_HI_STP_GNT_BENIGN;
141 pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
142 wrmsr(MSR_FIDVID_CTL, lo, hi);
145 /* write the new fid value along with the other control fields to the msr */
146 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
149 u32 savevid = data->currvid;
152 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
153 pr_err("internal error - overflow on fid write\n");
158 lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
159 lo |= MSR_C_LO_INIT_FID_VID;
161 pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
162 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
165 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
167 pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n");
170 } while (query_current_values_with_pending_wait(data));
174 if (savevid != data->currvid) {
175 pr_err("vid change on fid trans, old 0x%x, new 0x%x\n",
176 savevid, data->currvid);
180 if (fid != data->currfid) {
181 pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid,
189 /* Write a new vid to the hardware */
190 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
193 u32 savefid = data->currfid;
196 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
197 pr_err("internal error - overflow on vid write\n");
202 lo |= (vid << MSR_C_LO_VID_SHIFT);
203 lo |= MSR_C_LO_INIT_FID_VID;
205 pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
206 vid, lo, STOP_GRANT_5NS);
209 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
211 pr_err("internal error - pending bit very stuck - no further pstate changes possible\n");
214 } while (query_current_values_with_pending_wait(data));
216 if (savefid != data->currfid) {
217 pr_err("fid changed on vid trans, old 0x%x new 0x%x\n",
218 savefid, data->currfid);
222 if (vid != data->currvid) {
223 pr_err("vid trans failed, vid 0x%x, curr 0x%x\n",
232 * Reduce the vid by the max of step or reqvid.
233 * Decreasing vid codes represent increasing voltages:
234 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
236 static int decrease_vid_code_by_step(struct powernow_k8_data *data,
237 u32 reqvid, u32 step)
239 if ((data->currvid - reqvid) > step)
240 reqvid = data->currvid - step;
242 if (write_new_vid(data, reqvid))
250 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
251 static int transition_fid_vid(struct powernow_k8_data *data,
252 u32 reqfid, u32 reqvid)
254 if (core_voltage_pre_transition(data, reqvid, reqfid))
257 if (core_frequency_transition(data, reqfid))
260 if (core_voltage_post_transition(data, reqvid))
263 if (query_current_values_with_pending_wait(data))
266 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
267 pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
269 reqfid, reqvid, data->currfid, data->currvid);
273 pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
274 smp_processor_id(), data->currfid, data->currvid);
279 /* Phase 1 - core voltage transition ... setup voltage */
280 static int core_voltage_pre_transition(struct powernow_k8_data *data,
281 u32 reqvid, u32 reqfid)
283 u32 rvosteps = data->rvo;
284 u32 savefid = data->currfid;
285 u32 maxvid, lo, rvomult = 1;
287 pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
289 data->currfid, data->currvid, reqvid, data->rvo);
291 if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
294 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
295 maxvid = 0x1f & (maxvid >> 16);
296 pr_debug("ph1 maxvid=0x%x\n", maxvid);
297 if (reqvid < maxvid) /* lower numbers are higher voltages */
300 while (data->currvid > reqvid) {
301 pr_debug("ph1: curr 0x%x, req vid 0x%x\n",
302 data->currvid, reqvid);
303 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
307 while ((rvosteps > 0) &&
308 ((rvomult * data->rvo + data->currvid) > reqvid)) {
309 if (data->currvid == maxvid) {
312 pr_debug("ph1: changing vid for rvo, req 0x%x\n",
314 if (decrease_vid_code_by_step(data, data->currvid-1, 1))
320 if (query_current_values_with_pending_wait(data))
323 if (savefid != data->currfid) {
324 pr_err("ph1 err, currfid changed 0x%x\n", data->currfid);
328 pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n",
329 data->currfid, data->currvid);
334 /* Phase 2 - core frequency transition */
335 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
337 u32 vcoreqfid, vcocurrfid, vcofiddiff;
338 u32 fid_interval, savevid = data->currvid;
340 if (data->currfid == reqfid) {
341 pr_err("ph2 null fid transition 0x%x\n", data->currfid);
345 pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
347 data->currfid, data->currvid, reqfid);
349 vcoreqfid = convert_fid_to_vco_fid(reqfid);
350 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
351 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
352 : vcoreqfid - vcocurrfid;
354 if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
357 while (vcofiddiff > 2) {
358 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
360 if (reqfid > data->currfid) {
361 if (data->currfid > LO_FID_TABLE_TOP) {
362 if (write_new_fid(data,
363 data->currfid + fid_interval))
368 2 + convert_fid_to_vco_fid(data->currfid)))
372 if (write_new_fid(data, data->currfid - fid_interval))
376 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
377 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
378 : vcoreqfid - vcocurrfid;
381 if (write_new_fid(data, reqfid))
384 if (query_current_values_with_pending_wait(data))
387 if (data->currfid != reqfid) {
388 pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
389 data->currfid, reqfid);
393 if (savevid != data->currvid) {
394 pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n",
395 savevid, data->currvid);
399 pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n",
400 data->currfid, data->currvid);
405 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
406 static int core_voltage_post_transition(struct powernow_k8_data *data,
409 u32 savefid = data->currfid;
410 u32 savereqvid = reqvid;
412 pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
414 data->currfid, data->currvid);
416 if (reqvid != data->currvid) {
417 if (write_new_vid(data, reqvid))
420 if (savefid != data->currfid) {
421 pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n",
422 savefid, data->currfid);
426 if (data->currvid != reqvid) {
427 pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x",
428 reqvid, data->currvid);
433 if (query_current_values_with_pending_wait(data))
436 if (savereqvid != data->currvid) {
437 pr_debug("ph3 failed, currvid 0x%x\n", data->currvid);
441 if (savefid != data->currfid) {
442 pr_debug("ph3 failed, currfid changed 0x%x\n",
447 pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n",
448 data->currfid, data->currvid);
453 static const struct x86_cpu_id powernow_k8_ids[] = {
454 /* IO based frequency switching */
455 { X86_VENDOR_AMD, 0xf },
458 MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);
460 static void check_supported_cpu(void *_rc)
462 u32 eax, ebx, ecx, edx;
467 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
469 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
470 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
471 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
472 pr_info("Processor cpuid %x not supported\n", eax);
476 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
477 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
478 pr_info("No frequency change capabilities detected\n");
482 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
483 if ((edx & P_STATE_TRANSITION_CAPABLE)
484 != P_STATE_TRANSITION_CAPABLE) {
485 pr_info("Power state transitions not supported\n");
492 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
498 for (j = 0; j < data->numps; j++) {
499 if (pst[j].vid > LEAST_VID) {
500 pr_err(FW_BUG "vid %d invalid : 0x%x\n", j,
504 if (pst[j].vid < data->rvo) {
506 pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j);
509 if (pst[j].vid < maxvid + data->rvo) {
510 /* vid + rvo >= maxvid */
511 pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j);
514 if (pst[j].fid > MAX_FID) {
515 pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j);
518 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
519 /* Only first fid is allowed to be in "low" range */
520 pr_err(FW_BUG "two low fids - %d : 0x%x\n", j,
524 if (pst[j].fid < lastfid)
525 lastfid = pst[j].fid;
528 pr_err(FW_BUG "lastfid invalid\n");
531 if (lastfid > LO_FID_TABLE_TOP)
532 pr_info(FW_BUG "first fid not from lo freq table\n");
537 static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
540 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
543 static void print_basics(struct powernow_k8_data *data)
546 for (j = 0; j < data->numps; j++) {
547 if (data->powernow_table[j].frequency !=
548 CPUFREQ_ENTRY_INVALID) {
549 pr_info("fid 0x%x (%d MHz), vid 0x%x\n",
550 data->powernow_table[j].driver_data & 0xff,
551 data->powernow_table[j].frequency/1000,
552 data->powernow_table[j].driver_data >> 8);
556 pr_info("Only %d pstates on battery\n", data->batps);
559 static int fill_powernow_table(struct powernow_k8_data *data,
560 struct pst_s *pst, u8 maxvid)
562 struct cpufreq_frequency_table *powernow_table;
566 /* use ACPI support to get full speed on mains power */
567 pr_warn("Only %d pstates usable (use ACPI driver for full range\n",
569 data->numps = data->batps;
572 for (j = 1; j < data->numps; j++) {
573 if (pst[j-1].fid >= pst[j].fid) {
574 pr_err("PST out of sequence\n");
579 if (data->numps < 2) {
580 pr_err("no p states to transition\n");
584 if (check_pst_table(data, pst, maxvid))
587 powernow_table = kzalloc((sizeof(*powernow_table)
588 * (data->numps + 1)), GFP_KERNEL);
592 for (j = 0; j < data->numps; j++) {
594 powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */
595 powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
596 freq = find_khz_freq_from_fid(pst[j].fid);
597 powernow_table[j].frequency = freq;
599 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
600 powernow_table[data->numps].driver_data = 0;
602 if (query_current_values_with_pending_wait(data)) {
603 kfree(powernow_table);
607 pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
608 data->powernow_table = powernow_table;
609 if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
612 for (j = 0; j < data->numps; j++)
613 if ((pst[j].fid == data->currfid) &&
614 (pst[j].vid == data->currvid))
617 pr_debug("currfid/vid do not match PST, ignoring\n");
621 /* Find and validate the PSB/PST table in BIOS. */
622 static int find_psb_table(struct powernow_k8_data *data)
631 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
632 /* Scan BIOS looking for the signature. */
633 /* It can not be at ffff0 - it is too big. */
635 psb = phys_to_virt(i);
636 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
639 pr_debug("found PSB header at 0x%p\n", psb);
641 pr_debug("table vers: 0x%x\n", psb->tableversion);
642 if (psb->tableversion != PSB_VERSION_1_4) {
643 pr_err(FW_BUG "PSB table is not v1.4\n");
647 pr_debug("flags: 0x%x\n", psb->flags1);
649 pr_err(FW_BUG "unknown flags\n");
653 data->vstable = psb->vstable;
654 pr_debug("voltage stabilization time: %d(*20us)\n",
657 pr_debug("flags2: 0x%x\n", psb->flags2);
658 data->rvo = psb->flags2 & 3;
659 data->irt = ((psb->flags2) >> 2) & 3;
660 mvs = ((psb->flags2) >> 4) & 3;
661 data->vidmvs = 1 << mvs;
662 data->batps = ((psb->flags2) >> 6) & 3;
664 pr_debug("ramp voltage offset: %d\n", data->rvo);
665 pr_debug("isochronous relief time: %d\n", data->irt);
666 pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
668 pr_debug("numpst: 0x%x\n", psb->num_tables);
669 cpst = psb->num_tables;
670 if ((psb->cpuid == 0x00000fc0) ||
671 (psb->cpuid == 0x00000fe0)) {
672 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
673 if ((thiscpuid == 0x00000fc0) ||
674 (thiscpuid == 0x00000fe0))
678 pr_err(FW_BUG "numpst must be 1\n");
682 data->plllock = psb->plllocktime;
683 pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
684 pr_debug("maxfid: 0x%x\n", psb->maxfid);
685 pr_debug("maxvid: 0x%x\n", psb->maxvid);
686 maxvid = psb->maxvid;
688 data->numps = psb->numps;
689 pr_debug("numpstates: 0x%x\n", data->numps);
690 return fill_powernow_table(data,
691 (struct pst_s *)(psb+1), maxvid);
694 * If you see this message, complain to BIOS manufacturer. If
695 * he tells you "we do not support Linux" or some similar
696 * nonsense, remember that Windows 2000 uses the same legacy
697 * mechanism that the old Linux PSB driver uses. Tell them it
698 * is broken with Windows 2000.
700 * The reference to the AMD documentation is chapter 9 in the
701 * BIOS and Kernel Developer's Guide, which is available on
704 pr_err(FW_BUG "No PSB or ACPI _PSS objects\n");
705 pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n");
709 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
714 if (!data->acpi_data.state_count)
717 control = data->acpi_data.states[index].control;
718 data->irt = (control >> IRT_SHIFT) & IRT_MASK;
719 data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
720 data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
721 data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
722 data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
723 data->vstable = (control >> VST_SHIFT) & VST_MASK;
726 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
728 struct cpufreq_frequency_table *powernow_table;
729 int ret_val = -ENODEV;
732 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
733 pr_debug("register performance failed: bad ACPI data\n");
737 /* verify the data contained in the ACPI structures */
738 if (data->acpi_data.state_count <= 1) {
739 pr_debug("No ACPI P-States\n");
743 control = data->acpi_data.control_register.space_id;
744 status = data->acpi_data.status_register.space_id;
746 if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
747 (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
748 pr_debug("Invalid control/status registers (%llx - %llx)\n",
753 /* fill in data->powernow_table */
754 powernow_table = kzalloc((sizeof(*powernow_table)
755 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
760 data->numps = data->acpi_data.state_count;
761 powernow_k8_acpi_pst_values(data, 0);
763 ret_val = fill_powernow_table_fidvid(data, powernow_table);
767 powernow_table[data->acpi_data.state_count].frequency =
769 data->powernow_table = powernow_table;
771 if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu)
774 /* notify BIOS that we exist */
775 acpi_processor_notify_smm(THIS_MODULE);
777 if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
778 pr_err("unable to alloc powernow_k8_data cpumask\n");
786 kfree(powernow_table);
789 acpi_processor_unregister_performance(data->cpu);
791 /* data->acpi_data.state_count informs us at ->exit()
792 * whether ACPI was used */
793 data->acpi_data.state_count = 0;
798 static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
799 struct cpufreq_frequency_table *powernow_table)
803 for (i = 0; i < data->acpi_data.state_count; i++) {
810 status = data->acpi_data.states[i].status;
811 fid = status & EXT_FID_MASK;
812 vid = (status >> VID_SHIFT) & EXT_VID_MASK;
814 control = data->acpi_data.states[i].control;
815 fid = control & FID_MASK;
816 vid = (control >> VID_SHIFT) & VID_MASK;
819 pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
821 index = fid | (vid<<8);
822 powernow_table[i].driver_data = index;
824 freq = find_khz_freq_from_fid(fid);
825 powernow_table[i].frequency = freq;
827 /* verify frequency is OK */
828 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
829 pr_debug("invalid freq %u kHz, ignoring\n", freq);
830 invalidate_entry(powernow_table, i);
834 /* verify voltage is OK -
835 * BIOSs are using "off" to indicate invalid */
836 if (vid == VID_OFF) {
837 pr_debug("invalid vid %u, ignoring\n", vid);
838 invalidate_entry(powernow_table, i);
842 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
843 pr_info("invalid freq entries %u kHz vs. %u kHz\n",
845 (data->acpi_data.states[i].core_frequency
847 invalidate_entry(powernow_table, i);
854 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
856 if (data->acpi_data.state_count)
857 acpi_processor_unregister_performance(data->cpu);
858 free_cpumask_var(data->acpi_data.shared_cpu_map);
861 static int get_transition_latency(struct powernow_k8_data *data)
865 for (i = 0; i < data->acpi_data.state_count; i++) {
866 int cur_latency = data->acpi_data.states[i].transition_latency
867 + data->acpi_data.states[i].bus_master_latency;
868 if (cur_latency > max_latency)
869 max_latency = cur_latency;
871 if (max_latency == 0) {
872 pr_err(FW_WARN "Invalid zero transition latency\n");
875 /* value in usecs, needs to be in nanoseconds */
876 return 1000 * max_latency;
879 /* Take a frequency, and issue the fid/vid transition command */
880 static int transition_frequency_fidvid(struct powernow_k8_data *data,
883 struct cpufreq_policy *policy;
887 struct cpufreq_freqs freqs;
889 pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index);
891 /* fid/vid correctness check for k8 */
892 /* fid are the lower 8 bits of the index we stored into
893 * the cpufreq frequency table in find_psb_table, vid
894 * are the upper 8 bits.
896 fid = data->powernow_table[index].driver_data & 0xFF;
897 vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
899 pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
901 if (query_current_values_with_pending_wait(data))
904 if ((data->currvid == vid) && (data->currfid == fid)) {
905 pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n",
910 pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n",
911 smp_processor_id(), fid, vid);
912 freqs.old = find_khz_freq_from_fid(data->currfid);
913 freqs.new = find_khz_freq_from_fid(fid);
915 policy = cpufreq_cpu_get(smp_processor_id());
916 cpufreq_cpu_put(policy);
918 cpufreq_freq_transition_begin(policy, &freqs);
919 res = transition_fid_vid(data, fid, vid);
920 cpufreq_freq_transition_end(policy, &freqs, res);
925 struct powernowk8_target_arg {
926 struct cpufreq_policy *pol;
930 static long powernowk8_target_fn(void *arg)
932 struct powernowk8_target_arg *pta = arg;
933 struct cpufreq_policy *pol = pta->pol;
934 unsigned newstate = pta->newstate;
935 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
943 checkfid = data->currfid;
944 checkvid = data->currvid;
946 if (pending_bit_stuck()) {
947 pr_err("failing targ, change pending bit set\n");
951 pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n",
952 pol->cpu, data->powernow_table[newstate].frequency, pol->min,
955 if (query_current_values_with_pending_wait(data))
958 pr_debug("targ: curr fid 0x%x, vid 0x%x\n",
959 data->currfid, data->currvid);
961 if ((checkvid != data->currvid) ||
962 (checkfid != data->currfid)) {
963 pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
964 checkfid, data->currfid,
965 checkvid, data->currvid);
968 mutex_lock(&fidvid_mutex);
970 powernow_k8_acpi_pst_values(data, newstate);
972 ret = transition_frequency_fidvid(data, newstate);
975 pr_err("transition frequency failed\n");
976 mutex_unlock(&fidvid_mutex);
979 mutex_unlock(&fidvid_mutex);
981 pol->cur = find_khz_freq_from_fid(data->currfid);
986 /* Driver entry point to switch to the target frequency */
987 static int powernowk8_target(struct cpufreq_policy *pol, unsigned index)
989 struct powernowk8_target_arg pta = { .pol = pol, .newstate = index };
991 return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta);
995 struct powernow_k8_data *data;
999 static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
1001 struct init_on_cpu *init_on_cpu = _init_on_cpu;
1003 if (pending_bit_stuck()) {
1004 pr_err("failing init, change pending bit set\n");
1005 init_on_cpu->rc = -ENODEV;
1009 if (query_current_values_with_pending_wait(init_on_cpu->data)) {
1010 init_on_cpu->rc = -ENODEV;
1016 init_on_cpu->rc = 0;
1019 #define MISSING_PSS_MSG \
1020 FW_BUG "No compatible ACPI _PSS objects found.\n" \
1021 FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \
1022 FW_BUG "If that doesn't help, try upgrading your BIOS.\n"
1024 /* per CPU init entry point to the driver */
1025 static int powernowk8_cpu_init(struct cpufreq_policy *pol)
1027 struct powernow_k8_data *data;
1028 struct init_on_cpu init_on_cpu;
1031 smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
1035 data = kzalloc(sizeof(*data), GFP_KERNEL);
1039 data->cpu = pol->cpu;
1041 if (powernow_k8_cpu_init_acpi(data)) {
1043 * Use the PSB BIOS structure. This is only available on
1044 * an UP version, and is deprecated by AMD.
1046 if (num_online_cpus() != 1) {
1047 pr_err_once(MISSING_PSS_MSG);
1050 if (pol->cpu != 0) {
1051 pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n");
1054 rc = find_psb_table(data);
1058 /* Take a crude guess here.
1059 * That guess was in microseconds, so multiply with 1000 */
1060 pol->cpuinfo.transition_latency = (
1061 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
1062 ((1 << data->irt) * 30)) * 1000;
1063 } else /* ACPI _PSS objects available */
1064 pol->cpuinfo.transition_latency = get_transition_latency(data);
1066 /* only run on specific CPU from here on */
1067 init_on_cpu.data = data;
1068 smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
1070 rc = init_on_cpu.rc;
1072 goto err_out_exit_acpi;
1074 cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu));
1075 data->available_cores = pol->cpus;
1076 pol->freq_table = data->powernow_table;
1078 pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n",
1079 data->currfid, data->currvid);
1081 /* Point all the CPUs in this policy to the same data */
1082 for_each_cpu(cpu, pol->cpus)
1083 per_cpu(powernow_data, cpu) = data;
1088 powernow_k8_cpu_exit_acpi(data);
1095 static int powernowk8_cpu_exit(struct cpufreq_policy *pol)
1097 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1103 powernow_k8_cpu_exit_acpi(data);
1105 kfree(data->powernow_table);
1107 for_each_cpu(cpu, pol->cpus)
1108 per_cpu(powernow_data, cpu) = NULL;
1113 static void query_values_on_cpu(void *_err)
1116 struct powernow_k8_data *data = __this_cpu_read(powernow_data);
1118 *err = query_current_values_with_pending_wait(data);
1121 static unsigned int powernowk8_get(unsigned int cpu)
1123 struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
1124 unsigned int khz = 0;
1130 smp_call_function_single(cpu, query_values_on_cpu, &err, true);
1134 khz = find_khz_freq_from_fid(data->currfid);
1141 static struct cpufreq_driver cpufreq_amd64_driver = {
1142 .flags = CPUFREQ_ASYNC_NOTIFICATION,
1143 .verify = cpufreq_generic_frequency_table_verify,
1144 .target_index = powernowk8_target,
1145 .bios_limit = acpi_processor_get_bios_limit,
1146 .init = powernowk8_cpu_init,
1147 .exit = powernowk8_cpu_exit,
1148 .get = powernowk8_get,
1149 .name = "powernow-k8",
1150 .attr = cpufreq_generic_attr,
1153 static void __request_acpi_cpufreq(void)
1155 const char drv[] = "acpi-cpufreq";
1156 const char *cur_drv;
1158 cur_drv = cpufreq_get_current_driver();
1162 if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv))))
1163 pr_warn("WTF driver: %s\n", cur_drv);
1168 pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n");
1169 request_module(drv);
1172 /* driver entry point for init */
1173 static int powernowk8_init(void)
1175 unsigned int i, supported_cpus = 0;
1178 if (boot_cpu_has(X86_FEATURE_HW_PSTATE)) {
1179 __request_acpi_cpufreq();
1183 if (!x86_match_cpu(powernow_k8_ids))
1187 for_each_online_cpu(i) {
1188 smp_call_function_single(i, check_supported_cpu, &ret, 1);
1193 if (supported_cpus != num_online_cpus()) {
1199 ret = cpufreq_register_driver(&cpufreq_amd64_driver);
1203 pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n",
1204 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
1209 /* driver entry point for term */
1210 static void __exit powernowk8_exit(void)
1214 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1217 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>");
1218 MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>");
1219 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1220 MODULE_LICENSE("GPL");
1222 late_initcall(powernowk8_init);
1223 module_exit(powernowk8_exit);