2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 * The OPP code in function cpu0_set_target() is reused from
5 * drivers/cpufreq/omap-cpufreq.c
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 #include <linux/clk.h>
15 #include <linux/cpu.h>
16 #include <linux/cpufreq.h>
17 #include <linux/err.h>
18 #include <linux/module.h>
20 #include <linux/opp.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
24 static unsigned int transition_latency;
25 static unsigned int voltage_tolerance; /* in percentage */
27 static struct device *cpu_dev;
28 static struct clk *cpu_clk;
29 static struct regulator *cpu_reg;
30 static struct cpufreq_frequency_table *freq_table;
32 static int cpu0_verify_speed(struct cpufreq_policy *policy)
34 return cpufreq_frequency_table_verify(policy, freq_table);
37 static unsigned int cpu0_get_speed(unsigned int cpu)
39 return clk_get_rate(cpu_clk) / 1000;
42 static int cpu0_set_target(struct cpufreq_policy *policy,
43 unsigned int target_freq, unsigned int relation)
45 struct cpufreq_freqs freqs;
47 unsigned long freq_Hz, volt = 0, volt_old = 0, tol = 0;
48 unsigned int index, cpu;
51 ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
54 pr_err("failed to match target freqency %d: %d\n",
59 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
61 freq_Hz = freq_table[index].frequency * 1000;
62 freqs.new = freq_Hz / 1000;
63 freqs.old = clk_get_rate(cpu_clk) / 1000;
65 if (freqs.old == freqs.new)
68 for_each_online_cpu(cpu) {
70 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
75 opp = opp_find_freq_ceil(cpu_dev, &freq_Hz);
78 pr_err("failed to find OPP for %ld\n", freq_Hz);
81 volt = opp_get_voltage(opp);
83 tol = volt * voltage_tolerance / 100;
84 volt_old = regulator_get_voltage(cpu_reg);
87 pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
88 freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
89 freqs.new / 1000, volt ? volt / 1000 : -1);
91 /* scaling up? scale voltage before frequency */
92 if (cpu_reg && freqs.new > freqs.old) {
93 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
95 pr_err("failed to scale voltage up: %d\n", ret);
96 freqs.new = freqs.old;
101 ret = clk_set_rate(cpu_clk, freqs.new * 1000);
103 pr_err("failed to set clock rate: %d\n", ret);
105 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
109 /* scaling down? scale voltage after frequency */
110 if (cpu_reg && freqs.new < freqs.old) {
111 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
113 pr_err("failed to scale voltage down: %d\n", ret);
114 clk_set_rate(cpu_clk, freqs.old * 1000);
115 freqs.new = freqs.old;
120 for_each_online_cpu(cpu) {
122 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
128 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
132 if (policy->cpu != 0)
135 ret = cpufreq_frequency_table_cpuinfo(policy, freq_table);
137 pr_err("invalid frequency table: %d\n", ret);
141 policy->cpuinfo.transition_latency = transition_latency;
142 policy->cur = clk_get_rate(cpu_clk) / 1000;
145 * The driver only supports the SMP configuartion where all processors
146 * share the clock and voltage and clock. Use cpufreq affected_cpus
147 * interface to have all CPUs scaled together.
149 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
150 cpumask_setall(policy->cpus);
152 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
157 static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
159 cpufreq_frequency_table_put_attr(policy->cpu);
164 static struct freq_attr *cpu0_cpufreq_attr[] = {
165 &cpufreq_freq_attr_scaling_available_freqs,
169 static struct cpufreq_driver cpu0_cpufreq_driver = {
170 .flags = CPUFREQ_STICKY,
171 .verify = cpu0_verify_speed,
172 .target = cpu0_set_target,
173 .get = cpu0_get_speed,
174 .init = cpu0_cpufreq_init,
175 .exit = cpu0_cpufreq_exit,
176 .name = "generic_cpu0",
177 .attr = cpu0_cpufreq_attr,
180 static int cpu0_cpufreq_driver_init(void)
182 struct device_node *np;
185 np = of_find_node_by_path("/cpus/cpu@0");
187 pr_err("failed to find cpu0 node\n");
191 cpu_dev = get_cpu_device(0);
193 pr_err("failed to get cpu0 device\n");
198 cpu_dev->of_node = np;
200 cpu_clk = clk_get(cpu_dev, NULL);
201 if (IS_ERR(cpu_clk)) {
202 ret = PTR_ERR(cpu_clk);
203 pr_err("failed to get cpu0 clock: %d\n", ret);
207 cpu_reg = regulator_get(cpu_dev, "cpu0");
208 if (IS_ERR(cpu_reg)) {
209 pr_warn("failed to get cpu0 regulator\n");
213 ret = of_init_opp_table(cpu_dev);
215 pr_err("failed to init OPP table: %d\n", ret);
219 ret = opp_init_cpufreq_table(cpu_dev, &freq_table);
221 pr_err("failed to init cpufreq table: %d\n", ret);
225 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
227 if (of_property_read_u32(np, "clock-latency", &transition_latency))
228 transition_latency = CPUFREQ_ETERNAL;
232 unsigned long min_uV, max_uV;
236 * OPP is maintained in order of increasing frequency, and
237 * freq_table initialised from OPP is therefore sorted in the
240 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
243 opp = opp_find_freq_exact(cpu_dev,
244 freq_table[0].frequency * 1000, true);
245 min_uV = opp_get_voltage(opp);
246 opp = opp_find_freq_exact(cpu_dev,
247 freq_table[i-1].frequency * 1000, true);
248 max_uV = opp_get_voltage(opp);
250 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
252 transition_latency += ret * 1000;
255 ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
257 pr_err("failed register driver: %d\n", ret);
265 opp_free_cpufreq_table(cpu_dev, &freq_table);
270 late_initcall(cpu0_cpufreq_driver_init);
272 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
273 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
274 MODULE_LICENSE("GPL");