1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acpi-cpufreq.c - ACPI Processor P-States Driver
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/smp.h>
17 #include <linux/sched.h>
18 #include <linux/cpufreq.h>
19 #include <linux/compiler.h>
20 #include <linux/dmi.h>
21 #include <linux/slab.h>
22 #include <linux/string_helpers.h>
23 #include <linux/platform_device.h>
25 #include <linux/acpi.h>
27 #include <linux/delay.h>
28 #include <linux/uaccess.h>
30 #include <acpi/processor.h>
31 #include <acpi/cppc_acpi.h>
34 #include <asm/processor.h>
35 #include <asm/cpufeature.h>
36 #include <asm/cpu_device_id.h>
38 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
39 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
40 MODULE_LICENSE("GPL");
43 UNDEFINED_CAPABLE = 0,
44 SYSTEM_INTEL_MSR_CAPABLE,
45 SYSTEM_AMD_MSR_CAPABLE,
49 #define INTEL_MSR_RANGE (0xffff)
50 #define AMD_MSR_RANGE (0x7)
51 #define HYGON_MSR_RANGE (0x7)
53 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
55 struct acpi_cpufreq_data {
57 unsigned int cpu_feature;
58 unsigned int acpi_perf_cpu;
59 cpumask_var_t freqdomain_cpus;
60 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
61 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
64 /* acpi_perf_data is a pointer to percpu data. */
65 static struct acpi_processor_performance __percpu *acpi_perf_data;
67 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
69 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
72 static struct cpufreq_driver acpi_cpufreq_driver;
74 static unsigned int acpi_pstate_strict;
76 static bool boost_state(unsigned int cpu)
81 switch (boot_cpu_data.x86_vendor) {
82 case X86_VENDOR_INTEL:
83 case X86_VENDOR_CENTAUR:
84 case X86_VENDOR_ZHAOXIN:
85 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
86 msr = lo | ((u64)hi << 32);
87 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
88 case X86_VENDOR_HYGON:
90 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
91 msr = lo | ((u64)hi << 32);
92 return !(msr & MSR_K7_HWCR_CPB_DIS);
97 static int boost_set_msr(bool enable)
102 switch (boot_cpu_data.x86_vendor) {
103 case X86_VENDOR_INTEL:
104 case X86_VENDOR_CENTAUR:
105 case X86_VENDOR_ZHAOXIN:
106 msr_addr = MSR_IA32_MISC_ENABLE;
107 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
109 case X86_VENDOR_HYGON:
111 msr_addr = MSR_K7_HWCR;
112 msr_mask = MSR_K7_HWCR_CPB_DIS;
118 rdmsrl(msr_addr, val);
125 wrmsrl(msr_addr, val);
129 static void boost_set_msr_each(void *p_en)
131 bool enable = (bool) p_en;
133 boost_set_msr(enable);
136 static int set_boost(struct cpufreq_policy *policy, int val)
138 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
139 (void *)(long)val, 1);
140 pr_debug("CPU %*pbl: Core Boosting %s.\n",
141 cpumask_pr_args(policy->cpus), str_enabled_disabled(val));
146 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
148 struct acpi_cpufreq_data *data = policy->driver_data;
153 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
156 cpufreq_freq_attr_ro(freqdomain_cpus);
158 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
159 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
163 unsigned int val = 0;
165 if (!acpi_cpufreq_driver.set_boost)
168 ret = kstrtouint(buf, 10, &val);
173 set_boost(policy, val);
179 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
181 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
184 cpufreq_freq_attr_rw(cpb);
187 static int check_est_cpu(unsigned int cpuid)
189 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
191 return cpu_has(cpu, X86_FEATURE_EST);
194 static int check_amd_hwpstate_cpu(unsigned int cpuid)
196 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
198 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
201 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
203 struct acpi_cpufreq_data *data = policy->driver_data;
204 struct acpi_processor_performance *perf;
207 perf = to_perf_data(data);
209 for (i = 0; i < perf->state_count; i++) {
210 if (value == perf->states[i].status)
211 return policy->freq_table[i].frequency;
216 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
218 struct acpi_cpufreq_data *data = policy->driver_data;
219 struct cpufreq_frequency_table *pos;
220 struct acpi_processor_performance *perf;
222 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
223 msr &= AMD_MSR_RANGE;
224 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
225 msr &= HYGON_MSR_RANGE;
227 msr &= INTEL_MSR_RANGE;
229 perf = to_perf_data(data);
231 cpufreq_for_each_entry(pos, policy->freq_table)
232 if (msr == perf->states[pos->driver_data].status)
233 return pos->frequency;
234 return policy->freq_table[0].frequency;
237 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
239 struct acpi_cpufreq_data *data = policy->driver_data;
241 switch (data->cpu_feature) {
242 case SYSTEM_INTEL_MSR_CAPABLE:
243 case SYSTEM_AMD_MSR_CAPABLE:
244 return extract_msr(policy, val);
245 case SYSTEM_IO_CAPABLE:
246 return extract_io(policy, val);
252 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
254 u32 val, dummy __always_unused;
256 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
260 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
264 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
265 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
266 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
269 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
271 u32 val, dummy __always_unused;
273 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
277 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
279 wrmsr(MSR_AMD_PERF_CTL, val, 0);
282 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
286 acpi_os_read_port(reg->address, &val, reg->bit_width);
290 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
292 acpi_os_write_port(reg->address, val, reg->bit_width);
296 struct acpi_pct_register *reg;
299 void (*write)(struct acpi_pct_register *reg, u32 val);
300 u32 (*read)(struct acpi_pct_register *reg);
304 /* Called via smp_call_function_single(), on the target CPU */
305 static void do_drv_read(void *_cmd)
307 struct drv_cmd *cmd = _cmd;
309 cmd->val = cmd->func.read(cmd->reg);
312 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
314 struct acpi_processor_performance *perf = to_perf_data(data);
315 struct drv_cmd cmd = {
316 .reg = &perf->control_register,
317 .func.read = data->cpu_freq_read,
321 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
322 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
326 /* Called via smp_call_function_many(), on the target CPUs */
327 static void do_drv_write(void *_cmd)
329 struct drv_cmd *cmd = _cmd;
331 cmd->func.write(cmd->reg, cmd->val);
334 static void drv_write(struct acpi_cpufreq_data *data,
335 const struct cpumask *mask, u32 val)
337 struct acpi_processor_performance *perf = to_perf_data(data);
338 struct drv_cmd cmd = {
339 .reg = &perf->control_register,
341 .func.write = data->cpu_freq_write,
345 this_cpu = get_cpu();
346 if (cpumask_test_cpu(this_cpu, mask))
349 smp_call_function_many(mask, do_drv_write, &cmd, 1);
353 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
357 if (unlikely(cpumask_empty(mask)))
360 val = drv_read(data, mask);
362 pr_debug("%s = %u\n", __func__, val);
367 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
369 struct acpi_cpufreq_data *data;
370 struct cpufreq_policy *policy;
372 unsigned int cached_freq;
374 pr_debug("%s (%d)\n", __func__, cpu);
376 policy = cpufreq_cpu_get_raw(cpu);
377 if (unlikely(!policy))
380 data = policy->driver_data;
381 if (unlikely(!data || !policy->freq_table))
384 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
385 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
386 if (freq != cached_freq) {
388 * The dreaded BIOS frequency change behind our back.
389 * Force set the frequency on next target call.
394 pr_debug("cur freq = %u\n", freq);
399 static unsigned int check_freqs(struct cpufreq_policy *policy,
400 const struct cpumask *mask, unsigned int freq)
402 struct acpi_cpufreq_data *data = policy->driver_data;
403 unsigned int cur_freq;
406 for (i = 0; i < 100; i++) {
407 cur_freq = extract_freq(policy, get_cur_val(mask, data));
408 if (cur_freq == freq)
415 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
418 struct acpi_cpufreq_data *data = policy->driver_data;
419 struct acpi_processor_performance *perf;
420 const struct cpumask *mask;
421 unsigned int next_perf_state = 0; /* Index into perf table */
424 if (unlikely(!data)) {
428 perf = to_perf_data(data);
429 next_perf_state = policy->freq_table[index].driver_data;
430 if (perf->state == next_perf_state) {
431 if (unlikely(data->resume)) {
432 pr_debug("Called after resume, resetting to P%d\n",
436 pr_debug("Already at target state (P%d)\n",
443 * The core won't allow CPUs to go away until the governor has been
444 * stopped, so we can rely on the stability of policy->cpus.
446 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
447 cpumask_of(policy->cpu) : policy->cpus;
449 drv_write(data, mask, perf->states[next_perf_state].control);
451 if (acpi_pstate_strict) {
452 if (!check_freqs(policy, mask,
453 policy->freq_table[index].frequency)) {
454 pr_debug("%s (%d)\n", __func__, policy->cpu);
460 perf->state = next_perf_state;
465 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
466 unsigned int target_freq)
468 struct acpi_cpufreq_data *data = policy->driver_data;
469 struct acpi_processor_performance *perf;
470 struct cpufreq_frequency_table *entry;
471 unsigned int next_perf_state, next_freq, index;
474 * Find the closest frequency above target_freq.
476 if (policy->cached_target_freq == target_freq)
477 index = policy->cached_resolved_idx;
479 index = cpufreq_table_find_index_dl(policy, target_freq,
482 entry = &policy->freq_table[index];
483 next_freq = entry->frequency;
484 next_perf_state = entry->driver_data;
486 perf = to_perf_data(data);
487 if (perf->state == next_perf_state) {
488 if (unlikely(data->resume))
494 data->cpu_freq_write(&perf->control_register,
495 perf->states[next_perf_state].control);
496 perf->state = next_perf_state;
501 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
503 struct acpi_processor_performance *perf;
505 perf = to_perf_data(data);
507 /* search the closest match to cpu_khz */
510 unsigned long freqn = perf->states[0].core_frequency * 1000;
512 for (i = 0; i < (perf->state_count-1); i++) {
514 freqn = perf->states[i+1].core_frequency * 1000;
515 if ((2 * cpu_khz) > (freqn + freq)) {
520 perf->state = perf->state_count-1;
523 /* assume CPU is at P0... */
525 return perf->states[0].core_frequency * 1000;
529 static void free_acpi_perf_data(void)
533 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
534 for_each_possible_cpu(i)
535 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
537 free_percpu(acpi_perf_data);
540 static int cpufreq_boost_down_prep(unsigned int cpu)
543 * Clear the boost-disable bit on the CPU_DOWN path so that
544 * this cpu cannot block the remaining ones from boosting.
546 return boost_set_msr(1);
550 * acpi_cpufreq_early_init - initialize ACPI P-States library
552 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
553 * in order to determine correct frequency and voltage pairings. We can
554 * do _PDC and _PSD and find out the processor dependency for the
555 * actual init that will happen later...
557 static int __init acpi_cpufreq_early_init(void)
560 pr_debug("%s\n", __func__);
562 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
563 if (!acpi_perf_data) {
564 pr_debug("Memory allocation error for acpi_perf_data.\n");
567 for_each_possible_cpu(i) {
568 if (!zalloc_cpumask_var_node(
569 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
570 GFP_KERNEL, cpu_to_node(i))) {
572 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
573 free_acpi_perf_data();
578 /* Do initialization in ACPI core */
579 acpi_processor_preregister_performance(acpi_perf_data);
585 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
586 * or do it in BIOS firmware and won't inform about it to OS. If not
587 * detected, this has a side effect of making CPU run at a different speed
588 * than OS intended it to run at. Detect it and handle it cleanly.
590 static int bios_with_sw_any_bug;
592 static int sw_any_bug_found(const struct dmi_system_id *d)
594 bios_with_sw_any_bug = 1;
598 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
600 .callback = sw_any_bug_found,
601 .ident = "Supermicro Server X6DLP",
603 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
604 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
605 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
611 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
613 /* Intel Xeon Processor 7100 Series Specification Update
614 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
615 * AL30: A Machine Check Exception (MCE) Occurring during an
616 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
617 * Both Processor Cores to Lock Up. */
618 if (c->x86_vendor == X86_VENDOR_INTEL) {
619 if ((c->x86 == 15) &&
620 (c->x86_model == 6) &&
621 (c->x86_stepping == 8)) {
622 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
630 #ifdef CONFIG_ACPI_CPPC_LIB
631 static u64 get_max_boost_ratio(unsigned int cpu)
633 struct cppc_perf_caps perf_caps;
634 u64 highest_perf, nominal_perf;
637 if (acpi_pstate_strict)
640 ret = cppc_get_perf_caps(cpu, &perf_caps);
642 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n",
647 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
648 highest_perf = amd_get_highest_perf();
650 highest_perf = perf_caps.highest_perf;
652 nominal_perf = perf_caps.nominal_perf;
654 if (!highest_perf || !nominal_perf) {
655 pr_debug("CPU%d: highest or nominal performance missing\n", cpu);
659 if (highest_perf < nominal_perf) {
660 pr_debug("CPU%d: nominal performance above highest\n", cpu);
664 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
667 static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; }
670 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
672 struct cpufreq_frequency_table *freq_table;
673 struct acpi_processor_performance *perf;
674 struct acpi_cpufreq_data *data;
675 unsigned int cpu = policy->cpu;
676 struct cpuinfo_x86 *c = &cpu_data(cpu);
677 unsigned int valid_states = 0;
678 unsigned int result = 0;
682 static int blacklisted;
685 pr_debug("%s\n", __func__);
690 blacklisted = acpi_cpufreq_blacklist(c);
695 data = kzalloc(sizeof(*data), GFP_KERNEL);
699 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
704 perf = per_cpu_ptr(acpi_perf_data, cpu);
705 data->acpi_perf_cpu = cpu;
706 policy->driver_data = data;
708 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
709 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
711 result = acpi_processor_register_performance(perf, cpu);
715 policy->shared_type = perf->shared_type;
718 * Will let policy->cpus know about dependency only when software
719 * coordination is required.
721 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
722 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
723 cpumask_copy(policy->cpus, perf->shared_cpu_map);
725 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
728 dmi_check_system(sw_any_bug_dmi_table);
729 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
730 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
731 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
734 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
735 !acpi_pstate_strict) {
736 cpumask_clear(policy->cpus);
737 cpumask_set_cpu(cpu, policy->cpus);
738 cpumask_copy(data->freqdomain_cpus,
739 topology_sibling_cpumask(cpu));
740 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
741 pr_info_once("overriding BIOS provided _PSD data\n");
745 /* capability check */
746 if (perf->state_count <= 1) {
747 pr_debug("No P-States\n");
752 if (perf->control_register.space_id != perf->status_register.space_id) {
757 switch (perf->control_register.space_id) {
758 case ACPI_ADR_SPACE_SYSTEM_IO:
759 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
760 boot_cpu_data.x86 == 0xf) {
761 pr_debug("AMD K8 systems must use native drivers.\n");
765 pr_debug("SYSTEM IO addr space\n");
766 data->cpu_feature = SYSTEM_IO_CAPABLE;
767 data->cpu_freq_read = cpu_freq_read_io;
768 data->cpu_freq_write = cpu_freq_write_io;
770 case ACPI_ADR_SPACE_FIXED_HARDWARE:
771 pr_debug("HARDWARE addr space\n");
772 if (check_est_cpu(cpu)) {
773 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
774 data->cpu_freq_read = cpu_freq_read_intel;
775 data->cpu_freq_write = cpu_freq_write_intel;
778 if (check_amd_hwpstate_cpu(cpu)) {
779 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
780 data->cpu_freq_read = cpu_freq_read_amd;
781 data->cpu_freq_write = cpu_freq_write_amd;
787 pr_debug("Unknown addr space %d\n",
788 (u32) (perf->control_register.space_id));
793 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
800 /* detect transition latency */
801 policy->cpuinfo.transition_latency = 0;
802 for (i = 0; i < perf->state_count; i++) {
803 if ((perf->states[i].transition_latency * 1000) >
804 policy->cpuinfo.transition_latency)
805 policy->cpuinfo.transition_latency =
806 perf->states[i].transition_latency * 1000;
809 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
810 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
811 policy->cpuinfo.transition_latency > 20 * 1000) {
812 policy->cpuinfo.transition_latency = 20 * 1000;
813 pr_info_once("P-state transition latency capped at 20 uS\n");
817 for (i = 0; i < perf->state_count; i++) {
818 if (i > 0 && perf->states[i].core_frequency >=
819 freq_table[valid_states-1].frequency / 1000)
822 freq_table[valid_states].driver_data = i;
823 freq_table[valid_states].frequency =
824 perf->states[i].core_frequency * 1000;
827 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
829 max_boost_ratio = get_max_boost_ratio(cpu);
830 if (max_boost_ratio) {
831 unsigned int freq = freq_table[0].frequency;
834 * Because the loop above sorts the freq_table entries in the
835 * descending order, freq is the maximum frequency in the table.
836 * Assume that it corresponds to the CPPC nominal frequency and
837 * use it to set cpuinfo.max_freq.
839 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT;
842 * If the maximum "boost" frequency is unknown, ask the arch
843 * scale-invariance code to use the "nominal" performance for
844 * CPU utilization scaling so as to prevent the schedutil
845 * governor from selecting inadequate CPU frequencies.
847 arch_set_max_freq_ratio(true);
850 policy->freq_table = freq_table;
853 switch (perf->control_register.space_id) {
854 case ACPI_ADR_SPACE_SYSTEM_IO:
856 * The core will not set policy->cur, because
857 * cpufreq_driver->get is NULL, so we need to set it here.
858 * However, we have to guess it, because the current speed is
859 * unknown and not detectable via IO ports.
861 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
863 case ACPI_ADR_SPACE_FIXED_HARDWARE:
864 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
870 /* notify BIOS that we exist */
871 acpi_processor_notify_smm(THIS_MODULE);
873 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
874 for (i = 0; i < perf->state_count; i++)
875 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
876 (i == perf->state ? '*' : ' '), i,
877 (u32) perf->states[i].core_frequency,
878 (u32) perf->states[i].power,
879 (u32) perf->states[i].transition_latency);
882 * the first call to ->target() should result in us actually
883 * writing something to the appropriate registers.
887 policy->fast_switch_possible = !acpi_pstate_strict &&
888 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
890 if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency)
891 pr_warn(FW_WARN "P-state 0 is not max freq\n");
893 if (acpi_cpufreq_driver.set_boost)
894 set_boost(policy, acpi_cpufreq_driver.boost_enabled);
899 acpi_processor_unregister_performance(cpu);
901 free_cpumask_var(data->freqdomain_cpus);
904 policy->driver_data = NULL;
909 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
911 struct acpi_cpufreq_data *data = policy->driver_data;
913 pr_debug("%s\n", __func__);
915 cpufreq_boost_down_prep(policy->cpu);
916 policy->fast_switch_possible = false;
917 policy->driver_data = NULL;
918 acpi_processor_unregister_performance(data->acpi_perf_cpu);
919 free_cpumask_var(data->freqdomain_cpus);
920 kfree(policy->freq_table);
926 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
928 struct acpi_cpufreq_data *data = policy->driver_data;
930 pr_debug("%s\n", __func__);
937 static struct freq_attr *acpi_cpufreq_attr[] = {
938 &cpufreq_freq_attr_scaling_available_freqs,
940 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
946 static struct cpufreq_driver acpi_cpufreq_driver = {
947 .verify = cpufreq_generic_frequency_table_verify,
948 .target_index = acpi_cpufreq_target,
949 .fast_switch = acpi_cpufreq_fast_switch,
950 .bios_limit = acpi_processor_get_bios_limit,
951 .init = acpi_cpufreq_cpu_init,
952 .exit = acpi_cpufreq_cpu_exit,
953 .resume = acpi_cpufreq_resume,
954 .name = "acpi-cpufreq",
955 .attr = acpi_cpufreq_attr,
958 static void __init acpi_cpufreq_boost_init(void)
960 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
961 pr_debug("Boost capabilities not present in the processor\n");
965 acpi_cpufreq_driver.set_boost = set_boost;
966 acpi_cpufreq_driver.boost_enabled = boost_state(0);
969 static int __init acpi_cpufreq_probe(struct platform_device *pdev)
976 /* don't keep reloading if cpufreq_driver exists */
977 if (cpufreq_get_current_driver())
980 pr_debug("%s\n", __func__);
982 ret = acpi_cpufreq_early_init();
986 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
987 /* this is a sysfs file with a strange name and an even stranger
988 * semantic - per CPU instantiation, but system global effect.
989 * Lets enable it only on AMD CPUs for compatibility reasons and
990 * only if configured. This is considered legacy code, which
991 * will probably be removed at some point in the future.
993 if (!check_amd_hwpstate_cpu(0)) {
994 struct freq_attr **attr;
996 pr_debug("CPB unsupported, do not expose it\n");
998 for (attr = acpi_cpufreq_attr; *attr; attr++)
1005 acpi_cpufreq_boost_init();
1007 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1009 free_acpi_perf_data();
1014 static int acpi_cpufreq_remove(struct platform_device *pdev)
1016 pr_debug("%s\n", __func__);
1018 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1020 free_acpi_perf_data();
1025 static struct platform_driver acpi_cpufreq_platdrv = {
1027 .name = "acpi-cpufreq",
1029 .remove = acpi_cpufreq_remove,
1032 static int __init acpi_cpufreq_init(void)
1034 return platform_driver_probe(&acpi_cpufreq_platdrv, acpi_cpufreq_probe);
1037 static void __exit acpi_cpufreq_exit(void)
1039 platform_driver_unregister(&acpi_cpufreq_platdrv);
1042 module_param(acpi_pstate_strict, uint, 0644);
1043 MODULE_PARM_DESC(acpi_pstate_strict,
1044 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1045 "performed during frequency changes.");
1047 late_initcall(acpi_cpufreq_init);
1048 module_exit(acpi_cpufreq_exit);
1050 MODULE_ALIAS("platform:acpi-cpufreq");