1 menu "Generic Driver Options"
4 bool "Enable Driver Model"
6 This config option enables Driver Model. This brings in the core
7 support, including scanning of platform data on start-up. If
8 CONFIG_OF_CONTROL is enabled, the device tree will be scanned also
12 bool "Enable Driver Model for SPL"
15 Enable driver model in SPL. You will need to provide a
16 suitable malloc() implementation. If you are not using the
17 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
18 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
19 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
20 In most cases driver model will only allocate a few uclasses
21 and devices in SPL, so 1KB should be enable. See
22 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
25 bool "Enable Driver Model for TPL"
28 Enable driver model in TPL. You will need to provide a
29 suitable malloc() implementation. If you are not using the
30 full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START,
31 consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you
32 must provide CONFIG_SPL_SYS_MALLOC_F_LEN to set the size.
33 In most cases driver model will only allocate a few uclasses
34 and devices in SPL, so 1KB should be enough. See
35 CONFIG_SPL_SYS_MALLOC_F_LEN for more details on how to enable it.
36 Disable this for very small implementations.
39 bool "Enable warnings in driver model"
43 Enable this to see warnings related to driver model.
45 Warnings may help with debugging, such as when expected devices do
46 not bind correctly. If the option is disabled, dm_warn() is compiled
47 out - it will do nothing when called.
50 bool "Enable warnings in driver model wuth SPL"
53 Enable this to see warnings related to driver model in SPL
55 The dm_warn() function can use up quite a bit of space for its
56 strings. By default this is disabled for SPL builds to save space.
58 Warnings may help with debugging, such as when expected devices do
59 not bind correctly. If the option is disabled, dm_warn() is compiled
60 out - it will do nothing when called.
63 bool "Enable debug messages in driver model core"
66 Say Y here if you want to compile in debug messages in DM core.
68 config DM_DEVICE_REMOVE
69 bool "Support device removal"
73 We can save some code space by dropping support for removing a
76 Note that this may have undesirable results in the USB subsystem as
77 it causes unplugged devices to linger around in the dm-tree, and it
78 causes USB host controllers to not be stopped when booting the OS.
80 config SPL_DM_DEVICE_REMOVE
81 bool "Support device removal in SPL"
84 We can save some code space by dropping support for removing a
85 device. This is not normally required in SPL, so by default this
86 option is disabled for SPL.
89 bool "Support stdio registration"
93 Normally serial drivers register with stdio so that they can be used
94 as normal output devices. In SPL we don't normally use stdio, so
95 we can omit this feature.
98 bool "Support numbered aliases in device tree"
102 Most boards will have a '/aliases' node containing the path to
103 numbered devices (e.g. serial0 = &serial0). This feature can be
104 disabled if it is not required.
106 config SPL_DM_SEQ_ALIAS
107 bool "Support numbered aliases in device tree in SPL"
110 Most boards will have a '/aliases' node containing the path to
111 numbered devices (e.g. serial0 = &serial0). This feature can be
112 disabled if it is not required, to save code space in SPL.
114 config SPL_DM_INLINE_OFNODE
115 bool "Inline some ofnode functions which are seldom used in SPL"
119 This applies to several ofnode functions (see ofnode.h) which are
120 seldom used. Inlining them can help reduce code size.
122 config TPL_DM_INLINE_OFNODE
123 bool "Inline some ofnode functions which are seldom used in TPL"
127 This applies to several ofnode functions (see ofnode.h) which are
128 seldom used. Inlining them can help reduce code size.
131 bool "Support per-device DMA constraints"
134 Enable this to extract per-device DMA constraints, only supported on
135 device-tree systems for now. This is needed in order translate
136 addresses on systems where different buses have different views of
137 the physical address space.
140 bool "Support register maps"
143 Hardware peripherals tend to have one or more sets of registers
144 which can be accessed to control the hardware. A register map
145 models this with a simple read/write interface. It can in principle
146 support any bus type (I2C, SPI) but so far this only supports
147 direct memory access.
150 bool "Support register maps in SPL"
153 Hardware peripherals tend to have one or more sets of registers
154 which can be accessed to control the hardware. A register map
155 models this with a simple read/write interface. It can in principle
156 support any bus type (I2C, SPI) but so far this only supports
157 direct memory access.
160 bool "Support register maps in TPL"
163 Hardware peripherals tend to have one or more sets of registers
164 which can be accessed to control the hardware. A register map
165 models this with a simple read/write interface. It can in principle
166 support any bus type (I2C, SPI) but so far this only supports
167 direct memory access.
170 bool "Support system controllers"
173 Many SoCs have a number of system controllers which are dealt with
174 as a group by a single driver. Some common functionality is provided
175 by this uclass, including accessing registers via regmap and
176 assigning a unique number to each.
179 bool "Support system controllers in SPL"
180 depends on SPL_REGMAP
182 Many SoCs have a number of system controllers which are dealt with
183 as a group by a single driver. Some common functionality is provided
184 by this uclass, including accessing registers via regmap and
185 assigning a unique number to each.
188 bool "Support system controllers in TPL"
189 depends on TPL_REGMAP
191 Many SoCs have a number of system controllers which are dealt with
192 as a group by a single driver. Some common functionality is provided
193 by this uclass, including accessing registers via regmap and
194 assigning a unique number to each.
197 bool "Managed device resources"
200 This option enables the Managed device resources core support.
201 Device resources managed by the devres framework are automatically
202 released whether initialization fails half-way or the device gets
205 If this option is disabled, devres functions fall back to
206 non-managed variants. For example, devres_alloc() to kzalloc(),
207 devm_kmalloc() to kmalloc(), etc.
210 bool "Managed device resources debugging functions"
213 If this option is enabled, devres debug messages are printed.
214 Also, a function is available to dump a list of device resources.
215 Select this if you are having a problem with devres or want to
216 debug resource management for a managed device.
218 If you are unsure about this, Say N here.
221 bool "Support simple-bus driver"
222 depends on DM && OF_CONTROL
225 Supports the 'simple-bus' driver, which is used on some systems.
227 config SPL_SIMPLE_BUS
228 bool "Support simple-bus driver in SPL"
229 depends on SPL_DM && SPL_OF_CONTROL
232 Supports the 'simple-bus' driver, which is used on some systems
235 config SIMPLE_BUS_CORRECT_RANGE
236 bool "Decode the 'simple-bus' <range> by honoring the #address-cells and #size-cells"
237 depends on SIMPLE_BUS
240 Decoding the 'simple-bus' <range> by honoring the #address-cells
241 and #size-cells of parent/child bus. If unset, #address-cells of
242 parent bus is assumed to be 1, #address-cells and #size-cells of
243 child bus is also assumed to be 1, to save some spaces of using
244 an advanced API to decode the <range>, which benefits SPL image
245 builds that have size limits.
247 If you are unsure about this, Say N here.
250 bool "Support simple-pm-bus driver"
251 depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
253 Supports the 'simple-pm-bus' driver, which is used for busses that
254 have power domains and/or clocks which need to be enabled before use.
257 bool "Translate addresses using fdt_translate_address"
258 depends on DM && OF_CONTROL
261 If this option is enabled, the reg property will be translated
262 using the fdt_translate_address() function. This is necessary
263 on some platforms (e.g. MVEBU) using complex "ranges"
264 properties in many nodes. As this translation is not handled
265 correctly in the default simple_bus_translate() function.
267 If this option is not enabled, simple_bus_translate() will be
268 used for the address translation. This function is faster and
269 smaller in size than fdt_translate_address().
271 config SPL_OF_TRANSLATE
272 bool "Translate addresses using fdt_translate_address in SPL"
273 depends on SPL_DM && SPL_OF_CONTROL
275 If this option is enabled, the reg property will be translated
276 using the fdt_translate_address() function. This is necessary
277 on some platforms (e.g. MVEBU) using complex "ranges"
278 properties in many nodes. As this translation is not handled
279 correctly in the default simple_bus_translate() function.
281 If this option is not enabled, simple_bus_translate() will be
282 used for the address translation. This function is faster and
283 smaller in size than fdt_translate_address().
285 config TRANSLATION_OFFSET
286 bool "Platforms specific translation offset"
287 depends on DM && OF_CONTROL
289 Some platforms need a special address translation. Those
290 platforms (e.g. mvebu in SPL) can configure a translation
291 offset by enabling this option and setting the translation_offset
292 variable in the GD in their platform- / board-specific code.
296 depends on OF_TRANSLATE
298 Is this option is enabled then support for the ISA bus will
299 be included for addresses read from DT. This is something that
300 should be known to be required or not based upon the board
301 being targeted, and whether or not it makes use of an ISA bus.
303 The bus is matched based upon its node name equalling "isa". The
304 busses #address-cells should equal 2, with the first cell being
305 used to hold flags & flag 0x1 indicating that the address range
306 should be accessed using I/O port in/out accessors. The second
307 cell holds the offset into ISA bus address space. The #size-cells
308 property should equal 1, and of course holds the size of the
309 address range used by a device.
311 If this option is not enabled then support for the ISA bus is
312 not included and any such busses used in DT will be treated as
313 typical simple-bus compatible busses. This will lead to
314 mistranslation of device addresses, so ensure that this is
315 enabled if your board does include an ISA bus.
317 config DM_DEV_READ_INLINE
319 default y if !OF_LIVE
322 bool "Support ACPI table generation in driver model"
323 default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
326 This option enables generation of ACPI tables using driver-model
327 devices. It adds a new operation struct to each driver, to support
328 things like generating device-specific tables and returning the ACPI
332 bool "Include bounce buffer API"
334 Some peripherals support DMA from a subset of physically
335 addressable memory only. To support such peripherals, the
336 bounce buffer API uses a temporary buffer: it copies data
337 to/from DMA regions while managing cache operations.
339 A second possible use of bounce buffers is their ability to
340 provide aligned buffers for DMA operations.