1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2016-2018 Xilinx
6 #ifndef __LINUX_CLK_ZYNQMP_H_
7 #define __LINUX_CLK_ZYNQMP_H_
9 #include <linux/spinlock.h>
11 #include <linux/firmware/xlnx-zynqmp.h>
24 * struct clock_topology - Clock topology
25 * @type: Type of topology
26 * @flag: Topology flags
27 * @type_flag: Topology type specific flag
29 struct clock_topology {
35 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
36 const char * const *parents,
38 const struct clock_topology *nodes);
40 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
41 const char * const *parents,
43 const struct clock_topology *nodes);
45 struct clk_hw *zynqmp_clk_register_divider(const char *name,
47 const char * const *parents,
49 const struct clock_topology *nodes);
51 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
52 const char * const *parents,
54 const struct clock_topology *nodes);
56 struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name,
58 const char * const *parents,
60 const struct clock_topology *nodes);