1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
8 #include <clk-uclass.h>
11 #include <clk/sunxi.h>
12 #include <dt-bindings/clock/sun50i-a64-ccu.h>
13 #include <dt-bindings/reset/sun50i-a64-ccu.h>
14 #include <linux/bitops.h>
16 static const struct ccu_clk_gate a64_gates[] = {
17 [CLK_PLL_PERIPH0] = GATE(0x028, BIT(31)),
19 [CLK_BUS_MMC0] = GATE(0x060, BIT(8)),
20 [CLK_BUS_MMC1] = GATE(0x060, BIT(9)),
21 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)),
22 [CLK_BUS_EMAC] = GATE(0x060, BIT(17)),
23 [CLK_BUS_SPI0] = GATE(0x060, BIT(20)),
24 [CLK_BUS_SPI1] = GATE(0x060, BIT(21)),
25 [CLK_BUS_OTG] = GATE(0x060, BIT(23)),
26 [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)),
27 [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)),
28 [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)),
29 [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)),
31 [CLK_BUS_PIO] = GATE(0x068, BIT(5)),
33 [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)),
34 [CLK_BUS_I2C1] = GATE(0x06c, BIT(1)),
35 [CLK_BUS_I2C2] = GATE(0x06c, BIT(2)),
36 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
37 [CLK_BUS_UART1] = GATE(0x06c, BIT(17)),
38 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
39 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
40 [CLK_BUS_UART4] = GATE(0x06c, BIT(20)),
42 [CLK_SPI0] = GATE(0x0a0, BIT(31)),
43 [CLK_SPI1] = GATE(0x0a4, BIT(31)),
45 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
46 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
47 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)),
48 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)),
49 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)),
50 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)),
53 static const struct ccu_reset a64_resets[] = {
54 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
55 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
56 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
58 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)),
59 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)),
60 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)),
61 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)),
62 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
63 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
64 [RST_BUS_OTG] = RESET(0x2c0, BIT(23)),
65 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)),
66 [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)),
67 [RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)),
68 [RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)),
70 [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)),
71 [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)),
72 [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
73 [RST_BUS_UART0] = RESET(0x2d8, BIT(16)),
74 [RST_BUS_UART1] = RESET(0x2d8, BIT(17)),
75 [RST_BUS_UART2] = RESET(0x2d8, BIT(18)),
76 [RST_BUS_UART3] = RESET(0x2d8, BIT(19)),
77 [RST_BUS_UART4] = RESET(0x2d8, BIT(20)),
80 const struct ccu_desc a64_ccu_desc = {
83 .num_gates = ARRAY_SIZE(a64_gates),
84 .num_resets = ARRAY_SIZE(a64_resets),