1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2018 Amarula Solutions B.V.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
8 #include <clk-uclass.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun6i-a31-ccu.h>
13 #include <dt-bindings/reset/sun6i-a31-ccu.h>
15 static struct ccu_clk_gate a31_gates[] = {
16 [CLK_AHB1_OTG] = GATE(0x060, BIT(24)),
17 [CLK_AHB1_EHCI0] = GATE(0x060, BIT(26)),
18 [CLK_AHB1_EHCI1] = GATE(0x060, BIT(27)),
19 [CLK_AHB1_OHCI0] = GATE(0x060, BIT(29)),
20 [CLK_AHB1_OHCI1] = GATE(0x060, BIT(30)),
21 [CLK_AHB1_OHCI2] = GATE(0x060, BIT(31)),
23 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
24 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
25 [CLK_USB_PHY2] = GATE(0x0cc, BIT(10)),
26 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)),
27 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)),
28 [CLK_USB_OHCI2] = GATE(0x0cc, BIT(18)),
31 static struct ccu_reset a31_resets[] = {
32 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
33 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
34 [RST_USB_PHY2] = RESET(0x0cc, BIT(2)),
36 [RST_AHB1_OTG] = RESET(0x2c0, BIT(24)),
37 [RST_AHB1_EHCI0] = RESET(0x2c0, BIT(26)),
38 [RST_AHB1_EHCI1] = RESET(0x2c0, BIT(27)),
39 [RST_AHB1_OHCI0] = RESET(0x2c0, BIT(29)),
40 [RST_AHB1_OHCI1] = RESET(0x2c0, BIT(30)),
41 [RST_AHB1_OHCI2] = RESET(0x2c0, BIT(31)),
44 static const struct ccu_desc a31_ccu_desc = {
49 static int a31_clk_bind(struct udevice *dev)
51 return sunxi_reset_bind(dev, ARRAY_SIZE(a31_resets));
54 static const struct udevice_id a31_clk_ids[] = {
55 { .compatible = "allwinner,sun6i-a31-ccu",
56 .data = (ulong)&a31_ccu_desc },
60 U_BOOT_DRIVER(clk_sun6i_a31) = {
61 .name = "sun6i_a31_ccu",
63 .of_match = a31_clk_ids,
64 .priv_auto_alloc_size = sizeof(struct ccu_priv),
65 .ops = &sunxi_clk_ops,
66 .probe = sunxi_clk_probe,