1 // SPDX-License-Identifier: GPL-2.0
3 * Qualcomm A53 PLL driver
5 * Copyright (c) 2017, Linaro Limited
6 * Author: Georgi Djakov <georgi.djakov@linaro.org>
10 #include <linux/clk-provider.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_opp.h>
14 #include <linux/regmap.h>
15 #include <linux/module.h>
18 #include "clk-regmap.h"
20 static const struct pll_freq_tbl a53pll_freq[] = {
21 { 998400000, 52, 0x0, 0x1, 0 },
22 { 1094400000, 57, 0x0, 0x1, 0 },
23 { 1152000000, 62, 0x0, 0x1, 0 },
24 { 1209600000, 63, 0x0, 0x1, 0 },
25 { 1248000000, 65, 0x0, 0x1, 0 },
26 { 1363200000, 71, 0x0, 0x1, 0 },
27 { 1401600000, 73, 0x0, 0x1, 0 },
31 static const struct regmap_config a53pll_regmap_config = {
39 static struct pll_freq_tbl *qcom_a53pll_get_freq_tbl(struct device *dev)
41 struct pll_freq_tbl *freq_tbl;
42 unsigned long xo_freq;
49 xo_clk = devm_clk_get(dev, "xo");
53 xo_freq = clk_get_rate(xo_clk);
55 ret = devm_pm_opp_of_add_table(dev);
59 count = dev_pm_opp_get_opp_count(dev);
63 freq_tbl = devm_kcalloc(dev, count + 1, sizeof(*freq_tbl), GFP_KERNEL);
67 for (i = 0, freq = 0; i < count; i++, freq++) {
68 struct dev_pm_opp *opp;
70 opp = dev_pm_opp_find_freq_ceil(dev, &freq);
74 /* Skip the freq that is not divisible */
78 freq_tbl[i].freq = freq;
79 freq_tbl[i].l = freq / xo_freq;
88 static int qcom_a53pll_probe(struct platform_device *pdev)
90 struct device *dev = &pdev->dev;
91 struct device_node *np = dev->of_node;
92 struct regmap *regmap;
95 struct clk_init_data init = { };
98 pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL);
102 base = devm_platform_ioremap_resource(pdev, 0);
104 return PTR_ERR(base);
106 regmap = devm_regmap_init_mmio(dev, base, &a53pll_regmap_config);
108 return PTR_ERR(regmap);
113 pll->config_reg = 0x14;
114 pll->mode_reg = 0x00;
115 pll->status_reg = 0x1c;
116 pll->status_bit = 16;
118 pll->freq_tbl = qcom_a53pll_get_freq_tbl(dev);
119 if (!pll->freq_tbl) {
120 /* Fall on a53pll_freq if no freq_tbl is found from OPP */
121 pll->freq_tbl = a53pll_freq;
124 /* Use an unique name by appending @unit-address */
125 init.name = devm_kasprintf(dev, GFP_KERNEL, "a53pll%s",
126 strchrnul(np->full_name, '@'));
130 init.parent_names = (const char *[]){ "xo" };
131 init.num_parents = 1;
132 init.ops = &clk_pll_sr2_ops;
133 pll->clkr.hw.init = &init;
135 ret = devm_clk_register_regmap(dev, &pll->clkr);
137 dev_err(dev, "failed to register regmap clock: %d\n", ret);
141 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
144 dev_err(dev, "failed to add clock provider: %d\n", ret);
151 static const struct of_device_id qcom_a53pll_match_table[] = {
152 { .compatible = "qcom,msm8916-a53pll" },
153 { .compatible = "qcom,msm8939-a53pll" },
156 MODULE_DEVICE_TABLE(of, qcom_a53pll_match_table);
158 static struct platform_driver qcom_a53pll_driver = {
159 .probe = qcom_a53pll_probe,
161 .name = "qcom-a53pll",
162 .of_match_table = qcom_a53pll_match_table,
165 module_platform_driver(qcom_a53pll_driver);
167 MODULE_DESCRIPTION("Qualcomm A53 PLL Driver");
168 MODULE_LICENSE("GPL v2");