drivers/clk/mediatek/clk-mtk.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014 MediaTek Inc.
   4  * Author: James Liao <jamesjj.liao@mediatek.com>
   5  */
   6
   7 #include <linux/of.h>
   8 #include <linux/of_address.h>
   9 #include <linux/err.h>
  10 #include <linux/io.h>
  11 #include <linux/slab.h>
  12 #include <linux/delay.h>
  13 #include <linux/clkdev.h>
  14 #include <linux/module.h>
  15 #include <linux/mfd/syscon.h>
  16 #include <linux/device.h>
  17 #include <linux/of_device.h>
  18
  19 #include "clk-mtk.h"
  20 #include "clk-gate.h"
  21
  22 struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
  23 {
  24         int i;
  25         struct clk_onecell_data *clk_data;
  26
  27         clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
  28         if (!clk_data)
  29                 return NULL;
  30
  31         clk_data->clks = kcalloc(clk_num, sizeof(*clk_data->clks), GFP_KERNEL);
  32         if (!clk_data->clks)
  33                 goto err_out;
  34
  35         clk_data->clk_num = clk_num;
  36
  37         for (i = 0; i < clk_num; i++)
  38                 clk_data->clks[i] = ERR_PTR(-ENOENT);
  39
  40         return clk_data;
  41 err_out:
  42         kfree(clk_data);
  43
  44         return NULL;
  45 }
  46 EXPORT_SYMBOL_GPL(mtk_alloc_clk_data);
  47
  48 void mtk_free_clk_data(struct clk_onecell_data *clk_data)
  49 {
  50         if (!clk_data)
  51                 return;
  52
  53         kfree(clk_data->clks);
  54         kfree(clk_data);
  55 }
  56
  57 void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks,
  58                 int num, struct clk_onecell_data *clk_data)
  59 {
  60         int i;
  61         struct clk *clk;
  62
  63         for (i = 0; i < num; i++) {
  64                 const struct mtk_fixed_clk *rc = &clks[i];
  65
  66                 if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[rc->id]))
  67                         continue;
  68
  69                 clk = clk_register_fixed_rate(NULL, rc->name, rc->parent, 0,
  70                                               rc->rate);
  71
  72                 if (IS_ERR(clk)) {
  73                         pr_err("Failed to register clk %s: %ld\n",
  74                                         rc->name, PTR_ERR(clk));
  75                         continue;
  76                 }
  77
  78                 if (clk_data)
  79                         clk_data->clks[rc->id] = clk;
  80         }
  81 }
  82 EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks);
  83
  84 void mtk_clk_register_factors(const struct mtk_fixed_factor *clks,
  85                 int num, struct clk_onecell_data *clk_data)
  86 {
  87         int i;
  88         struct clk *clk;
  89
  90         for (i = 0; i < num; i++) {
  91                 const struct mtk_fixed_factor *ff = &clks[i];
  92
  93                 if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[ff->id]))
  94                         continue;
  95
  96                 clk = clk_register_fixed_factor(NULL, ff->name, ff->parent_name,
  97                                 CLK_SET_RATE_PARENT, ff->mult, ff->div);
  98
  99                 if (IS_ERR(clk)) {
 100                         pr_err("Failed to register clk %s: %ld\n",
 101                                         ff->name, PTR_ERR(clk));
 102                         continue;
 103                 }
 104
 105                 if (clk_data)
 106                         clk_data->clks[ff->id] = clk;
 107         }
 108 }
 109 EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
 110
 111 int mtk_clk_register_gates_with_dev(struct device_node *node,
 112                 const struct mtk_gate *clks,
 113                 int num, struct clk_onecell_data *clk_data,
 114                 struct device *dev)
 115 {
 116         int i;
 117         struct clk *clk;
 118         struct regmap *regmap;
 119
 120         if (!clk_data)
 121                 return -ENOMEM;
 122
 123         regmap = device_node_to_regmap(node);
 124         if (IS_ERR(regmap)) {
 125                 pr_err("Cannot find regmap for %pOF: %ld\n", node,
 126                                 PTR_ERR(regmap));
 127                 return PTR_ERR(regmap);
 128         }
 129
 130         for (i = 0; i < num; i++) {
 131                 const struct mtk_gate *gate = &clks[i];
 132
 133                 if (!IS_ERR_OR_NULL(clk_data->clks[gate->id]))
 134                         continue;
 135
 136                 clk = mtk_clk_register_gate(gate->name, gate->parent_name,
 137                                 regmap,
 138                                 gate->regs->set_ofs,
 139                                 gate->regs->clr_ofs,
 140                                 gate->regs->sta_ofs,
 141                                 gate->shift, gate->ops, gate->flags, dev);
 142
 143                 if (IS_ERR(clk)) {
 144                         pr_err("Failed to register clk %s: %ld\n",
 145                                         gate->name, PTR_ERR(clk));
 146                         continue;
 147                 }
 148
 149                 clk_data->clks[gate->id] = clk;
 150         }
 151
 152         return 0;
 153 }
 154
 155 int mtk_clk_register_gates(struct device_node *node,
 156                 const struct mtk_gate *clks,
 157                 int num, struct clk_onecell_data *clk_data)
 158 {
 159         return mtk_clk_register_gates_with_dev(node,
 160                 clks, num, clk_data, NULL);
 161 }
 162 EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
 163
 164 struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
 165                 void __iomem *base, spinlock_t *lock)
 166 {
 167         struct clk *clk;
 168         struct clk_mux *mux = NULL;
 169         struct clk_gate *gate = NULL;
 170         struct clk_divider *div = NULL;
 171         struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
 172         const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
 173         const char * const *parent_names;
 174         const char *parent;
 175         int num_parents;
 176         int ret;
 177
 178         if (mc->mux_shift >= 0) {
 179                 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
 180                 if (!mux)
 181                         return ERR_PTR(-ENOMEM);
 182
 183                 mux->reg = base + mc->mux_reg;
 184                 mux->mask = BIT(mc->mux_width) - 1;
 185                 mux->shift = mc->mux_shift;
 186                 mux->lock = lock;
 187                 mux->flags = mc->mux_flags;
 188                 mux_hw = &mux->hw;
 189                 mux_ops = &clk_mux_ops;
 190
 191                 parent_names = mc->parent_names;
 192                 num_parents = mc->num_parents;
 193         } else {
 194                 parent = mc->parent;
 195                 parent_names = &parent;
 196                 num_parents = 1;
 197         }
 198
 199         if (mc->gate_shift >= 0) {
 200                 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
 201                 if (!gate) {
 202                         ret = -ENOMEM;
 203                         goto err_out;
 204                 }
 205
 206                 gate->reg = base + mc->gate_reg;
 207                 gate->bit_idx = mc->gate_shift;
 208                 gate->flags = CLK_GATE_SET_TO_DISABLE;
 209                 gate->lock = lock;
 210
 211                 gate_hw = &gate->hw;
 212                 gate_ops = &clk_gate_ops;
 213         }
 214
 215         if (mc->divider_shift >= 0) {
 216                 div = kzalloc(sizeof(*div), GFP_KERNEL);
 217                 if (!div) {
 218                         ret = -ENOMEM;
 219                         goto err_out;
 220                 }
 221
 222                 div->reg = base + mc->divider_reg;
 223                 div->shift = mc->divider_shift;
 224                 div->width = mc->divider_width;
 225                 div->lock = lock;
 226
 227                 div_hw = &div->hw;
 228                 div_ops = &clk_divider_ops;
 229         }
 230
 231         clk = clk_register_composite(NULL, mc->name, parent_names, num_parents,
 232                 mux_hw, mux_ops,
 233                 div_hw, div_ops,
 234                 gate_hw, gate_ops,
 235                 mc->flags);
 236
 237         if (IS_ERR(clk)) {
 238                 ret = PTR_ERR(clk);
 239                 goto err_out;
 240         }
 241
 242         return clk;
 243 err_out:
 244         kfree(div);
 245         kfree(gate);
 246         kfree(mux);
 247
 248         return ERR_PTR(ret);
 249 }
 250
 251 void mtk_clk_register_composites(const struct mtk_composite *mcs,
 252                 int num, void __iomem *base, spinlock_t *lock,
 253                 struct clk_onecell_data *clk_data)
 254 {
 255         struct clk *clk;
 256         int i;
 257
 258         for (i = 0; i < num; i++) {
 259                 const struct mtk_composite *mc = &mcs[i];
 260
 261                 if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mc->id]))
 262                         continue;
 263
 264                 clk = mtk_clk_register_composite(mc, base, lock);
 265
 266                 if (IS_ERR(clk)) {
 267                         pr_err("Failed to register clk %s: %ld\n",
 268                                         mc->name, PTR_ERR(clk));
 269                         continue;
 270                 }
 271
 272                 if (clk_data)
 273                         clk_data->clks[mc->id] = clk;
 274         }
 275 }
 276 EXPORT_SYMBOL_GPL(mtk_clk_register_composites);
 277
 278 void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds,
 279                         int num, void __iomem *base, spinlock_t *lock,
 280                                 struct clk_onecell_data *clk_data)
 281 {
 282         struct clk *clk;
 283         int i;
 284
 285         for (i = 0; i <  num; i++) {
 286                 const struct mtk_clk_divider *mcd = &mcds[i];
 287
 288                 if (clk_data && !IS_ERR_OR_NULL(clk_data->clks[mcd->id]))
 289                         continue;
 290
 291                 clk = clk_register_divider(NULL, mcd->name, mcd->parent_name,
 292                         mcd->flags, base +  mcd->div_reg, mcd->div_shift,
 293                         mcd->div_width, mcd->clk_divider_flags, lock);
 294
 295                 if (IS_ERR(clk)) {
 296                         pr_err("Failed to register clk %s: %ld\n",
 297                                 mcd->name, PTR_ERR(clk));
 298                         continue;
 299                 }
 300
 301                 if (clk_data)
 302                         clk_data->clks[mcd->id] = clk;
 303         }
 304 }
 305
 306 int mtk_clk_simple_probe(struct platform_device *pdev)
 307 {
 308         const struct mtk_clk_desc *mcd;
 309         struct clk_onecell_data *clk_data;
 310         struct device_node *node = pdev->dev.of_node;
 311         int r;
 312
 313         mcd = of_device_get_match_data(&pdev->dev);
 314         if (!mcd)
 315                 return -EINVAL;
 316
 317         clk_data = mtk_alloc_clk_data(mcd->num_clks);
 318         if (!clk_data)
 319                 return -ENOMEM;
 320
 321         r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, clk_data);
 322         if (r)
 323                 goto free_data;
 324
 325         r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
 326         if (r)
 327                 goto free_data;
 328
 329         return r;
 330
 331 free_data:
 332         mtk_free_clk_data(clk_data);
 333         return r;
 334 }
 335
 336 MODULE_LICENSE("GPL");