drivers/clk/mediatek/clk-mtk.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014 MediaTek Inc.
   4  * Author: James Liao <jamesjj.liao@mediatek.com>
   5  */
   6
   7 #include <linux/bitops.h>
   8 #include <linux/clk-provider.h>
   9 #include <linux/err.h>
  10 #include <linux/io.h>
  11 #include <linux/mfd/syscon.h>
  12 #include <linux/module.h>
  13 #include <linux/of.h>
  14 #include <linux/of_address.h>
  15 #include <linux/of_device.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/slab.h>
  18
  19 #include "clk-mtk.h"
  20 #include "clk-gate.h"
  21 #include "clk-mux.h"
  22
  23 const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
  24 EXPORT_SYMBOL_GPL(cg_regs_dummy);
  25
  26 static int mtk_clk_dummy_enable(struct clk_hw *hw)
  27 {
  28         return 0;
  29 }
  30
  31 static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
  32
  33 const struct clk_ops mtk_clk_dummy_ops = {
  34         .enable         = mtk_clk_dummy_enable,
  35         .disable        = mtk_clk_dummy_disable,
  36 };
  37 EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
  38
  39 static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
  40                               unsigned int clk_num)
  41 {
  42         int i;
  43
  44         clk_data->num = clk_num;
  45
  46         for (i = 0; i < clk_num; i++)
  47                 clk_data->hws[i] = ERR_PTR(-ENOENT);
  48 }
  49
  50 struct clk_hw_onecell_data *mtk_devm_alloc_clk_data(struct device *dev,
  51                                                     unsigned int clk_num)
  52 {
  53         struct clk_hw_onecell_data *clk_data;
  54
  55         clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, clk_num),
  56                                 GFP_KERNEL);
  57         if (!clk_data)
  58                 return NULL;
  59
  60         mtk_init_clk_data(clk_data, clk_num);
  61
  62         return clk_data;
  63 }
  64 EXPORT_SYMBOL_GPL(mtk_devm_alloc_clk_data);
  65
  66 struct clk_hw_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
  67 {
  68         struct clk_hw_onecell_data *clk_data;
  69
  70         clk_data = kzalloc(struct_size(clk_data, hws, clk_num), GFP_KERNEL);
  71         if (!clk_data)
  72                 return NULL;
  73
  74         mtk_init_clk_data(clk_data, clk_num);
  75
  76         return clk_data;
  77 }
  78 EXPORT_SYMBOL_GPL(mtk_alloc_clk_data);
  79
  80 void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data)
  81 {
  82         kfree(clk_data);
  83 }
  84 EXPORT_SYMBOL_GPL(mtk_free_clk_data);
  85
  86 int mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, int num,
  87                                 struct clk_hw_onecell_data *clk_data)
  88 {
  89         int i;
  90         struct clk_hw *hw;
  91
  92         if (!clk_data)
  93                 return -ENOMEM;
  94
  95         for (i = 0; i < num; i++) {
  96                 const struct mtk_fixed_clk *rc = &clks[i];
  97
  98                 if (!IS_ERR_OR_NULL(clk_data->hws[rc->id])) {
  99                         pr_warn("Trying to register duplicate clock ID: %d\n", rc->id);
 100                         continue;
 101                 }
 102
 103                 hw = clk_hw_register_fixed_rate(NULL, rc->name, rc->parent, 0,
 104                                               rc->rate);
 105
 106                 if (IS_ERR(hw)) {
 107                         pr_err("Failed to register clk %s: %pe\n", rc->name,
 108                                hw);
 109                         goto err;
 110                 }
 111
 112                 clk_data->hws[rc->id] = hw;
 113         }
 114
 115         return 0;
 116
 117 err:
 118         while (--i >= 0) {
 119                 const struct mtk_fixed_clk *rc = &clks[i];
 120
 121                 if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
 122                         continue;
 123
 124                 clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
 125                 clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
 126         }
 127
 128         return PTR_ERR(hw);
 129 }
 130 EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks);
 131
 132 void mtk_clk_unregister_fixed_clks(const struct mtk_fixed_clk *clks, int num,
 133                                    struct clk_hw_onecell_data *clk_data)
 134 {
 135         int i;
 136
 137         if (!clk_data)
 138                 return;
 139
 140         for (i = num; i > 0; i--) {
 141                 const struct mtk_fixed_clk *rc = &clks[i - 1];
 142
 143                 if (IS_ERR_OR_NULL(clk_data->hws[rc->id]))
 144                         continue;
 145
 146                 clk_hw_unregister_fixed_rate(clk_data->hws[rc->id]);
 147                 clk_data->hws[rc->id] = ERR_PTR(-ENOENT);
 148         }
 149 }
 150 EXPORT_SYMBOL_GPL(mtk_clk_unregister_fixed_clks);
 151
 152 int mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
 153                              struct clk_hw_onecell_data *clk_data)
 154 {
 155         int i;
 156         struct clk_hw *hw;
 157
 158         if (!clk_data)
 159                 return -ENOMEM;
 160
 161         for (i = 0; i < num; i++) {
 162                 const struct mtk_fixed_factor *ff = &clks[i];
 163
 164                 if (!IS_ERR_OR_NULL(clk_data->hws[ff->id])) {
 165                         pr_warn("Trying to register duplicate clock ID: %d\n", ff->id);
 166                         continue;
 167                 }
 168
 169                 hw = clk_hw_register_fixed_factor(NULL, ff->name, ff->parent_name,
 170                                 ff->flags, ff->mult, ff->div);
 171
 172                 if (IS_ERR(hw)) {
 173                         pr_err("Failed to register clk %s: %pe\n", ff->name,
 174                                hw);
 175                         goto err;
 176                 }
 177
 178                 clk_data->hws[ff->id] = hw;
 179         }
 180
 181         return 0;
 182
 183 err:
 184         while (--i >= 0) {
 185                 const struct mtk_fixed_factor *ff = &clks[i];
 186
 187                 if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
 188                         continue;
 189
 190                 clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
 191                 clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
 192         }
 193
 194         return PTR_ERR(hw);
 195 }
 196 EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
 197
 198 void mtk_clk_unregister_factors(const struct mtk_fixed_factor *clks, int num,
 199                                 struct clk_hw_onecell_data *clk_data)
 200 {
 201         int i;
 202
 203         if (!clk_data)
 204                 return;
 205
 206         for (i = num; i > 0; i--) {
 207                 const struct mtk_fixed_factor *ff = &clks[i - 1];
 208
 209                 if (IS_ERR_OR_NULL(clk_data->hws[ff->id]))
 210                         continue;
 211
 212                 clk_hw_unregister_fixed_factor(clk_data->hws[ff->id]);
 213                 clk_data->hws[ff->id] = ERR_PTR(-ENOENT);
 214         }
 215 }
 216 EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
 217
 218 static struct clk_hw *mtk_clk_register_composite(struct device *dev,
 219                 const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
 220 {
 221         struct clk_hw *hw;
 222         struct clk_mux *mux = NULL;
 223         struct clk_gate *gate = NULL;
 224         struct clk_divider *div = NULL;
 225         struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
 226         const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
 227         const char * const *parent_names;
 228         const char *parent;
 229         int num_parents;
 230         int ret;
 231
 232         if (mc->mux_shift >= 0) {
 233                 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
 234                 if (!mux)
 235                         return ERR_PTR(-ENOMEM);
 236
 237                 mux->reg = base + mc->mux_reg;
 238                 mux->mask = BIT(mc->mux_width) - 1;
 239                 mux->shift = mc->mux_shift;
 240                 mux->lock = lock;
 241                 mux->flags = mc->mux_flags;
 242                 mux_hw = &mux->hw;
 243                 mux_ops = &clk_mux_ops;
 244
 245                 parent_names = mc->parent_names;
 246                 num_parents = mc->num_parents;
 247         } else {
 248                 parent = mc->parent;
 249                 parent_names = &parent;
 250                 num_parents = 1;
 251         }
 252
 253         if (mc->gate_shift >= 0) {
 254                 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
 255                 if (!gate) {
 256                         ret = -ENOMEM;
 257                         goto err_out;
 258                 }
 259
 260                 gate->reg = base + mc->gate_reg;
 261                 gate->bit_idx = mc->gate_shift;
 262                 gate->flags = CLK_GATE_SET_TO_DISABLE;
 263                 gate->lock = lock;
 264
 265                 gate_hw = &gate->hw;
 266                 gate_ops = &clk_gate_ops;
 267         }
 268
 269         if (mc->divider_shift >= 0) {
 270                 div = kzalloc(sizeof(*div), GFP_KERNEL);
 271                 if (!div) {
 272                         ret = -ENOMEM;
 273                         goto err_out;
 274                 }
 275
 276                 div->reg = base + mc->divider_reg;
 277                 div->shift = mc->divider_shift;
 278                 div->width = mc->divider_width;
 279                 div->lock = lock;
 280
 281                 div_hw = &div->hw;
 282                 div_ops = &clk_divider_ops;
 283         }
 284
 285         hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
 286                 mux_hw, mux_ops,
 287                 div_hw, div_ops,
 288                 gate_hw, gate_ops,
 289                 mc->flags);
 290
 291         if (IS_ERR(hw)) {
 292                 ret = PTR_ERR(hw);
 293                 goto err_out;
 294         }
 295
 296         return hw;
 297 err_out:
 298         kfree(div);
 299         kfree(gate);
 300         kfree(mux);
 301
 302         return ERR_PTR(ret);
 303 }
 304
 305 static void mtk_clk_unregister_composite(struct clk_hw *hw)
 306 {
 307         struct clk_composite *composite;
 308         struct clk_mux *mux = NULL;
 309         struct clk_gate *gate = NULL;
 310         struct clk_divider *div = NULL;
 311
 312         if (!hw)
 313                 return;
 314
 315         composite = to_clk_composite(hw);
 316         if (composite->mux_hw)
 317                 mux = to_clk_mux(composite->mux_hw);
 318         if (composite->gate_hw)
 319                 gate = to_clk_gate(composite->gate_hw);
 320         if (composite->rate_hw)
 321                 div = to_clk_divider(composite->rate_hw);
 322
 323         clk_hw_unregister_composite(hw);
 324         kfree(div);
 325         kfree(gate);
 326         kfree(mux);
 327 }
 328
 329 int mtk_clk_register_composites(struct device *dev,
 330                                 const struct mtk_composite *mcs, int num,
 331                                 void __iomem *base, spinlock_t *lock,
 332                                 struct clk_hw_onecell_data *clk_data)
 333 {
 334         struct clk_hw *hw;
 335         int i;
 336
 337         if (!clk_data)
 338                 return -ENOMEM;
 339
 340         for (i = 0; i < num; i++) {
 341                 const struct mtk_composite *mc = &mcs[i];
 342
 343                 if (!IS_ERR_OR_NULL(clk_data->hws[mc->id])) {
 344                         pr_warn("Trying to register duplicate clock ID: %d\n",
 345                                 mc->id);
 346                         continue;
 347                 }
 348
 349                 hw = mtk_clk_register_composite(dev, mc, base, lock);
 350
 351                 if (IS_ERR(hw)) {
 352                         pr_err("Failed to register clk %s: %pe\n", mc->name,
 353                                hw);
 354                         goto err;
 355                 }
 356
 357                 clk_data->hws[mc->id] = hw;
 358         }
 359
 360         return 0;
 361
 362 err:
 363         while (--i >= 0) {
 364                 const struct mtk_composite *mc = &mcs[i];
 365
 366                 if (IS_ERR_OR_NULL(clk_data->hws[mcs->id]))
 367                         continue;
 368
 369                 mtk_clk_unregister_composite(clk_data->hws[mc->id]);
 370                 clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
 371         }
 372
 373         return PTR_ERR(hw);
 374 }
 375 EXPORT_SYMBOL_GPL(mtk_clk_register_composites);
 376
 377 void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
 378                                    struct clk_hw_onecell_data *clk_data)
 379 {
 380         int i;
 381
 382         if (!clk_data)
 383                 return;
 384
 385         for (i = num; i > 0; i--) {
 386                 const struct mtk_composite *mc = &mcs[i - 1];
 387
 388                 if (IS_ERR_OR_NULL(clk_data->hws[mc->id]))
 389                         continue;
 390
 391                 mtk_clk_unregister_composite(clk_data->hws[mc->id]);
 392                 clk_data->hws[mc->id] = ERR_PTR(-ENOENT);
 393         }
 394 }
 395 EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites);
 396
 397 int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num,
 398                               void __iomem *base, spinlock_t *lock,
 399                               struct clk_hw_onecell_data *clk_data)
 400 {
 401         struct clk_hw *hw;
 402         int i;
 403
 404         if (!clk_data)
 405                 return -ENOMEM;
 406
 407         for (i = 0; i <  num; i++) {
 408                 const struct mtk_clk_divider *mcd = &mcds[i];
 409
 410                 if (!IS_ERR_OR_NULL(clk_data->hws[mcd->id])) {
 411                         pr_warn("Trying to register duplicate clock ID: %d\n",
 412                                 mcd->id);
 413                         continue;
 414                 }
 415
 416                 hw = clk_hw_register_divider(NULL, mcd->name, mcd->parent_name,
 417                         mcd->flags, base +  mcd->div_reg, mcd->div_shift,
 418                         mcd->div_width, mcd->clk_divider_flags, lock);
 419
 420                 if (IS_ERR(hw)) {
 421                         pr_err("Failed to register clk %s: %pe\n", mcd->name,
 422                                hw);
 423                         goto err;
 424                 }
 425
 426                 clk_data->hws[mcd->id] = hw;
 427         }
 428
 429         return 0;
 430
 431 err:
 432         while (--i >= 0) {
 433                 const struct mtk_clk_divider *mcd = &mcds[i];
 434
 435                 if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
 436                         continue;
 437
 438                 clk_hw_unregister_divider(clk_data->hws[mcd->id]);
 439                 clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
 440         }
 441
 442         return PTR_ERR(hw);
 443 }
 444 EXPORT_SYMBOL_GPL(mtk_clk_register_dividers);
 445
 446 void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,
 447                                  struct clk_hw_onecell_data *clk_data)
 448 {
 449         int i;
 450
 451         if (!clk_data)
 452                 return;
 453
 454         for (i = num; i > 0; i--) {
 455                 const struct mtk_clk_divider *mcd = &mcds[i - 1];
 456
 457                 if (IS_ERR_OR_NULL(clk_data->hws[mcd->id]))
 458                         continue;
 459
 460                 clk_hw_unregister_divider(clk_data->hws[mcd->id]);
 461                 clk_data->hws[mcd->id] = ERR_PTR(-ENOENT);
 462         }
 463 }
 464 EXPORT_SYMBOL_GPL(mtk_clk_unregister_dividers);
 465
 466 int mtk_clk_simple_probe(struct platform_device *pdev)
 467 {
 468         const struct mtk_clk_desc *mcd;
 469         struct clk_hw_onecell_data *clk_data;
 470         struct device_node *node = pdev->dev.of_node;
 471         void __iomem *base;
 472         int num_clks, r;
 473
 474         mcd = of_device_get_match_data(&pdev->dev);
 475         if (!mcd)
 476                 return -EINVAL;
 477
 478         /* Composite clocks needs us to pass iomem pointer */
 479         if (mcd->composite_clks) {
 480                 if (!mcd->shared_io)
 481                         base = devm_platform_ioremap_resource(pdev, 0);
 482                 else
 483                         base = of_iomap(node, 0);
 484
 485                 if (IS_ERR_OR_NULL(base))
 486                         return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM;
 487         }
 488
 489         /* Calculate how many clk_hw_onecell_data entries to allocate */
 490         num_clks = mcd->num_clks + mcd->num_composite_clks;
 491         num_clks += mcd->num_fixed_clks + mcd->num_factor_clks;
 492         num_clks += mcd->num_mux_clks;
 493
 494         clk_data = mtk_alloc_clk_data(num_clks);
 495         if (!clk_data)
 496                 return -ENOMEM;
 497
 498         if (mcd->fixed_clks) {
 499                 r = mtk_clk_register_fixed_clks(mcd->fixed_clks,
 500                                                 mcd->num_fixed_clks, clk_data);
 501                 if (r)
 502                         goto free_data;
 503         }
 504
 505         if (mcd->factor_clks) {
 506                 r = mtk_clk_register_factors(mcd->factor_clks,
 507                                              mcd->num_factor_clks, clk_data);
 508                 if (r)
 509                         goto unregister_fixed_clks;
 510         }
 511
 512         if (mcd->mux_clks) {
 513                 r = mtk_clk_register_muxes(&pdev->dev, mcd->mux_clks,
 514                                            mcd->num_mux_clks, node,
 515                                            mcd->clk_lock, clk_data);
 516                 if (r)
 517                         goto unregister_factors;
 518         }
 519
 520         if (mcd->composite_clks) {
 521                 /* We don't check composite_lock because it's optional */
 522                 r = mtk_clk_register_composites(&pdev->dev,
 523                                                 mcd->composite_clks,
 524                                                 mcd->num_composite_clks,
 525                                                 base, mcd->clk_lock, clk_data);
 526                 if (r)
 527                         goto unregister_muxes;
 528         }
 529
 530         if (mcd->clks) {
 531                 r = mtk_clk_register_gates(&pdev->dev, node, mcd->clks,
 532                                            mcd->num_clks, clk_data);
 533                 if (r)
 534                         goto unregister_composites;
 535         }
 536
 537         if (mcd->clk_notifier_func) {
 538                 struct clk *mfg_mux = clk_data->hws[mcd->mfg_clk_idx]->clk;
 539
 540                 r = mcd->clk_notifier_func(&pdev->dev, mfg_mux);
 541                 if (r)
 542                         goto unregister_clks;
 543         }
 544
 545         r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
 546         if (r)
 547                 goto unregister_clks;
 548
 549         platform_set_drvdata(pdev, clk_data);
 550
 551         if (mcd->rst_desc) {
 552                 r = mtk_register_reset_controller_with_dev(&pdev->dev,
 553                                                            mcd->rst_desc);
 554                 if (r)
 555                         goto unregister_clks;
 556         }
 557
 558         return r;
 559
 560 unregister_clks:
 561         if (mcd->clks)
 562                 mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
 563 unregister_composites:
 564         if (mcd->composite_clks)
 565                 mtk_clk_unregister_composites(mcd->composite_clks,
 566                                               mcd->num_composite_clks, clk_data);
 567 unregister_muxes:
 568         if (mcd->mux_clks)
 569                 mtk_clk_unregister_muxes(mcd->mux_clks,
 570                                          mcd->num_mux_clks, clk_data);
 571 unregister_factors:
 572         if (mcd->factor_clks)
 573                 mtk_clk_unregister_factors(mcd->factor_clks,
 574                                            mcd->num_factor_clks, clk_data);
 575 unregister_fixed_clks:
 576         if (mcd->fixed_clks)
 577                 mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
 578                                               mcd->num_fixed_clks, clk_data);
 579 free_data:
 580         mtk_free_clk_data(clk_data);
 581         if (mcd->shared_io && base)
 582                 iounmap(base);
 583         return r;
 584 }
 585 EXPORT_SYMBOL_GPL(mtk_clk_simple_probe);
 586
 587 int mtk_clk_simple_remove(struct platform_device *pdev)
 588 {
 589         const struct mtk_clk_desc *mcd = of_device_get_match_data(&pdev->dev);
 590         struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
 591         struct device_node *node = pdev->dev.of_node;
 592
 593         of_clk_del_provider(node);
 594         if (mcd->clks)
 595                 mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data);
 596         if (mcd->composite_clks)
 597                 mtk_clk_unregister_composites(mcd->composite_clks,
 598                                               mcd->num_composite_clks, clk_data);
 599         if (mcd->mux_clks)
 600                 mtk_clk_unregister_muxes(mcd->mux_clks,
 601                                          mcd->num_mux_clks, clk_data);
 602         if (mcd->factor_clks)
 603                 mtk_clk_unregister_factors(mcd->factor_clks,
 604                                            mcd->num_factor_clks, clk_data);
 605         if (mcd->fixed_clks)
 606                 mtk_clk_unregister_fixed_clks(mcd->fixed_clks,
 607                                               mcd->num_fixed_clks, clk_data);
 608         mtk_free_clk_data(clk_data);
 609
 610         return 0;
 611 }
 612 EXPORT_SYMBOL_GPL(mtk_clk_simple_remove);
 613
 614 MODULE_LICENSE("GPL");