1 // SPDX-License-Identifier: GPL-2.0-only
3 // Copyright (c) 2021 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
9 #include <dt-bindings/clock/mt8195-clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/platform_device.h>
13 static const struct mtk_gate_regs venc_cg_regs = {
19 #define GATE_VENC(_id, _name, _parent, _shift) \
20 GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
22 static const struct mtk_gate venc_clks[] = {
23 GATE_VENC(CLK_VENC_LARB, "venc_larb", "top_venc", 0),
24 GATE_VENC(CLK_VENC_VENC, "venc_venc", "top_venc", 4),
25 GATE_VENC(CLK_VENC_JPGENC, "venc_jpgenc", "top_venc", 8),
26 GATE_VENC(CLK_VENC_JPGDEC, "venc_jpgdec", "top_venc", 12),
27 GATE_VENC(CLK_VENC_JPGDEC_C1, "venc_jpgdec_c1", "top_venc", 16),
28 GATE_VENC(CLK_VENC_GALS, "venc_gals", "top_venc", 28),
31 static const struct mtk_gate venc_core1_clks[] = {
32 GATE_VENC(CLK_VENC_CORE1_LARB, "venc_core1_larb", "top_venc", 0),
33 GATE_VENC(CLK_VENC_CORE1_VENC, "venc_core1_venc", "top_venc", 4),
34 GATE_VENC(CLK_VENC_CORE1_JPGENC, "venc_core1_jpgenc", "top_venc", 8),
35 GATE_VENC(CLK_VENC_CORE1_JPGDEC, "venc_core1_jpgdec", "top_venc", 12),
36 GATE_VENC(CLK_VENC_CORE1_JPGDEC_C1, "venc_core1_jpgdec_c1", "top_venc", 16),
37 GATE_VENC(CLK_VENC_CORE1_GALS, "venc_core1_gals", "top_venc", 28),
40 static const struct mtk_clk_desc venc_desc = {
42 .num_clks = ARRAY_SIZE(venc_clks),
45 static const struct mtk_clk_desc venc_core1_desc = {
46 .clks = venc_core1_clks,
47 .num_clks = ARRAY_SIZE(venc_core1_clks),
50 static const struct of_device_id of_match_clk_mt8195_venc[] = {
52 .compatible = "mediatek,mt8195-vencsys",
55 .compatible = "mediatek,mt8195-vencsys_core1",
56 .data = &venc_core1_desc,
62 static struct platform_driver clk_mt8195_venc_drv = {
63 .probe = mtk_clk_simple_probe,
64 .remove = mtk_clk_simple_remove,
66 .name = "clk-mt8195-venc",
67 .of_match_table = of_match_clk_mt8195_venc,
70 builtin_platform_driver(clk_mt8195_venc_drv);