1 // SPDX-License-Identifier: GPL-2.0-only
3 // Copyright (c) 2021 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
9 #include <dt-bindings/clock/mt8195-clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/platform_device.h>
13 static const struct mtk_gate_regs mfg_cg_regs = {
19 #define GATE_MFG(_id, _name, _parent, _shift) \
20 GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, \
21 _shift, &mtk_clk_gate_ops_setclr, \
24 static const struct mtk_gate mfg_clks[] = {
25 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_ck_fast_ref", 0),
28 static const struct mtk_clk_desc mfg_desc = {
30 .num_clks = ARRAY_SIZE(mfg_clks),
33 static const struct of_device_id of_match_clk_mt8195_mfg[] = {
35 .compatible = "mediatek,mt8195-mfgcfg",
42 static struct platform_driver clk_mt8195_mfg_drv = {
43 .probe = mtk_clk_simple_probe,
44 .remove = mtk_clk_simple_remove,
46 .name = "clk-mt8195-mfg",
47 .of_match_table = of_match_clk_mt8195_mfg,
50 builtin_platform_driver(clk_mt8195_mfg_drv);