1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2022 Collabora Ltd.
4 * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
8 #include <linux/module.h>
9 #include <linux/platform_device.h>
13 #define GATE_VDEC(_id, _name, _parent, _regs) \
14 GATE_MTK(_id, _name, _parent, _regs, 0, \
15 &mtk_clk_gate_ops_setclr_inv)
17 static const struct mtk_gate_regs vdec0_cg_regs = {
23 static const struct mtk_gate_regs vdec1_cg_regs = {
29 static const struct mtk_gate vdec_clks[] = {
30 GATE_VDEC(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", &vdec0_cg_regs),
31 GATE_VDEC(CLK_VDEC_LARB_CKEN, "vdec_larb_cken", "mm_sel", &vdec1_cg_regs),
34 static const struct mtk_clk_desc vdec_desc = {
36 .num_clks = ARRAY_SIZE(vdec_clks),
39 static const struct of_device_id of_match_clk_mt6795_vdecsys[] = {
40 { .compatible = "mediatek,mt6795-vdecsys", .data = &vdec_desc },
44 static struct platform_driver clk_mt6795_vdecsys_drv = {
45 .probe = mtk_clk_simple_probe,
46 .remove = mtk_clk_simple_remove,
48 .name = "clk-mt6795-vdecsys",
49 .of_match_table = of_match_clk_mt6795_vdecsys,
52 module_platform_driver(clk_mt6795_vdecsys_drv);
54 MODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver");
55 MODULE_LICENSE("GPL");