1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Owen Chen <owen.chen@mediatek.com>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 #include <dt-bindings/clock/mt6765-clk.h>
15 static const struct mtk_gate_regs mipi0a_cg_regs = {
21 #define GATE_MIPI0A(_id, _name, _parent, _shift) { \
24 .parent_name = _parent, \
25 .regs = &mipi0a_cg_regs, \
27 .ops = &mtk_clk_gate_ops_no_setclr_inv, \
30 static const struct mtk_gate mipi0a_clks[] = {
31 GATE_MIPI0A(CLK_MIPI0A_CSR_CSI_EN_0A,
32 "mipi0a_csr_0a", "f_fseninf_ck", 1),
35 static const struct mtk_clk_desc mipi0a_desc = {
37 .num_clks = ARRAY_SIZE(mipi0a_clks),
40 static const struct of_device_id of_match_clk_mt6765_mipi0a[] = {
42 .compatible = "mediatek,mt6765-mipi0a",
49 static struct platform_driver clk_mt6765_mipi0a_drv = {
50 .probe = mtk_clk_simple_probe,
51 .remove = mtk_clk_simple_remove,
53 .name = "clk-mt6765-mipi0a",
54 .of_match_table = of_match_clk_mt6765_mipi0a,
58 builtin_platform_driver(clk_mt6765_mipi0a_drv);