Merge branches 'clk-baikal', 'clk-broadcom', 'clk-vc5' and 'clk-versaclock' into...
[platform/kernel/linux-starfive.git] / drivers / clk / mediatek / clk-mt6765-audio.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018 MediaTek Inc.
4  * Author: Owen Chen <owen.chen@mediatek.com>
5  */
6
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
9
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12
13 #include <dt-bindings/clock/mt6765-clk.h>
14
15 static const struct mtk_gate_regs audio0_cg_regs = {
16         .set_ofs = 0x0,
17         .clr_ofs = 0x0,
18         .sta_ofs = 0x0,
19 };
20
21 static const struct mtk_gate_regs audio1_cg_regs = {
22         .set_ofs = 0x4,
23         .clr_ofs = 0x4,
24         .sta_ofs = 0x4,
25 };
26
27 #define GATE_AUDIO0(_id, _name, _parent, _shift) {      \
28                 .id = _id,                              \
29                 .name = _name,                          \
30                 .parent_name = _parent,                 \
31                 .regs = &audio0_cg_regs,                \
32                 .shift = _shift,                        \
33                 .ops = &mtk_clk_gate_ops_no_setclr,     \
34         }
35
36 #define GATE_AUDIO1(_id, _name, _parent, _shift) {      \
37                 .id = _id,                              \
38                 .name = _name,                          \
39                 .parent_name = _parent,                 \
40                 .regs = &audio1_cg_regs,                \
41                 .shift = _shift,                        \
42                 .ops = &mtk_clk_gate_ops_no_setclr,     \
43         }
44
45 static const struct mtk_gate audio_clks[] = {
46         /* AUDIO0 */
47         GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_ck", 2),
48         GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_engen1_ck", 8),
49         GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner",
50                     "aud_engen1_ck", 19),
51         GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_ck", 24),
52         GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_ck", 25),
53         GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis",
54                     "audio_ck", 26),
55         GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_ck", 27),
56         /* AUDIO1 */
57         GATE_AUDIO1(CLK_AUDIO_I2S1_BCLK, "aud_i2s1_bclk",
58                     "audio_ck", 4),
59         GATE_AUDIO1(CLK_AUDIO_I2S2_BCLK, "aud_i2s2_bclk",
60                     "audio_ck", 5),
61         GATE_AUDIO1(CLK_AUDIO_I2S3_BCLK, "aud_i2s3_bclk",
62                     "audio_ck", 6),
63         GATE_AUDIO1(CLK_AUDIO_I2S4_BCLK, "aud_i2s4_bclk",
64                     "audio_ck", 7),
65 };
66
67 static const struct mtk_clk_desc audio_desc = {
68         .clks = audio_clks,
69         .num_clks = ARRAY_SIZE(audio_clks),
70 };
71
72 static const struct of_device_id of_match_clk_mt6765_audio[] = {
73         {
74                 .compatible = "mediatek,mt6765-audsys",
75                 .data = &audio_desc,
76         }, {
77                 /* sentinel */
78         }
79 };
80
81 static struct platform_driver clk_mt6765_audio_drv = {
82         .probe = mtk_clk_simple_probe,
83         .remove = mtk_clk_simple_remove,
84         .driver = {
85                 .name = "clk-mt6765-audio",
86                 .of_match_table = of_match_clk_mt6765_audio,
87         },
88 };
89
90 builtin_platform_driver(clk_mt6765_audio_drv);