1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Owen Chen <owen.chen@mediatek.com>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 #include <dt-bindings/clock/mt6765-clk.h>
15 static const struct mtk_gate_regs audio0_cg_regs = {
21 static const struct mtk_gate_regs audio1_cg_regs = {
27 #define GATE_AUDIO0(_id, _name, _parent, _shift) { \
30 .parent_name = _parent, \
31 .regs = &audio0_cg_regs, \
33 .ops = &mtk_clk_gate_ops_no_setclr, \
36 #define GATE_AUDIO1(_id, _name, _parent, _shift) { \
39 .parent_name = _parent, \
40 .regs = &audio1_cg_regs, \
42 .ops = &mtk_clk_gate_ops_no_setclr, \
45 static const struct mtk_gate audio_clks[] = {
47 GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_ck", 2),
48 GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_engen1_ck", 8),
49 GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner",
51 GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_ck", 24),
52 GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_ck", 25),
53 GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis",
55 GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_ck", 27),
57 GATE_AUDIO1(CLK_AUDIO_I2S1_BCLK, "aud_i2s1_bclk",
59 GATE_AUDIO1(CLK_AUDIO_I2S2_BCLK, "aud_i2s2_bclk",
61 GATE_AUDIO1(CLK_AUDIO_I2S3_BCLK, "aud_i2s3_bclk",
63 GATE_AUDIO1(CLK_AUDIO_I2S4_BCLK, "aud_i2s4_bclk",
67 static const struct mtk_clk_desc audio_desc = {
69 .num_clks = ARRAY_SIZE(audio_clks),
72 static const struct of_device_id of_match_clk_mt6765_audio[] = {
74 .compatible = "mediatek,mt6765-audsys",
81 static struct platform_driver clk_mt6765_audio_drv = {
82 .probe = mtk_clk_simple_probe,
83 .remove = mtk_clk_simple_remove,
85 .name = "clk-mt6765-audio",
86 .of_match_table = of_match_clk_mt6765_audio,
90 builtin_platform_driver(clk_mt6765_audio_drv);