1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Shunli Wang <shunli.wang@mediatek.com>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 #include <dt-bindings/clock/mt2701-clk.h>
15 static const struct mtk_gate_regs vdec0_cg_regs = {
21 static const struct mtk_gate_regs vdec1_cg_regs = {
27 #define GATE_VDEC0(_id, _name, _parent, _shift) { \
30 .parent_name = _parent, \
31 .regs = &vdec0_cg_regs, \
33 .ops = &mtk_clk_gate_ops_setclr_inv, \
36 #define GATE_VDEC1(_id, _name, _parent, _shift) { \
39 .parent_name = _parent, \
40 .regs = &vdec1_cg_regs, \
42 .ops = &mtk_clk_gate_ops_setclr_inv, \
45 static const struct mtk_gate vdec_clks[] = {
46 GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0),
47 GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0),
50 static const struct of_device_id of_match_clk_mt2701_vdec[] = {
51 { .compatible = "mediatek,mt2701-vdecsys", },
55 static int clk_mt2701_vdec_probe(struct platform_device *pdev)
57 struct clk_hw_onecell_data *clk_data;
59 struct device_node *node = pdev->dev.of_node;
61 clk_data = mtk_alloc_clk_data(CLK_VDEC_NR);
63 mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
66 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
69 "could not register clock provider: %s: %d\n",
75 static struct platform_driver clk_mt2701_vdec_drv = {
76 .probe = clk_mt2701_vdec_probe,
78 .name = "clk-mt2701-vdec",
79 .of_match_table = of_match_clk_mt2701_vdec,
83 builtin_platform_driver(clk_mt2701_vdec_drv);