1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2019 Western Digital Corporation or its affiliates.
5 * Author: Anup Patel <anup.patel@wdc.com>
9 #include <clk-uclass.h>
13 struct clk_fixed_factor {
19 #define to_clk_fixed_factor(dev) \
20 ((struct clk_fixed_factor *)dev_get_platdata(dev))
22 static ulong clk_fixed_factor_get_rate(struct clk *clk)
25 struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
27 rate = clk_get_rate(&ff->parent);
28 if (IS_ERR_VALUE(rate))
31 do_div(rate, ff->div);
33 return rate * ff->mult;
36 const struct clk_ops clk_fixed_factor_ops = {
37 .get_rate = clk_fixed_factor_get_rate,
40 static int clk_fixed_factor_ofdata_to_platdata(struct udevice *dev)
42 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
44 struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);
46 err = clk_get_by_index(dev, 0, &ff->parent);
50 ff->div = dev_read_u32_default(dev, "clock-div", 1);
51 ff->mult = dev_read_u32_default(dev, "clock-mult", 1);
57 static const struct udevice_id clk_fixed_factor_match[] = {
59 .compatible = "fixed-factor-clock",
64 U_BOOT_DRIVER(clk_fixed_factor) = {
65 .name = "fixed_factor_clock",
67 .of_match = clk_fixed_factor_match,
68 .ofdata_to_platdata = clk_fixed_factor_ofdata_to_platdata,
69 .platdata_auto_alloc_size = sizeof(struct clk_fixed_factor),
70 .ops = &clk_fixed_factor_ops,