Merge branch '2020-08-01-misc-cleanups'
[platform/kernel/u-boot.git] / drivers / clk / clk-uclass.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015 Google, Inc
4  * Written by Simon Glass <sjg@chromium.org>
5  * Copyright (c) 2016, NVIDIA CORPORATION.
6  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
7  */
8
9 #include <common.h>
10 #include <clk.h>
11 #include <clk-uclass.h>
12 #include <dm.h>
13 #include <dt-structs.h>
14 #include <errno.h>
15 #include <log.h>
16 #include <malloc.h>
17 #include <dm/devres.h>
18 #include <dm/read.h>
19 #include <linux/bug.h>
20 #include <linux/clk-provider.h>
21 #include <linux/err.h>
22
23 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
24 {
25         return (const struct clk_ops *)dev->driver->ops;
26 }
27
28 struct clk *dev_get_clk_ptr(struct udevice *dev)
29 {
30         return (struct clk *)dev_get_uclass_priv(dev);
31 }
32
33 #if CONFIG_IS_ENABLED(OF_CONTROL)
34 # if CONFIG_IS_ENABLED(OF_PLATDATA)
35 int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
36                            struct clk *clk)
37 {
38         int ret;
39
40         ret = device_get_by_driver_info((struct driver_info *)cells->node,
41                                         &clk->dev);
42         if (ret)
43                 return ret;
44         clk->id = cells->arg[0];
45
46         return 0;
47 }
48 # else
49 static int clk_of_xlate_default(struct clk *clk,
50                                 struct ofnode_phandle_args *args)
51 {
52         debug("%s(clk=%p)\n", __func__, clk);
53
54         if (args->args_count > 1) {
55                 debug("Invaild args_count: %d\n", args->args_count);
56                 return -EINVAL;
57         }
58
59         if (args->args_count)
60                 clk->id = args->args[0];
61         else
62                 clk->id = 0;
63
64         clk->data = 0;
65
66         return 0;
67 }
68
69 static int clk_get_by_index_tail(int ret, ofnode node,
70                                  struct ofnode_phandle_args *args,
71                                  const char *list_name, int index,
72                                  struct clk *clk)
73 {
74         struct udevice *dev_clk;
75         const struct clk_ops *ops;
76
77         assert(clk);
78         clk->dev = NULL;
79         if (ret)
80                 goto err;
81
82         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
83         if (ret) {
84                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
85                       __func__, ret);
86                 return ret;
87         }
88
89         clk->dev = dev_clk;
90
91         ops = clk_dev_ops(dev_clk);
92
93         if (ops->of_xlate)
94                 ret = ops->of_xlate(clk, args);
95         else
96                 ret = clk_of_xlate_default(clk, args);
97         if (ret) {
98                 debug("of_xlate() failed: %d\n", ret);
99                 return ret;
100         }
101
102         return clk_request(dev_clk, clk);
103 err:
104         debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
105               __func__, ofnode_get_name(node), list_name, index, ret);
106         return ret;
107 }
108
109 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
110                                    int index, struct clk *clk)
111 {
112         int ret;
113         struct ofnode_phandle_args args;
114
115         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
116
117         assert(clk);
118         clk->dev = NULL;
119
120         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
121                                          index, &args);
122         if (ret) {
123                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
124                       __func__, ret);
125                 return ret;
126         }
127
128
129         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
130                                      index, clk);
131 }
132
133 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
134 {
135         struct ofnode_phandle_args args;
136         int ret;
137
138         ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
139                                          index, &args);
140
141         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
142                                      index, clk);
143 }
144
145 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
146 {
147         struct ofnode_phandle_args args;
148         int ret;
149
150         ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
151                                              index, &args);
152
153         return clk_get_by_index_tail(ret, node, &args, "clocks",
154                                      index, clk);
155 }
156
157 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
158 {
159         int i, ret, err, count;
160         
161         bulk->count = 0;
162
163         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
164         if (count < 1)
165                 return count;
166
167         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
168         if (!bulk->clks)
169                 return -ENOMEM;
170
171         for (i = 0; i < count; i++) {
172                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
173                 if (ret < 0)
174                         goto bulk_get_err;
175
176                 ++bulk->count;
177         }
178
179         return 0;
180
181 bulk_get_err:
182         err = clk_release_all(bulk->clks, bulk->count);
183         if (err)
184                 debug("%s: could release all clocks for %p\n",
185                       __func__, dev);
186
187         return ret;
188 }
189
190 static int clk_set_default_parents(struct udevice *dev, int stage)
191 {
192         struct clk clk, parent_clk;
193         int index;
194         int num_parents;
195         int ret;
196
197         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
198                                                   "#clock-cells");
199         if (num_parents < 0) {
200                 debug("%s: could not read assigned-clock-parents for %p\n",
201                       __func__, dev);
202                 return 0;
203         }
204
205         for (index = 0; index < num_parents; index++) {
206                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
207                                               index, &parent_clk);
208                 /* If -ENOENT, this is a no-op entry */
209                 if (ret == -ENOENT)
210                         continue;
211
212                 if (ret) {
213                         debug("%s: could not get parent clock %d for %s\n",
214                               __func__, index, dev_read_name(dev));
215                         return ret;
216                 }
217
218                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
219                                               index, &clk);
220                 if (ret) {
221                         debug("%s: could not get assigned clock %d for %s\n",
222                               __func__, index, dev_read_name(dev));
223                         return ret;
224                 }
225
226                 /* This is clk provider device trying to reparent itself
227                  * It cannot be done right now but need to wait after the
228                  * device is probed
229                  */
230                 if (stage == 0 && clk.dev == dev)
231                         continue;
232
233                 if (stage > 0 && clk.dev != dev)
234                         /* do not setup twice the parent clocks */
235                         continue;
236
237                 ret = clk_set_parent(&clk, &parent_clk);
238                 /*
239                  * Not all drivers may support clock-reparenting (as of now).
240                  * Ignore errors due to this.
241                  */
242                 if (ret == -ENOSYS)
243                         continue;
244
245                 if (ret < 0) {
246                         debug("%s: failed to reparent clock %d for %s\n",
247                               __func__, index, dev_read_name(dev));
248                         return ret;
249                 }
250         }
251
252         return 0;
253 }
254
255 static int clk_set_default_rates(struct udevice *dev, int stage)
256 {
257         struct clk clk;
258         int index;
259         int num_rates;
260         int size;
261         int ret = 0;
262         u32 *rates = NULL;
263
264         size = dev_read_size(dev, "assigned-clock-rates");
265         if (size < 0)
266                 return 0;
267
268         num_rates = size / sizeof(u32);
269         rates = calloc(num_rates, sizeof(u32));
270         if (!rates)
271                 return -ENOMEM;
272
273         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
274         if (ret)
275                 goto fail;
276
277         for (index = 0; index < num_rates; index++) {
278                 /* If 0 is passed, this is a no-op */
279                 if (!rates[index])
280                         continue;
281
282                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
283                                               index, &clk);
284                 if (ret) {
285                         debug("%s: could not get assigned clock %d for %s\n",
286                               __func__, index, dev_read_name(dev));
287                         continue;
288                 }
289
290                 /* This is clk provider device trying to program itself
291                  * It cannot be done right now but need to wait after the
292                  * device is probed
293                  */
294                 if (stage == 0 && clk.dev == dev)
295                         continue;
296
297                 if (stage > 0 && clk.dev != dev)
298                         /* do not setup twice the parent clocks */
299                         continue;
300
301                 ret = clk_set_rate(&clk, rates[index]);
302
303                 if (ret < 0) {
304                         debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
305                               __func__, index, clk.id, dev_read_name(dev));
306                         break;
307                 }
308         }
309
310 fail:
311         free(rates);
312         return ret;
313 }
314
315 int clk_set_defaults(struct udevice *dev, int stage)
316 {
317         int ret;
318
319         if (!dev_of_valid(dev))
320                 return 0;
321
322         /* If this not in SPL and pre-reloc state, don't take any action. */
323         if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
324                 return 0;
325
326         debug("%s(%s)\n", __func__, dev_read_name(dev));
327
328         ret = clk_set_default_parents(dev, stage);
329         if (ret)
330                 return ret;
331
332         ret = clk_set_default_rates(dev, stage);
333         if (ret < 0)
334                 return ret;
335
336         return 0;
337 }
338
339 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
340 {
341         int index;
342
343         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
344         clk->dev = NULL;
345
346         index = dev_read_stringlist_search(dev, "clock-names", name);
347         if (index < 0) {
348                 debug("fdt_stringlist_search() failed: %d\n", index);
349                 return index;
350         }
351
352         return clk_get_by_index(dev, index, clk);
353 }
354 # endif /* OF_PLATDATA */
355
356 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
357 {
358         int index;
359
360         debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
361                 ofnode_get_name(node), name, clk);
362         clk->dev = NULL;
363
364         index = ofnode_stringlist_search(node, "clock-names", name);
365         if (index < 0) {
366                 debug("fdt_stringlist_search() failed: %d\n", index);
367                 return index;
368         }
369
370         return clk_get_by_index_nodev(node, index, clk);
371 }
372
373 int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
374 {
375         int ret;
376
377         ret = clk_get_by_name_nodev(node, name, clk);
378         if (ret == -ENODATA)
379                 return 0;
380
381         return ret;
382 }
383
384 int clk_release_all(struct clk *clk, int count)
385 {
386         int i, ret;
387
388         for (i = 0; i < count; i++) {
389                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
390
391                 /* check if clock has been previously requested */
392                 if (!clk[i].dev)
393                         continue;
394
395                 ret = clk_disable(&clk[i]);
396                 if (ret && ret != -ENOSYS)
397                         return ret;
398
399                 ret = clk_free(&clk[i]);
400                 if (ret && ret != -ENOSYS)
401                         return ret;
402         }
403
404         return 0;
405 }
406
407 #endif /* OF_CONTROL */
408
409 int clk_request(struct udevice *dev, struct clk *clk)
410 {
411         const struct clk_ops *ops;
412
413         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
414         if (!clk)
415                 return 0;
416         ops = clk_dev_ops(dev);
417
418         clk->dev = dev;
419
420         if (!ops->request)
421                 return 0;
422
423         return ops->request(clk);
424 }
425
426 int clk_free(struct clk *clk)
427 {
428         const struct clk_ops *ops;
429
430         debug("%s(clk=%p)\n", __func__, clk);
431         if (!clk_valid(clk))
432                 return 0;
433         ops = clk_dev_ops(clk->dev);
434
435         if (!ops->rfree)
436                 return 0;
437
438         return ops->rfree(clk);
439 }
440
441 ulong clk_get_rate(struct clk *clk)
442 {
443         const struct clk_ops *ops;
444
445         debug("%s(clk=%p)\n", __func__, clk);
446         if (!clk_valid(clk))
447                 return 0;
448         ops = clk_dev_ops(clk->dev);
449
450         if (!ops->get_rate)
451                 return -ENOSYS;
452
453         return ops->get_rate(clk);
454 }
455
456 struct clk *clk_get_parent(struct clk *clk)
457 {
458         struct udevice *pdev;
459         struct clk *pclk;
460
461         debug("%s(clk=%p)\n", __func__, clk);
462         if (!clk_valid(clk))
463                 return NULL;
464
465         pdev = dev_get_parent(clk->dev);
466         pclk = dev_get_clk_ptr(pdev);
467         if (!pclk)
468                 return ERR_PTR(-ENODEV);
469
470         return pclk;
471 }
472
473 long long clk_get_parent_rate(struct clk *clk)
474 {
475         const struct clk_ops *ops;
476         struct clk *pclk;
477
478         debug("%s(clk=%p)\n", __func__, clk);
479         if (!clk_valid(clk))
480                 return 0;
481
482         pclk = clk_get_parent(clk);
483         if (IS_ERR(pclk))
484                 return -ENODEV;
485
486         ops = clk_dev_ops(pclk->dev);
487         if (!ops->get_rate)
488                 return -ENOSYS;
489
490         /* Read the 'rate' if not already set or if proper flag set*/
491         if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
492                 pclk->rate = clk_get_rate(pclk);
493
494         return pclk->rate;
495 }
496
497 ulong clk_set_rate(struct clk *clk, ulong rate)
498 {
499         const struct clk_ops *ops;
500
501         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
502         if (!clk_valid(clk))
503                 return 0;
504         ops = clk_dev_ops(clk->dev);
505
506         if (!ops->set_rate)
507                 return -ENOSYS;
508
509         return ops->set_rate(clk, rate);
510 }
511
512 int clk_set_parent(struct clk *clk, struct clk *parent)
513 {
514         const struct clk_ops *ops;
515
516         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
517         if (!clk_valid(clk))
518                 return 0;
519         ops = clk_dev_ops(clk->dev);
520
521         if (!ops->set_parent)
522                 return -ENOSYS;
523
524         return ops->set_parent(clk, parent);
525 }
526
527 int clk_enable(struct clk *clk)
528 {
529         const struct clk_ops *ops;
530         struct clk *clkp = NULL;
531         int ret;
532
533         debug("%s(clk=%p)\n", __func__, clk);
534         if (!clk_valid(clk))
535                 return 0;
536         ops = clk_dev_ops(clk->dev);
537
538         if (CONFIG_IS_ENABLED(CLK_CCF)) {
539                 /* Take id 0 as a non-valid clk, such as dummy */
540                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
541                         if (clkp->enable_count) {
542                                 clkp->enable_count++;
543                                 return 0;
544                         }
545                         if (clkp->dev->parent &&
546                             device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
547                                 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
548                                 if (ret) {
549                                         printf("Enable %s failed\n",
550                                                clkp->dev->parent->name);
551                                         return ret;
552                                 }
553                         }
554                 }
555
556                 if (ops->enable) {
557                         ret = ops->enable(clk);
558                         if (ret) {
559                                 printf("Enable %s failed\n", clk->dev->name);
560                                 return ret;
561                         }
562                 }
563                 if (clkp)
564                         clkp->enable_count++;
565         } else {
566                 if (!ops->enable)
567                         return -ENOSYS;
568                 return ops->enable(clk);
569         }
570
571         return 0;
572 }
573
574 int clk_enable_bulk(struct clk_bulk *bulk)
575 {
576         int i, ret;
577
578         for (i = 0; i < bulk->count; i++) {
579                 ret = clk_enable(&bulk->clks[i]);
580                 if (ret < 0 && ret != -ENOSYS)
581                         return ret;
582         }
583
584         return 0;
585 }
586
587 int clk_disable(struct clk *clk)
588 {
589         const struct clk_ops *ops;
590         struct clk *clkp = NULL;
591         int ret;
592
593         debug("%s(clk=%p)\n", __func__, clk);
594         if (!clk_valid(clk))
595                 return 0;
596         ops = clk_dev_ops(clk->dev);
597
598         if (CONFIG_IS_ENABLED(CLK_CCF)) {
599                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
600                         if (clkp->enable_count == 0) {
601                                 printf("clk %s already disabled\n",
602                                        clkp->dev->name);
603                                 return 0;
604                         }
605
606                         if (--clkp->enable_count > 0)
607                                 return 0;
608                 }
609
610                 if (ops->disable) {
611                         ret = ops->disable(clk);
612                         if (ret)
613                                 return ret;
614                 }
615
616                 if (clkp && clkp->dev->parent &&
617                     device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
618                         ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
619                         if (ret) {
620                                 printf("Disable %s failed\n",
621                                        clkp->dev->parent->name);
622                                 return ret;
623                         }
624                 }
625         } else {
626                 if (!ops->disable)
627                         return -ENOSYS;
628
629                 return ops->disable(clk);
630         }
631
632         return 0;
633 }
634
635 int clk_disable_bulk(struct clk_bulk *bulk)
636 {
637         int i, ret;
638
639         for (i = 0; i < bulk->count; i++) {
640                 ret = clk_disable(&bulk->clks[i]);
641                 if (ret < 0 && ret != -ENOSYS)
642                         return ret;
643         }
644
645         return 0;
646 }
647
648 int clk_get_by_id(ulong id, struct clk **clkp)
649 {
650         struct udevice *dev;
651         struct uclass *uc;
652         int ret;
653
654         ret = uclass_get(UCLASS_CLK, &uc);
655         if (ret)
656                 return ret;
657
658         uclass_foreach_dev(dev, uc) {
659                 struct clk *clk = dev_get_clk_ptr(dev);
660
661                 if (clk && clk->id == id) {
662                         *clkp = clk;
663                         return 0;
664                 }
665         }
666
667         return -ENOENT;
668 }
669
670 bool clk_is_match(const struct clk *p, const struct clk *q)
671 {
672         /* trivial case: identical struct clk's or both NULL */
673         if (p == q)
674                 return true;
675
676         /* trivial case #2: on the clk pointer is NULL */
677         if (!p || !q)
678                 return false;
679
680         /* same device, id and data */
681         if (p->dev == q->dev && p->id == q->id && p->data == q->data)
682                 return true;
683
684         return false;
685 }
686
687 static void devm_clk_release(struct udevice *dev, void *res)
688 {
689         clk_free(res);
690 }
691
692 static int devm_clk_match(struct udevice *dev, void *res, void *data)
693 {
694         return res == data;
695 }
696
697 struct clk *devm_clk_get(struct udevice *dev, const char *id)
698 {
699         int rc;
700         struct clk *clk;
701
702         clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
703         if (unlikely(!clk))
704                 return ERR_PTR(-ENOMEM);
705
706         rc = clk_get_by_name(dev, id, clk);
707         if (rc)
708                 return ERR_PTR(rc);
709
710         devres_add(dev, clk);
711         return clk;
712 }
713
714 struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
715 {
716         struct clk *clk = devm_clk_get(dev, id);
717
718         if (PTR_ERR(clk) == -ENODATA)
719                 return NULL;
720
721         return clk;
722 }
723
724 void devm_clk_put(struct udevice *dev, struct clk *clk)
725 {
726         int rc;
727
728         if (!clk)
729                 return;
730
731         rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
732         WARN_ON(rc);
733 }
734
735 int clk_uclass_post_probe(struct udevice *dev)
736 {
737         /*
738          * when a clock provider is probed. Call clk_set_defaults()
739          * also after the device is probed. This takes care of cases
740          * where the DT is used to setup default parents and rates
741          * using assigned-clocks
742          */
743         clk_set_defaults(dev, 1);
744
745         return 0;
746 }
747
748 UCLASS_DRIVER(clk) = {
749         .id             = UCLASS_CLK,
750         .name           = "clk",
751         .post_probe     = clk_uclass_post_probe,
752 };