1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
17 #include <dm/devres.h>
19 #include <linux/bug.h>
20 #include <linux/clk-provider.h>
21 #include <linux/err.h>
23 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
25 return (const struct clk_ops *)dev->driver->ops;
28 #if CONFIG_IS_ENABLED(OF_CONTROL)
29 # if CONFIG_IS_ENABLED(OF_PLATDATA)
30 int clk_get_by_index_platdata(struct udevice *dev, int index,
31 struct phandle_1_arg *cells, struct clk *clk)
37 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
40 clk->id = cells[0].arg[0];
45 static int clk_of_xlate_default(struct clk *clk,
46 struct ofnode_phandle_args *args)
48 debug("%s(clk=%p)\n", __func__, clk);
50 if (args->args_count > 1) {
51 debug("Invaild args_count: %d\n", args->args_count);
56 clk->id = args->args[0];
65 static int clk_get_by_index_tail(int ret, ofnode node,
66 struct ofnode_phandle_args *args,
67 const char *list_name, int index,
70 struct udevice *dev_clk;
71 const struct clk_ops *ops;
78 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
80 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
87 ops = clk_dev_ops(dev_clk);
90 ret = ops->of_xlate(clk, args);
92 ret = clk_of_xlate_default(clk, args);
94 debug("of_xlate() failed: %d\n", ret);
98 return clk_request(dev_clk, clk);
100 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
101 __func__, ofnode_get_name(node), list_name, index, ret);
105 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
106 int index, struct clk *clk)
109 struct ofnode_phandle_args args;
111 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
116 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
119 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
125 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
129 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
131 struct ofnode_phandle_args args;
134 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
137 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
141 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
143 struct ofnode_phandle_args args;
146 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
149 return clk_get_by_index_tail(ret, node, &args, "clocks",
153 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
155 int i, ret, err, count;
159 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
163 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
167 for (i = 0; i < count; i++) {
168 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
178 err = clk_release_all(bulk->clks, bulk->count);
180 debug("%s: could release all clocks for %p\n",
186 static int clk_set_default_parents(struct udevice *dev, int stage)
188 struct clk clk, parent_clk;
193 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
195 if (num_parents < 0) {
196 debug("%s: could not read assigned-clock-parents for %p\n",
201 for (index = 0; index < num_parents; index++) {
202 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
204 /* If -ENOENT, this is a no-op entry */
209 debug("%s: could not get parent clock %d for %s\n",
210 __func__, index, dev_read_name(dev));
214 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
217 debug("%s: could not get assigned clock %d for %s\n",
218 __func__, index, dev_read_name(dev));
222 /* This is clk provider device trying to reparent itself
223 * It cannot be done right now but need to wait after the
226 if (stage == 0 && clk.dev == dev)
229 if (stage > 0 && clk.dev != dev)
230 /* do not setup twice the parent clocks */
233 ret = clk_set_parent(&clk, &parent_clk);
235 * Not all drivers may support clock-reparenting (as of now).
236 * Ignore errors due to this.
242 debug("%s: failed to reparent clock %d for %s\n",
243 __func__, index, dev_read_name(dev));
251 static int clk_set_default_rates(struct udevice *dev, int stage)
260 size = dev_read_size(dev, "assigned-clock-rates");
264 num_rates = size / sizeof(u32);
265 rates = calloc(num_rates, sizeof(u32));
269 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
273 for (index = 0; index < num_rates; index++) {
274 /* If 0 is passed, this is a no-op */
278 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
281 debug("%s: could not get assigned clock %d for %s\n",
282 __func__, index, dev_read_name(dev));
286 /* This is clk provider device trying to program itself
287 * It cannot be done right now but need to wait after the
290 if (stage == 0 && clk.dev == dev)
293 if (stage > 0 && clk.dev != dev)
294 /* do not setup twice the parent clocks */
297 ret = clk_set_rate(&clk, rates[index]);
300 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
301 __func__, index, clk.id, dev_read_name(dev));
311 int clk_set_defaults(struct udevice *dev, int stage)
315 if (!dev_of_valid(dev))
318 /* If this not in SPL and pre-reloc state, don't take any action. */
319 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
322 debug("%s(%s)\n", __func__, dev_read_name(dev));
324 ret = clk_set_default_parents(dev, stage);
328 ret = clk_set_default_rates(dev, stage);
335 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
339 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
342 index = dev_read_stringlist_search(dev, "clock-names", name);
344 debug("fdt_stringlist_search() failed: %d\n", index);
348 return clk_get_by_index(dev, index, clk);
350 # endif /* OF_PLATDATA */
352 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
356 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
357 ofnode_get_name(node), name, clk);
360 index = ofnode_stringlist_search(node, "clock-names", name);
362 debug("fdt_stringlist_search() failed: %d\n", index);
366 return clk_get_by_index_nodev(node, index, clk);
369 int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
373 ret = clk_get_by_name_nodev(node, name, clk);
380 int clk_release_all(struct clk *clk, int count)
384 for (i = 0; i < count; i++) {
385 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
387 /* check if clock has been previously requested */
391 ret = clk_disable(&clk[i]);
392 if (ret && ret != -ENOSYS)
395 ret = clk_free(&clk[i]);
396 if (ret && ret != -ENOSYS)
403 #endif /* OF_CONTROL */
405 int clk_request(struct udevice *dev, struct clk *clk)
407 const struct clk_ops *ops;
409 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
412 ops = clk_dev_ops(dev);
419 return ops->request(clk);
422 int clk_free(struct clk *clk)
424 const struct clk_ops *ops;
426 debug("%s(clk=%p)\n", __func__, clk);
429 ops = clk_dev_ops(clk->dev);
434 return ops->rfree(clk);
437 ulong clk_get_rate(struct clk *clk)
439 const struct clk_ops *ops;
441 debug("%s(clk=%p)\n", __func__, clk);
444 ops = clk_dev_ops(clk->dev);
449 return ops->get_rate(clk);
452 struct clk *clk_get_parent(struct clk *clk)
454 struct udevice *pdev;
457 debug("%s(clk=%p)\n", __func__, clk);
461 pdev = dev_get_parent(clk->dev);
462 pclk = dev_get_clk_ptr(pdev);
464 return ERR_PTR(-ENODEV);
469 long long clk_get_parent_rate(struct clk *clk)
471 const struct clk_ops *ops;
474 debug("%s(clk=%p)\n", __func__, clk);
478 pclk = clk_get_parent(clk);
482 ops = clk_dev_ops(pclk->dev);
486 /* Read the 'rate' if not already set or if proper flag set*/
487 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
488 pclk->rate = clk_get_rate(pclk);
493 ulong clk_set_rate(struct clk *clk, ulong rate)
495 const struct clk_ops *ops;
497 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
500 ops = clk_dev_ops(clk->dev);
505 return ops->set_rate(clk, rate);
508 int clk_set_parent(struct clk *clk, struct clk *parent)
510 const struct clk_ops *ops;
512 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
515 ops = clk_dev_ops(clk->dev);
517 if (!ops->set_parent)
520 return ops->set_parent(clk, parent);
523 int clk_enable(struct clk *clk)
525 const struct clk_ops *ops;
526 struct clk *clkp = NULL;
529 debug("%s(clk=%p)\n", __func__, clk);
532 ops = clk_dev_ops(clk->dev);
534 if (CONFIG_IS_ENABLED(CLK_CCF)) {
535 /* Take id 0 as a non-valid clk, such as dummy */
536 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
537 if (clkp->enable_count) {
538 clkp->enable_count++;
541 if (clkp->dev->parent &&
542 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
543 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
545 printf("Enable %s failed\n",
546 clkp->dev->parent->name);
553 ret = ops->enable(clk);
555 printf("Enable %s failed\n", clk->dev->name);
560 clkp->enable_count++;
564 return ops->enable(clk);
570 int clk_enable_bulk(struct clk_bulk *bulk)
574 for (i = 0; i < bulk->count; i++) {
575 ret = clk_enable(&bulk->clks[i]);
576 if (ret < 0 && ret != -ENOSYS)
583 int clk_disable(struct clk *clk)
585 const struct clk_ops *ops;
586 struct clk *clkp = NULL;
589 debug("%s(clk=%p)\n", __func__, clk);
592 ops = clk_dev_ops(clk->dev);
594 if (CONFIG_IS_ENABLED(CLK_CCF)) {
595 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
596 if (clkp->enable_count == 0) {
597 printf("clk %s already disabled\n",
602 if (--clkp->enable_count > 0)
607 ret = ops->disable(clk);
612 if (clkp && clkp->dev->parent &&
613 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
614 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
616 printf("Disable %s failed\n",
617 clkp->dev->parent->name);
625 return ops->disable(clk);
631 int clk_disable_bulk(struct clk_bulk *bulk)
635 for (i = 0; i < bulk->count; i++) {
636 ret = clk_disable(&bulk->clks[i]);
637 if (ret < 0 && ret != -ENOSYS)
644 int clk_get_by_id(ulong id, struct clk **clkp)
650 ret = uclass_get(UCLASS_CLK, &uc);
654 uclass_foreach_dev(dev, uc) {
655 struct clk *clk = dev_get_clk_ptr(dev);
657 if (clk && clk->id == id) {
666 bool clk_is_match(const struct clk *p, const struct clk *q)
668 /* trivial case: identical struct clk's or both NULL */
672 /* trivial case #2: on the clk pointer is NULL */
676 /* same device, id and data */
677 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
683 static void devm_clk_release(struct udevice *dev, void *res)
688 static int devm_clk_match(struct udevice *dev, void *res, void *data)
693 struct clk *devm_clk_get(struct udevice *dev, const char *id)
698 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
700 return ERR_PTR(-ENOMEM);
702 rc = clk_get_by_name(dev, id, clk);
706 devres_add(dev, clk);
710 struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
712 struct clk *clk = devm_clk_get(dev, id);
714 if (PTR_ERR(clk) == -ENODATA)
720 void devm_clk_put(struct udevice *dev, struct clk *clk)
727 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
731 int clk_uclass_post_probe(struct udevice *dev)
734 * when a clock provider is probed. Call clk_set_defaults()
735 * also after the device is probed. This takes care of cases
736 * where the DT is used to setup default parents and rates
737 * using assigned-clocks
739 clk_set_defaults(dev, 1);
744 UCLASS_DRIVER(clk) = {
747 .post_probe = clk_uclass_post_probe,