1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
17 #include <dm/device-internal.h>
18 #include <dm/devres.h>
20 #include <linux/bug.h>
21 #include <linux/clk-provider.h>
22 #include <linux/err.h>
24 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
26 return (const struct clk_ops *)dev->driver->ops;
29 struct clk *dev_get_clk_ptr(struct udevice *dev)
31 return (struct clk *)dev_get_uclass_priv(dev);
34 #if CONFIG_IS_ENABLED(OF_CONTROL)
35 # if CONFIG_IS_ENABLED(OF_PLATDATA)
36 int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
41 ret = device_get_by_driver_info_idx(cells->idx, &clk->dev);
44 clk->id = cells->arg[0];
49 static int clk_of_xlate_default(struct clk *clk,
50 struct ofnode_phandle_args *args)
52 debug("%s(clk=%p)\n", __func__, clk);
54 if (args->args_count > 1) {
55 debug("Invaild args_count: %d\n", args->args_count);
60 clk->id = args->args[0];
69 static int clk_get_by_index_tail(int ret, ofnode node,
70 struct ofnode_phandle_args *args,
71 const char *list_name, int index,
74 struct udevice *dev_clk;
75 const struct clk_ops *ops;
82 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
84 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
86 return log_msg_ret("get", ret);
91 ops = clk_dev_ops(dev_clk);
94 ret = ops->of_xlate(clk, args);
96 ret = clk_of_xlate_default(clk, args);
98 debug("of_xlate() failed: %d\n", ret);
99 return log_msg_ret("xlate", ret);
102 return clk_request(dev_clk, clk);
104 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
105 __func__, ofnode_get_name(node), list_name, index, ret);
107 return log_msg_ret("prop", ret);
110 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
111 int index, struct clk *clk)
114 struct ofnode_phandle_args args;
116 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
121 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
124 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
130 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
134 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
136 struct ofnode_phandle_args args;
139 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
142 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
146 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
148 struct ofnode_phandle_args args;
151 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
154 return clk_get_by_index_tail(ret, node, &args, "clocks",
158 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
160 int i, ret, err, count;
164 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
168 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
172 for (i = 0; i < count; i++) {
173 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
183 err = clk_release_all(bulk->clks, bulk->count);
185 debug("%s: could release all clocks for %p\n",
191 static struct clk *clk_set_default_get_by_id(struct clk *clk)
195 if (CONFIG_IS_ENABLED(CLK_CCF)) {
196 int ret = clk_get_by_id(clk->id, &c);
199 debug("%s(): could not get parent clock pointer, id %lu\n",
208 static int clk_set_default_parents(struct udevice *dev, int stage)
210 struct clk clk, parent_clk, *c, *p;
215 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
217 if (num_parents < 0) {
218 debug("%s: could not read assigned-clock-parents for %p\n",
223 for (index = 0; index < num_parents; index++) {
224 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
226 /* If -ENOENT, this is a no-op entry */
231 debug("%s: could not get parent clock %d for %s\n",
232 __func__, index, dev_read_name(dev));
236 p = clk_set_default_get_by_id(&parent_clk);
240 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
243 debug("%s: could not get assigned clock %d for %s\n",
244 __func__, index, dev_read_name(dev));
248 /* This is clk provider device trying to reparent itself
249 * It cannot be done right now but need to wait after the
252 if (stage == 0 && clk.dev == dev)
255 if (stage > 0 && clk.dev != dev)
256 /* do not setup twice the parent clocks */
259 c = clk_set_default_get_by_id(&clk);
263 ret = clk_set_parent(c, p);
265 * Not all drivers may support clock-reparenting (as of now).
266 * Ignore errors due to this.
272 debug("%s: failed to reparent clock %d for %s\n",
273 __func__, index, dev_read_name(dev));
281 static int clk_set_default_rates(struct udevice *dev, int stage)
290 size = dev_read_size(dev, "assigned-clock-rates");
294 num_rates = size / sizeof(u32);
295 rates = calloc(num_rates, sizeof(u32));
299 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
303 for (index = 0; index < num_rates; index++) {
304 /* If 0 is passed, this is a no-op */
308 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
311 debug("%s: could not get assigned clock %d for %s\n",
312 __func__, index, dev_read_name(dev));
316 /* This is clk provider device trying to program itself
317 * It cannot be done right now but need to wait after the
320 if (stage == 0 && clk.dev == dev)
323 if (stage > 0 && clk.dev != dev)
324 /* do not setup twice the parent clocks */
327 c = clk_set_default_get_by_id(&clk);
331 ret = clk_set_rate(c, rates[index]);
334 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
335 __func__, index, clk.id, dev_read_name(dev));
345 int clk_set_defaults(struct udevice *dev, int stage)
349 if (!dev_has_ofnode(dev))
352 /* If this not in SPL and pre-reloc state, don't take any action. */
353 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
356 debug("%s(%s)\n", __func__, dev_read_name(dev));
358 ret = clk_set_default_parents(dev, stage);
362 ret = clk_set_default_rates(dev, stage);
369 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
373 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
376 index = dev_read_stringlist_search(dev, "clock-names", name);
378 debug("fdt_stringlist_search() failed: %d\n", index);
382 return clk_get_by_index(dev, index, clk);
384 # endif /* OF_PLATDATA */
386 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
390 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
391 ofnode_get_name(node), name, clk);
394 index = ofnode_stringlist_search(node, "clock-names", name);
396 debug("fdt_stringlist_search() failed: %d\n", index);
400 return clk_get_by_index_nodev(node, index, clk);
403 int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
407 ret = clk_get_by_name_nodev(node, name, clk);
414 int clk_release_all(struct clk *clk, int count)
418 for (i = 0; i < count; i++) {
419 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
421 /* check if clock has been previously requested */
425 ret = clk_disable(&clk[i]);
426 if (ret && ret != -ENOSYS)
429 ret = clk_free(&clk[i]);
430 if (ret && ret != -ENOSYS)
437 #endif /* OF_CONTROL */
439 int clk_request(struct udevice *dev, struct clk *clk)
441 const struct clk_ops *ops;
443 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
446 ops = clk_dev_ops(dev);
453 return ops->request(clk);
456 int clk_free(struct clk *clk)
458 const struct clk_ops *ops;
460 debug("%s(clk=%p)\n", __func__, clk);
463 ops = clk_dev_ops(clk->dev);
468 return ops->rfree(clk);
471 ulong clk_get_rate(struct clk *clk)
473 const struct clk_ops *ops;
476 debug("%s(clk=%p)\n", __func__, clk);
479 ops = clk_dev_ops(clk->dev);
484 ret = ops->get_rate(clk);
491 struct clk *clk_get_parent(struct clk *clk)
493 struct udevice *pdev;
496 debug("%s(clk=%p)\n", __func__, clk);
500 pdev = dev_get_parent(clk->dev);
501 pclk = dev_get_clk_ptr(pdev);
503 return ERR_PTR(-ENODEV);
508 long long clk_get_parent_rate(struct clk *clk)
510 const struct clk_ops *ops;
513 debug("%s(clk=%p)\n", __func__, clk);
517 pclk = clk_get_parent(clk);
521 ops = clk_dev_ops(pclk->dev);
525 /* Read the 'rate' if not already set or if proper flag set*/
526 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
527 pclk->rate = clk_get_rate(pclk);
532 ulong clk_round_rate(struct clk *clk, ulong rate)
534 const struct clk_ops *ops;
536 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
540 ops = clk_dev_ops(clk->dev);
541 if (!ops->round_rate)
544 return ops->round_rate(clk, rate);
547 ulong clk_set_rate(struct clk *clk, ulong rate)
549 const struct clk_ops *ops;
551 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
554 ops = clk_dev_ops(clk->dev);
559 return ops->set_rate(clk, rate);
562 int clk_set_parent(struct clk *clk, struct clk *parent)
564 const struct clk_ops *ops;
567 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
570 ops = clk_dev_ops(clk->dev);
572 if (!ops->set_parent)
575 ret = ops->set_parent(clk, parent);
579 if (CONFIG_IS_ENABLED(CLK_CCF))
580 ret = device_reparent(clk->dev, parent->dev);
585 int clk_enable(struct clk *clk)
587 const struct clk_ops *ops;
588 struct clk *clkp = NULL;
591 debug("%s(clk=%p)\n", __func__, clk);
594 ops = clk_dev_ops(clk->dev);
596 if (CONFIG_IS_ENABLED(CLK_CCF)) {
597 /* Take id 0 as a non-valid clk, such as dummy */
598 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
599 if (clkp->enable_count) {
600 clkp->enable_count++;
603 if (clkp->dev->parent &&
604 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
605 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
607 printf("Enable %s failed\n",
608 clkp->dev->parent->name);
615 ret = ops->enable(clk);
617 printf("Enable %s failed\n", clk->dev->name);
622 clkp->enable_count++;
626 return ops->enable(clk);
632 int clk_enable_bulk(struct clk_bulk *bulk)
636 for (i = 0; i < bulk->count; i++) {
637 ret = clk_enable(&bulk->clks[i]);
638 if (ret < 0 && ret != -ENOSYS)
645 int clk_disable(struct clk *clk)
647 const struct clk_ops *ops;
648 struct clk *clkp = NULL;
651 debug("%s(clk=%p)\n", __func__, clk);
654 ops = clk_dev_ops(clk->dev);
656 if (CONFIG_IS_ENABLED(CLK_CCF)) {
657 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
658 if (clkp->flags & CLK_IS_CRITICAL)
661 if (clkp->enable_count == 0) {
662 printf("clk %s already disabled\n",
667 if (--clkp->enable_count > 0)
672 ret = ops->disable(clk);
677 if (clkp && clkp->dev->parent &&
678 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
679 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
681 printf("Disable %s failed\n",
682 clkp->dev->parent->name);
690 return ops->disable(clk);
696 int clk_disable_bulk(struct clk_bulk *bulk)
700 for (i = 0; i < bulk->count; i++) {
701 ret = clk_disable(&bulk->clks[i]);
702 if (ret < 0 && ret != -ENOSYS)
709 int clk_get_by_id(ulong id, struct clk **clkp)
715 ret = uclass_get(UCLASS_CLK, &uc);
719 uclass_foreach_dev(dev, uc) {
720 struct clk *clk = dev_get_clk_ptr(dev);
722 if (clk && clk->id == id) {
731 bool clk_is_match(const struct clk *p, const struct clk *q)
733 /* trivial case: identical struct clk's or both NULL */
737 /* trivial case #2: on the clk pointer is NULL */
741 /* same device, id and data */
742 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
748 static void devm_clk_release(struct udevice *dev, void *res)
753 static int devm_clk_match(struct udevice *dev, void *res, void *data)
758 struct clk *devm_clk_get(struct udevice *dev, const char *id)
763 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
765 return ERR_PTR(-ENOMEM);
767 rc = clk_get_by_name(dev, id, clk);
771 devres_add(dev, clk);
775 struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
777 struct clk *clk = devm_clk_get(dev, id);
779 if (PTR_ERR(clk) == -ENODATA)
785 void devm_clk_put(struct udevice *dev, struct clk *clk)
792 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
796 int clk_uclass_post_probe(struct udevice *dev)
799 * when a clock provider is probed. Call clk_set_defaults()
800 * also after the device is probed. This takes care of cases
801 * where the DT is used to setup default parents and rates
802 * using assigned-clocks
804 clk_set_defaults(dev, 1);
809 UCLASS_DRIVER(clk) = {
812 .post_probe = clk_uclass_post_probe,