1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
17 #include <dm/devres.h>
19 #include <linux/bug.h>
20 #include <linux/clk-provider.h>
21 #include <linux/err.h>
23 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
25 return (const struct clk_ops *)dev->driver->ops;
28 #if CONFIG_IS_ENABLED(OF_CONTROL)
29 # if CONFIG_IS_ENABLED(OF_PLATDATA)
30 int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
35 ret = device_get_by_driver_info((struct driver_info *)cells->node,
39 clk->id = cells->arg[0];
44 static int clk_of_xlate_default(struct clk *clk,
45 struct ofnode_phandle_args *args)
47 debug("%s(clk=%p)\n", __func__, clk);
49 if (args->args_count > 1) {
50 debug("Invaild args_count: %d\n", args->args_count);
55 clk->id = args->args[0];
64 static int clk_get_by_index_tail(int ret, ofnode node,
65 struct ofnode_phandle_args *args,
66 const char *list_name, int index,
69 struct udevice *dev_clk;
70 const struct clk_ops *ops;
77 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
79 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
86 ops = clk_dev_ops(dev_clk);
89 ret = ops->of_xlate(clk, args);
91 ret = clk_of_xlate_default(clk, args);
93 debug("of_xlate() failed: %d\n", ret);
97 return clk_request(dev_clk, clk);
99 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
100 __func__, ofnode_get_name(node), list_name, index, ret);
104 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
105 int index, struct clk *clk)
108 struct ofnode_phandle_args args;
110 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
115 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
118 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
124 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
128 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
130 struct ofnode_phandle_args args;
133 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
136 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
140 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
142 struct ofnode_phandle_args args;
145 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
148 return clk_get_by_index_tail(ret, node, &args, "clocks",
152 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
154 int i, ret, err, count;
158 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
162 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
166 for (i = 0; i < count; i++) {
167 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
177 err = clk_release_all(bulk->clks, bulk->count);
179 debug("%s: could release all clocks for %p\n",
185 static int clk_set_default_parents(struct udevice *dev, int stage)
187 struct clk clk, parent_clk;
192 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
194 if (num_parents < 0) {
195 debug("%s: could not read assigned-clock-parents for %p\n",
200 for (index = 0; index < num_parents; index++) {
201 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
203 /* If -ENOENT, this is a no-op entry */
208 debug("%s: could not get parent clock %d for %s\n",
209 __func__, index, dev_read_name(dev));
213 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
216 debug("%s: could not get assigned clock %d for %s\n",
217 __func__, index, dev_read_name(dev));
221 /* This is clk provider device trying to reparent itself
222 * It cannot be done right now but need to wait after the
225 if (stage == 0 && clk.dev == dev)
228 if (stage > 0 && clk.dev != dev)
229 /* do not setup twice the parent clocks */
232 ret = clk_set_parent(&clk, &parent_clk);
234 * Not all drivers may support clock-reparenting (as of now).
235 * Ignore errors due to this.
241 debug("%s: failed to reparent clock %d for %s\n",
242 __func__, index, dev_read_name(dev));
250 static int clk_set_default_rates(struct udevice *dev, int stage)
259 size = dev_read_size(dev, "assigned-clock-rates");
263 num_rates = size / sizeof(u32);
264 rates = calloc(num_rates, sizeof(u32));
268 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
272 for (index = 0; index < num_rates; index++) {
273 /* If 0 is passed, this is a no-op */
277 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
280 debug("%s: could not get assigned clock %d for %s\n",
281 __func__, index, dev_read_name(dev));
285 /* This is clk provider device trying to program itself
286 * It cannot be done right now but need to wait after the
289 if (stage == 0 && clk.dev == dev)
292 if (stage > 0 && clk.dev != dev)
293 /* do not setup twice the parent clocks */
296 ret = clk_set_rate(&clk, rates[index]);
299 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
300 __func__, index, clk.id, dev_read_name(dev));
310 int clk_set_defaults(struct udevice *dev, int stage)
314 if (!dev_of_valid(dev))
317 /* If this not in SPL and pre-reloc state, don't take any action. */
318 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
321 debug("%s(%s)\n", __func__, dev_read_name(dev));
323 ret = clk_set_default_parents(dev, stage);
327 ret = clk_set_default_rates(dev, stage);
334 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
338 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
341 index = dev_read_stringlist_search(dev, "clock-names", name);
343 debug("fdt_stringlist_search() failed: %d\n", index);
347 return clk_get_by_index(dev, index, clk);
349 # endif /* OF_PLATDATA */
351 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
355 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
356 ofnode_get_name(node), name, clk);
359 index = ofnode_stringlist_search(node, "clock-names", name);
361 debug("fdt_stringlist_search() failed: %d\n", index);
365 return clk_get_by_index_nodev(node, index, clk);
368 int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
372 ret = clk_get_by_name_nodev(node, name, clk);
379 int clk_release_all(struct clk *clk, int count)
383 for (i = 0; i < count; i++) {
384 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
386 /* check if clock has been previously requested */
390 ret = clk_disable(&clk[i]);
391 if (ret && ret != -ENOSYS)
394 ret = clk_free(&clk[i]);
395 if (ret && ret != -ENOSYS)
402 #endif /* OF_CONTROL */
404 int clk_request(struct udevice *dev, struct clk *clk)
406 const struct clk_ops *ops;
408 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
411 ops = clk_dev_ops(dev);
418 return ops->request(clk);
421 int clk_free(struct clk *clk)
423 const struct clk_ops *ops;
425 debug("%s(clk=%p)\n", __func__, clk);
428 ops = clk_dev_ops(clk->dev);
433 return ops->rfree(clk);
436 ulong clk_get_rate(struct clk *clk)
438 const struct clk_ops *ops;
440 debug("%s(clk=%p)\n", __func__, clk);
443 ops = clk_dev_ops(clk->dev);
448 return ops->get_rate(clk);
451 struct clk *clk_get_parent(struct clk *clk)
453 struct udevice *pdev;
456 debug("%s(clk=%p)\n", __func__, clk);
460 pdev = dev_get_parent(clk->dev);
461 pclk = dev_get_clk_ptr(pdev);
463 return ERR_PTR(-ENODEV);
468 long long clk_get_parent_rate(struct clk *clk)
470 const struct clk_ops *ops;
473 debug("%s(clk=%p)\n", __func__, clk);
477 pclk = clk_get_parent(clk);
481 ops = clk_dev_ops(pclk->dev);
485 /* Read the 'rate' if not already set or if proper flag set*/
486 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
487 pclk->rate = clk_get_rate(pclk);
492 ulong clk_set_rate(struct clk *clk, ulong rate)
494 const struct clk_ops *ops;
496 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
499 ops = clk_dev_ops(clk->dev);
504 return ops->set_rate(clk, rate);
507 int clk_set_parent(struct clk *clk, struct clk *parent)
509 const struct clk_ops *ops;
511 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
514 ops = clk_dev_ops(clk->dev);
516 if (!ops->set_parent)
519 return ops->set_parent(clk, parent);
522 int clk_enable(struct clk *clk)
524 const struct clk_ops *ops;
525 struct clk *clkp = NULL;
528 debug("%s(clk=%p)\n", __func__, clk);
531 ops = clk_dev_ops(clk->dev);
533 if (CONFIG_IS_ENABLED(CLK_CCF)) {
534 /* Take id 0 as a non-valid clk, such as dummy */
535 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
536 if (clkp->enable_count) {
537 clkp->enable_count++;
540 if (clkp->dev->parent &&
541 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
542 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
544 printf("Enable %s failed\n",
545 clkp->dev->parent->name);
552 ret = ops->enable(clk);
554 printf("Enable %s failed\n", clk->dev->name);
559 clkp->enable_count++;
563 return ops->enable(clk);
569 int clk_enable_bulk(struct clk_bulk *bulk)
573 for (i = 0; i < bulk->count; i++) {
574 ret = clk_enable(&bulk->clks[i]);
575 if (ret < 0 && ret != -ENOSYS)
582 int clk_disable(struct clk *clk)
584 const struct clk_ops *ops;
585 struct clk *clkp = NULL;
588 debug("%s(clk=%p)\n", __func__, clk);
591 ops = clk_dev_ops(clk->dev);
593 if (CONFIG_IS_ENABLED(CLK_CCF)) {
594 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
595 if (clkp->enable_count == 0) {
596 printf("clk %s already disabled\n",
601 if (--clkp->enable_count > 0)
606 ret = ops->disable(clk);
611 if (clkp && clkp->dev->parent &&
612 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
613 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
615 printf("Disable %s failed\n",
616 clkp->dev->parent->name);
624 return ops->disable(clk);
630 int clk_disable_bulk(struct clk_bulk *bulk)
634 for (i = 0; i < bulk->count; i++) {
635 ret = clk_disable(&bulk->clks[i]);
636 if (ret < 0 && ret != -ENOSYS)
643 int clk_get_by_id(ulong id, struct clk **clkp)
649 ret = uclass_get(UCLASS_CLK, &uc);
653 uclass_foreach_dev(dev, uc) {
654 struct clk *clk = dev_get_clk_ptr(dev);
656 if (clk && clk->id == id) {
665 bool clk_is_match(const struct clk *p, const struct clk *q)
667 /* trivial case: identical struct clk's or both NULL */
671 /* trivial case #2: on the clk pointer is NULL */
675 /* same device, id and data */
676 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
682 static void devm_clk_release(struct udevice *dev, void *res)
687 static int devm_clk_match(struct udevice *dev, void *res, void *data)
692 struct clk *devm_clk_get(struct udevice *dev, const char *id)
697 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
699 return ERR_PTR(-ENOMEM);
701 rc = clk_get_by_name(dev, id, clk);
705 devres_add(dev, clk);
709 struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
711 struct clk *clk = devm_clk_get(dev, id);
713 if (PTR_ERR(clk) == -ENODATA)
719 void devm_clk_put(struct udevice *dev, struct clk *clk)
726 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
730 int clk_uclass_post_probe(struct udevice *dev)
733 * when a clock provider is probed. Call clk_set_defaults()
734 * also after the device is probed. This takes care of cases
735 * where the DT is used to setup default parents and rates
736 * using assigned-clocks
738 clk_set_defaults(dev, 1);
743 UCLASS_DRIVER(clk) = {
746 .post_probe = clk_uclass_post_probe,