1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
11 #include <clk-uclass.h>
14 #include <dt-structs.h>
16 #include <linux/clk-provider.h>
18 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
20 return (const struct clk_ops *)dev->driver->ops;
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
25 int clk_get_by_index_platdata(struct udevice *dev, int index,
26 struct phandle_1_arg *cells, struct clk *clk)
32 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
35 clk->id = cells[0].arg[0];
40 static int clk_of_xlate_default(struct clk *clk,
41 struct ofnode_phandle_args *args)
43 debug("%s(clk=%p)\n", __func__, clk);
45 if (args->args_count > 1) {
46 debug("Invaild args_count: %d\n", args->args_count);
51 clk->id = args->args[0];
60 static int clk_get_by_index_tail(int ret, ofnode node,
61 struct ofnode_phandle_args *args,
62 const char *list_name, int index,
65 struct udevice *dev_clk;
66 const struct clk_ops *ops;
73 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
75 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
82 ops = clk_dev_ops(dev_clk);
85 ret = ops->of_xlate(clk, args);
87 ret = clk_of_xlate_default(clk, args);
89 debug("of_xlate() failed: %d\n", ret);
93 return clk_request(dev_clk, clk);
95 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
96 __func__, ofnode_get_name(node), list_name, index, ret);
100 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
101 int index, struct clk *clk)
104 struct ofnode_phandle_args args;
106 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
111 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
114 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
120 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
124 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
126 struct ofnode_phandle_args args;
129 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
132 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
136 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
138 struct ofnode_phandle_args args;
141 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
144 return clk_get_by_index_tail(ret, node, &args, "clocks",
148 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
150 int i, ret, err, count;
154 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
158 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
162 for (i = 0; i < count; i++) {
163 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
173 err = clk_release_all(bulk->clks, bulk->count);
175 debug("%s: could release all clocks for %p\n",
181 static int clk_set_default_parents(struct udevice *dev)
183 struct clk clk, parent_clk;
188 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
190 if (num_parents < 0) {
191 debug("%s: could not read assigned-clock-parents for %p\n",
196 for (index = 0; index < num_parents; index++) {
197 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
199 /* If -ENOENT, this is a no-op entry */
204 debug("%s: could not get parent clock %d for %s\n",
205 __func__, index, dev_read_name(dev));
209 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
212 debug("%s: could not get assigned clock %d for %s\n",
213 __func__, index, dev_read_name(dev));
217 ret = clk_set_parent(&clk, &parent_clk);
220 * Not all drivers may support clock-reparenting (as of now).
221 * Ignore errors due to this.
227 debug("%s: failed to reparent clock %d for %s\n",
228 __func__, index, dev_read_name(dev));
236 static int clk_set_default_rates(struct udevice *dev)
245 size = dev_read_size(dev, "assigned-clock-rates");
249 num_rates = size / sizeof(u32);
250 rates = calloc(num_rates, sizeof(u32));
254 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
258 for (index = 0; index < num_rates; index++) {
259 /* If 0 is passed, this is a no-op */
263 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
266 debug("%s: could not get assigned clock %d for %s\n",
267 __func__, index, dev_read_name(dev));
271 ret = clk_set_rate(&clk, rates[index]);
273 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
274 __func__, index, clk.id, dev_read_name(dev));
284 int clk_set_defaults(struct udevice *dev)
288 if (!dev_of_valid(dev))
291 /* If this not in SPL and pre-reloc state, don't take any action. */
292 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
295 debug("%s(%s)\n", __func__, dev_read_name(dev));
297 ret = clk_set_default_parents(dev);
301 ret = clk_set_default_rates(dev);
307 # endif /* OF_PLATDATA */
309 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
313 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
316 index = dev_read_stringlist_search(dev, "clock-names", name);
318 debug("fdt_stringlist_search() failed: %d\n", index);
322 return clk_get_by_index(dev, index, clk);
325 int clk_release_all(struct clk *clk, int count)
329 for (i = 0; i < count; i++) {
330 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
332 /* check if clock has been previously requested */
336 ret = clk_disable(&clk[i]);
337 if (ret && ret != -ENOSYS)
340 ret = clk_free(&clk[i]);
341 if (ret && ret != -ENOSYS)
348 #endif /* OF_CONTROL */
350 int clk_request(struct udevice *dev, struct clk *clk)
352 const struct clk_ops *ops = clk_dev_ops(dev);
354 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
361 return ops->request(clk);
364 int clk_free(struct clk *clk)
366 const struct clk_ops *ops = clk_dev_ops(clk->dev);
368 debug("%s(clk=%p)\n", __func__, clk);
373 return ops->free(clk);
376 ulong clk_get_rate(struct clk *clk)
378 const struct clk_ops *ops = clk_dev_ops(clk->dev);
380 debug("%s(clk=%p)\n", __func__, clk);
385 return ops->get_rate(clk);
388 struct clk *clk_get_parent(struct clk *clk)
390 struct udevice *pdev;
393 debug("%s(clk=%p)\n", __func__, clk);
395 pdev = dev_get_parent(clk->dev);
396 pclk = dev_get_clk_ptr(pdev);
398 return ERR_PTR(-ENODEV);
403 long long clk_get_parent_rate(struct clk *clk)
405 const struct clk_ops *ops;
408 debug("%s(clk=%p)\n", __func__, clk);
410 pclk = clk_get_parent(clk);
414 ops = clk_dev_ops(pclk->dev);
418 /* Read the 'rate' if not already set or if proper flag set*/
419 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
420 pclk->rate = clk_get_rate(pclk);
425 ulong clk_set_rate(struct clk *clk, ulong rate)
427 const struct clk_ops *ops = clk_dev_ops(clk->dev);
429 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
434 return ops->set_rate(clk, rate);
437 int clk_set_parent(struct clk *clk, struct clk *parent)
439 const struct clk_ops *ops = clk_dev_ops(clk->dev);
441 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
443 if (!ops->set_parent)
446 return ops->set_parent(clk, parent);
449 int clk_enable(struct clk *clk)
451 const struct clk_ops *ops = clk_dev_ops(clk->dev);
452 struct clk *clkp = NULL;
455 debug("%s(clk=%p)\n", __func__, clk);
457 if (CONFIG_IS_ENABLED(CLK_CCF)) {
458 /* Take id 0 as a non-valid clk, such as dummy */
459 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
460 if (clkp->enable_count) {
461 clkp->enable_count++;
464 if (clkp->dev->parent &&
465 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
466 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
468 printf("Enable %s failed\n",
469 clkp->dev->parent->name);
476 ret = ops->enable(clk);
478 printf("Enable %s failed\n", clk->dev->name);
483 clkp->enable_count++;
487 return ops->enable(clk);
493 int clk_enable_bulk(struct clk_bulk *bulk)
497 for (i = 0; i < bulk->count; i++) {
498 ret = clk_enable(&bulk->clks[i]);
499 if (ret < 0 && ret != -ENOSYS)
506 int clk_disable(struct clk *clk)
508 const struct clk_ops *ops = clk_dev_ops(clk->dev);
509 struct clk *clkp = NULL;
512 debug("%s(clk=%p)\n", __func__, clk);
514 if (CONFIG_IS_ENABLED(CLK_CCF)) {
515 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
516 if (clkp->enable_count == 0) {
517 printf("clk %s already disabled\n",
522 if (--clkp->enable_count > 0)
527 ret = ops->disable(clk);
532 if (clkp && clkp->dev->parent &&
533 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
534 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
536 printf("Disable %s failed\n",
537 clkp->dev->parent->name);
545 return ops->disable(clk);
551 int clk_disable_bulk(struct clk_bulk *bulk)
555 for (i = 0; i < bulk->count; i++) {
556 ret = clk_disable(&bulk->clks[i]);
557 if (ret < 0 && ret != -ENOSYS)
564 int clk_get_by_id(ulong id, struct clk **clkp)
570 ret = uclass_get(UCLASS_CLK, &uc);
574 uclass_foreach_dev(dev, uc) {
575 struct clk *clk = dev_get_clk_ptr(dev);
577 if (clk && clk->id == id) {
586 bool clk_is_match(const struct clk *p, const struct clk *q)
588 /* trivial case: identical struct clk's or both NULL */
592 /* same device, id and data */
593 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
599 UCLASS_DRIVER(clk) = {