drivers/clk/clk-uclass.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Google, Inc
   4  * Written by Simon Glass <sjg@chromium.org>
   5  * Copyright (c) 2016, NVIDIA CORPORATION.
   6  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
   7  */
   8
   9 #define LOG_CATEGORY UCLASS_CLK
  10
  11 #include <common.h>
  12 #include <clk.h>
  13 #include <clk-uclass.h>
  14 #include <dm.h>
  15 #include <dt-structs.h>
  16 #include <errno.h>
  17 #include <log.h>
  18 #include <malloc.h>
  19 #include <dm/device_compat.h>
  20 #include <dm/device-internal.h>
  21 #include <dm/devres.h>
  22 #include <dm/read.h>
  23 #include <linux/bug.h>
  24 #include <linux/clk-provider.h>
  25 #include <linux/err.h>
  26 #include <asm/global_data.h>
  27
  28 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  29 {
  30         return (const struct clk_ops *)dev->driver->ops;
  31 }
  32
  33 struct clk *dev_get_clk_ptr(struct udevice *dev)
  34 {
  35         return (struct clk *)dev_get_uclass_priv(dev);
  36 }
  37
  38 #if CONFIG_IS_ENABLED(OF_CONTROL)
  39 # if CONFIG_IS_ENABLED(OF_PLATDATA)
  40 int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
  41                            struct clk *clk)
  42 {
  43         int ret;
  44
  45         ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
  46         if (ret)
  47                 return ret;
  48         clk->id = cells->arg[0];
  49
  50         return 0;
  51 }
  52 # else
  53 static int clk_of_xlate_default(struct clk *clk,
  54                                 struct ofnode_phandle_args *args)
  55 {
  56         debug("%s(clk=%p)\n", __func__, clk);
  57
  58         if (args->args_count > 1) {
  59                 debug("Invaild args_count: %d\n", args->args_count);
  60                 return -EINVAL;
  61         }
  62
  63         if (args->args_count)
  64                 clk->id = args->args[0];
  65         else
  66                 clk->id = 0;
  67
  68         clk->data = 0;
  69
  70         return 0;
  71 }
  72
  73 static int clk_get_by_index_tail(int ret, ofnode node,
  74                                  struct ofnode_phandle_args *args,
  75                                  const char *list_name, int index,
  76                                  struct clk *clk)
  77 {
  78         struct udevice *dev_clk;
  79         const struct clk_ops *ops;
  80
  81         assert(clk);
  82         clk->dev = NULL;
  83         if (ret)
  84                 goto err;
  85
  86         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  87         if (ret) {
  88                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  89                       __func__, ret);
  90                 return log_msg_ret("get", ret);
  91         }
  92
  93         clk->dev = dev_clk;
  94
  95         ops = clk_dev_ops(dev_clk);
  96
  97         if (ops->of_xlate)
  98                 ret = ops->of_xlate(clk, args);
  99         else
 100                 ret = clk_of_xlate_default(clk, args);
 101         if (ret) {
 102                 debug("of_xlate() failed: %d\n", ret);
 103                 return log_msg_ret("xlate", ret);
 104         }
 105
 106         return clk_request(dev_clk, clk);
 107 err:
 108         debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
 109               __func__, ofnode_get_name(node), list_name, index, ret);
 110
 111         return log_msg_ret("prop", ret);
 112 }
 113
 114 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 115                                    int index, struct clk *clk)
 116 {
 117         int ret;
 118         struct ofnode_phandle_args args;
 119
 120         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 121
 122         assert(clk);
 123         clk->dev = NULL;
 124
 125         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 126                                          index, &args);
 127         if (ret) {
 128                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 129                       __func__, ret);
 130                 return log_ret(ret);
 131         }
 132
 133
 134         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 135                                      index, clk);
 136 }
 137
 138 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 139 {
 140         struct ofnode_phandle_args args;
 141         int ret;
 142
 143         ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
 144                                          index, &args);
 145
 146         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 147                                      index, clk);
 148 }
 149
 150 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
 151 {
 152         struct ofnode_phandle_args args;
 153         int ret;
 154
 155         ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
 156                                              index, &args);
 157
 158         return clk_get_by_index_tail(ret, node, &args, "clocks",
 159                                      index, clk);
 160 }
 161
 162 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 163 {
 164         int i, ret, err, count;
 165
 166         bulk->count = 0;
 167
 168         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
 169         if (count < 1)
 170                 return count;
 171
 172         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
 173         if (!bulk->clks)
 174                 return -ENOMEM;
 175
 176         for (i = 0; i < count; i++) {
 177                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
 178                 if (ret < 0)
 179                         goto bulk_get_err;
 180
 181                 ++bulk->count;
 182         }
 183
 184         return 0;
 185
 186 bulk_get_err:
 187         err = clk_release_all(bulk->clks, bulk->count);
 188         if (err)
 189                 debug("%s: could release all clocks for %p\n",
 190                       __func__, dev);
 191
 192         return ret;
 193 }
 194
 195 static struct clk *clk_set_default_get_by_id(struct clk *clk)
 196 {
 197         struct clk *c = clk;
 198
 199         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 200                 int ret = clk_get_by_id(clk->id, &c);
 201
 202                 if (ret) {
 203                         debug("%s(): could not get parent clock pointer, id %lu\n",
 204                               __func__, clk->id);
 205                         ERR_PTR(ret);
 206                 }
 207         }
 208
 209         return c;
 210 }
 211
 212 static int clk_set_default_parents(struct udevice *dev,
 213                                    enum clk_defaults_stage stage)
 214 {
 215         struct clk clk, parent_clk, *c, *p;
 216         int index;
 217         int num_parents;
 218         int ret;
 219
 220         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 221                                                   "#clock-cells", 0);
 222         if (num_parents < 0) {
 223                 debug("%s: could not read assigned-clock-parents for %p\n",
 224                       __func__, dev);
 225                 return 0;
 226         }
 227
 228         for (index = 0; index < num_parents; index++) {
 229                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
 230                                               index, &parent_clk);
 231                 /* If -ENOENT, this is a no-op entry */
 232                 if (ret == -ENOENT)
 233                         continue;
 234
 235                 if (ret) {
 236                         debug("%s: could not get parent clock %d for %s\n",
 237                               __func__, index, dev_read_name(dev));
 238                         return ret;
 239                 }
 240
 241                 p = clk_set_default_get_by_id(&parent_clk);
 242                 if (IS_ERR(p))
 243                         return PTR_ERR(p);
 244
 245                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 246                                               index, &clk);
 247                 /*
 248                  * If the clock provider is not ready yet, let it handle
 249                  * the re-programming later.
 250                  */
 251                 if (ret == -EPROBE_DEFER) {
 252                         ret = 0;
 253                         continue;
 254                 }
 255
 256                 if (ret) {
 257                         debug("%s: could not get assigned clock %d for %s\n",
 258                               __func__, index, dev_read_name(dev));
 259                         return ret;
 260                 }
 261
 262                 /* This is clk provider device trying to reparent itself
 263                  * It cannot be done right now but need to wait after the
 264                  * device is probed
 265                  */
 266                 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
 267                         continue;
 268
 269                 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
 270                         /* do not setup twice the parent clocks */
 271                         continue;
 272
 273                 c = clk_set_default_get_by_id(&clk);
 274                 if (IS_ERR(c))
 275                         return PTR_ERR(c);
 276
 277                 ret = clk_set_parent(c, p);
 278                 /*
 279                  * Not all drivers may support clock-reparenting (as of now).
 280                  * Ignore errors due to this.
 281                  */
 282                 if (ret == -ENOSYS)
 283                         continue;
 284
 285                 if (ret < 0) {
 286                         debug("%s: failed to reparent clock %d for %s\n",
 287                               __func__, index, dev_read_name(dev));
 288                         return ret;
 289                 }
 290         }
 291
 292         return 0;
 293 }
 294
 295 static int clk_set_default_rates(struct udevice *dev,
 296                                  enum clk_defaults_stage stage)
 297 {
 298         struct clk clk, *c;
 299         int index;
 300         int num_rates;
 301         int size;
 302         int ret = 0;
 303         u32 *rates = NULL;
 304
 305         size = dev_read_size(dev, "assigned-clock-rates");
 306         if (size < 0)
 307                 return 0;
 308
 309         num_rates = size / sizeof(u32);
 310         rates = calloc(num_rates, sizeof(u32));
 311         if (!rates)
 312                 return -ENOMEM;
 313
 314         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
 315         if (ret)
 316                 goto fail;
 317
 318         for (index = 0; index < num_rates; index++) {
 319                 /* If 0 is passed, this is a no-op */
 320                 if (!rates[index])
 321                         continue;
 322
 323                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 324                                               index, &clk);
 325                 /*
 326                  * If the clock provider is not ready yet, let it handle
 327                  * the re-programming later.
 328                  */
 329                 if (ret == -EPROBE_DEFER) {
 330                         ret = 0;
 331                         continue;
 332                 }
 333
 334                 if (ret) {
 335                         dev_dbg(dev,
 336                                 "could not get assigned clock %d (err = %d)\n",
 337                                 index, ret);
 338                         continue;
 339                 }
 340
 341                 /* This is clk provider device trying to program itself
 342                  * It cannot be done right now but need to wait after the
 343                  * device is probed
 344                  */
 345                 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
 346                         continue;
 347
 348                 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
 349                         /* do not setup twice the parent clocks */
 350                         continue;
 351
 352                 c = clk_set_default_get_by_id(&clk);
 353                 if (IS_ERR(c))
 354                         return PTR_ERR(c);
 355
 356                 ret = clk_set_rate(c, rates[index]);
 357
 358                 if (ret < 0) {
 359                         dev_warn(dev,
 360                                  "failed to set rate on clock index %d (%ld) (error = %d)\n",
 361                                  index, clk.id, ret);
 362                         break;
 363                 }
 364         }
 365
 366 fail:
 367         free(rates);
 368         return ret;
 369 }
 370
 371 int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
 372 {
 373         int ret;
 374
 375         if (!dev_has_ofnode(dev))
 376                 return 0;
 377
 378         /*
 379          * To avoid setting defaults twice, don't set them before relocation.
 380          * However, still set them for SPL. And still set them if explicitly
 381          * asked.
 382          */
 383         if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
 384                 if (stage != CLK_DEFAULTS_POST_FORCE)
 385                         return 0;
 386
 387         debug("%s(%s)\n", __func__, dev_read_name(dev));
 388
 389         ret = clk_set_default_parents(dev, stage);
 390         if (ret)
 391                 return ret;
 392
 393         ret = clk_set_default_rates(dev, stage);
 394         if (ret < 0)
 395                 return ret;
 396
 397         return 0;
 398 }
 399
 400 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 401 {
 402         int index;
 403
 404         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
 405         clk->dev = NULL;
 406
 407         index = dev_read_stringlist_search(dev, "clock-names", name);
 408         if (index < 0) {
 409                 debug("fdt_stringlist_search() failed: %d\n", index);
 410                 return index;
 411         }
 412
 413         return clk_get_by_index(dev, index, clk);
 414 }
 415 # endif /* OF_PLATDATA */
 416
 417 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
 418 {
 419         int index;
 420
 421         debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
 422                 ofnode_get_name(node), name, clk);
 423         clk->dev = NULL;
 424
 425         index = ofnode_stringlist_search(node, "clock-names", name);
 426         if (index < 0) {
 427                 debug("fdt_stringlist_search() failed: %d\n", index);
 428                 return index;
 429         }
 430
 431         return clk_get_by_index_nodev(node, index, clk);
 432 }
 433
 434 int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
 435 {
 436         int ret;
 437
 438         ret = clk_get_by_name_nodev(node, name, clk);
 439         if (ret == -ENODATA)
 440                 return 0;
 441
 442         return ret;
 443 }
 444
 445 int clk_release_all(struct clk *clk, int count)
 446 {
 447         int i, ret;
 448
 449         for (i = 0; i < count; i++) {
 450                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 451
 452                 /* check if clock has been previously requested */
 453                 if (!clk[i].dev)
 454                         continue;
 455
 456                 ret = clk_disable(&clk[i]);
 457                 if (ret && ret != -ENOSYS)
 458                         return ret;
 459
 460                 ret = clk_free(&clk[i]);
 461                 if (ret && ret != -ENOSYS)
 462                         return ret;
 463         }
 464
 465         return 0;
 466 }
 467
 468 #endif /* OF_CONTROL */
 469
 470 int clk_request(struct udevice *dev, struct clk *clk)
 471 {
 472         const struct clk_ops *ops;
 473
 474         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 475         if (!clk)
 476                 return 0;
 477         ops = clk_dev_ops(dev);
 478
 479         clk->dev = dev;
 480
 481         if (!ops->request)
 482                 return 0;
 483
 484         return ops->request(clk);
 485 }
 486
 487 int clk_free(struct clk *clk)
 488 {
 489         const struct clk_ops *ops;
 490
 491         debug("%s(clk=%p)\n", __func__, clk);
 492         if (!clk_valid(clk))
 493                 return 0;
 494         ops = clk_dev_ops(clk->dev);
 495
 496         if (!ops->rfree)
 497                 return 0;
 498
 499         return ops->rfree(clk);
 500 }
 501
 502 ulong clk_get_rate(struct clk *clk)
 503 {
 504         const struct clk_ops *ops;
 505         int ret;
 506
 507         debug("%s(clk=%p)\n", __func__, clk);
 508         if (!clk_valid(clk))
 509                 return 0;
 510         ops = clk_dev_ops(clk->dev);
 511
 512         if (!ops->get_rate)
 513                 return -ENOSYS;
 514
 515         ret = ops->get_rate(clk);
 516         if (ret)
 517                 return log_ret(ret);
 518
 519         return 0;
 520 }
 521
 522 struct clk *clk_get_parent(struct clk *clk)
 523 {
 524         struct udevice *pdev;
 525         struct clk *pclk;
 526
 527         debug("%s(clk=%p)\n", __func__, clk);
 528         if (!clk_valid(clk))
 529                 return NULL;
 530
 531         pdev = dev_get_parent(clk->dev);
 532         if (!pdev)
 533                 return ERR_PTR(-ENODEV);
 534         pclk = dev_get_clk_ptr(pdev);
 535         if (!pclk)
 536                 return ERR_PTR(-ENODEV);
 537
 538         return pclk;
 539 }
 540
 541 long long clk_get_parent_rate(struct clk *clk)
 542 {
 543         const struct clk_ops *ops;
 544         struct clk *pclk;
 545
 546         debug("%s(clk=%p)\n", __func__, clk);
 547         if (!clk_valid(clk))
 548                 return 0;
 549
 550         pclk = clk_get_parent(clk);
 551         if (IS_ERR(pclk))
 552                 return -ENODEV;
 553
 554         ops = clk_dev_ops(pclk->dev);
 555         if (!ops->get_rate)
 556                 return -ENOSYS;
 557
 558         /* Read the 'rate' if not already set or if proper flag set*/
 559         if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
 560                 pclk->rate = clk_get_rate(pclk);
 561
 562         return pclk->rate;
 563 }
 564
 565 ulong clk_round_rate(struct clk *clk, ulong rate)
 566 {
 567         const struct clk_ops *ops;
 568
 569         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 570         if (!clk_valid(clk))
 571                 return 0;
 572
 573         ops = clk_dev_ops(clk->dev);
 574         if (!ops->round_rate)
 575                 return -ENOSYS;
 576
 577         return ops->round_rate(clk, rate);
 578 }
 579
 580 static void clk_clean_rate_cache(struct clk *clk)
 581 {
 582         struct udevice *child_dev;
 583         struct clk *clkp;
 584
 585         if (!clk)
 586                 return;
 587
 588         clk->rate = 0;
 589
 590         list_for_each_entry(child_dev, &clk->dev->child_head, sibling_node) {
 591                 clkp = dev_get_clk_ptr(child_dev);
 592                 clk_clean_rate_cache(clkp);
 593         }
 594 }
 595
 596 ulong clk_set_rate(struct clk *clk, ulong rate)
 597 {
 598         const struct clk_ops *ops;
 599
 600         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 601         if (!clk_valid(clk))
 602                 return 0;
 603         ops = clk_dev_ops(clk->dev);
 604
 605         if (!ops->set_rate)
 606                 return -ENOSYS;
 607
 608         /* Clean up cached rates for us and all child clocks */
 609         clk_clean_rate_cache(clk);
 610
 611         return ops->set_rate(clk, rate);
 612 }
 613
 614 int clk_set_parent(struct clk *clk, struct clk *parent)
 615 {
 616         const struct clk_ops *ops;
 617         int ret;
 618
 619         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 620         if (!clk_valid(clk))
 621                 return 0;
 622         ops = clk_dev_ops(clk->dev);
 623
 624         if (!ops->set_parent)
 625                 return -ENOSYS;
 626
 627         ret = ops->set_parent(clk, parent);
 628         if (ret)
 629                 return ret;
 630
 631         if (CONFIG_IS_ENABLED(CLK_CCF))
 632                 ret = device_reparent(clk->dev, parent->dev);
 633
 634         return ret;
 635 }
 636
 637 int clk_enable(struct clk *clk)
 638 {
 639         const struct clk_ops *ops;
 640         struct clk *clkp = NULL;
 641         int ret;
 642
 643         debug("%s(clk=%p)\n", __func__, clk);
 644         if (!clk_valid(clk))
 645                 return 0;
 646         ops = clk_dev_ops(clk->dev);
 647
 648         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 649                 /* Take id 0 as a non-valid clk, such as dummy */
 650                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
 651                         if (clkp->enable_count) {
 652                                 clkp->enable_count++;
 653                                 return 0;
 654                         }
 655                         if (clkp->dev->parent &&
 656                             device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
 657                                 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
 658                                 if (ret) {
 659                                         printf("Enable %s failed\n",
 660                                                clkp->dev->parent->name);
 661                                         return ret;
 662                                 }
 663                         }
 664                 }
 665
 666                 if (ops->enable) {
 667                         ret = ops->enable(clk);
 668                         if (ret) {
 669                                 printf("Enable %s failed\n", clk->dev->name);
 670                                 return ret;
 671                         }
 672                 }
 673                 if (clkp)
 674                         clkp->enable_count++;
 675         } else {
 676                 if (!ops->enable)
 677                         return -ENOSYS;
 678                 return ops->enable(clk);
 679         }
 680
 681         return 0;
 682 }
 683
 684 int clk_enable_bulk(struct clk_bulk *bulk)
 685 {
 686         int i, ret;
 687
 688         for (i = 0; i < bulk->count; i++) {
 689                 ret = clk_enable(&bulk->clks[i]);
 690                 if (ret < 0 && ret != -ENOSYS)
 691                         return ret;
 692         }
 693
 694         return 0;
 695 }
 696
 697 int clk_disable(struct clk *clk)
 698 {
 699         const struct clk_ops *ops;
 700         struct clk *clkp = NULL;
 701         int ret;
 702
 703         debug("%s(clk=%p)\n", __func__, clk);
 704         if (!clk_valid(clk))
 705                 return 0;
 706         ops = clk_dev_ops(clk->dev);
 707
 708         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 709                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
 710                         if (clkp->flags & CLK_IS_CRITICAL)
 711                                 return 0;
 712
 713                         if (clkp->enable_count == 0) {
 714                                 printf("clk %s already disabled\n",
 715                                        clkp->dev->name);
 716                                 return 0;
 717                         }
 718
 719                         if (--clkp->enable_count > 0)
 720                                 return 0;
 721                 }
 722
 723                 if (ops->disable) {
 724                         ret = ops->disable(clk);
 725                         if (ret)
 726                                 return ret;
 727                 }
 728
 729                 if (clkp && clkp->dev->parent &&
 730                     device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
 731                         ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
 732                         if (ret) {
 733                                 printf("Disable %s failed\n",
 734                                        clkp->dev->parent->name);
 735                                 return ret;
 736                         }
 737                 }
 738         } else {
 739                 if (!ops->disable)
 740                         return -ENOSYS;
 741
 742                 return ops->disable(clk);
 743         }
 744
 745         return 0;
 746 }
 747
 748 int clk_disable_bulk(struct clk_bulk *bulk)
 749 {
 750         int i, ret;
 751
 752         for (i = 0; i < bulk->count; i++) {
 753                 ret = clk_disable(&bulk->clks[i]);
 754                 if (ret < 0 && ret != -ENOSYS)
 755                         return ret;
 756         }
 757
 758         return 0;
 759 }
 760
 761 int clk_get_by_id(ulong id, struct clk **clkp)
 762 {
 763         struct udevice *dev;
 764         struct uclass *uc;
 765         int ret;
 766
 767         ret = uclass_get(UCLASS_CLK, &uc);
 768         if (ret)
 769                 return ret;
 770
 771         uclass_foreach_dev(dev, uc) {
 772                 struct clk *clk = dev_get_clk_ptr(dev);
 773
 774                 if (clk && clk->id == id) {
 775                         *clkp = clk;
 776                         return 0;
 777                 }
 778         }
 779
 780         return -ENOENT;
 781 }
 782
 783 bool clk_is_match(const struct clk *p, const struct clk *q)
 784 {
 785         /* trivial case: identical struct clk's or both NULL */
 786         if (p == q)
 787                 return true;
 788
 789         /* trivial case #2: on the clk pointer is NULL */
 790         if (!p || !q)
 791                 return false;
 792
 793         /* same device, id and data */
 794         if (p->dev == q->dev && p->id == q->id && p->data == q->data)
 795                 return true;
 796
 797         return false;
 798 }
 799
 800 static void devm_clk_release(struct udevice *dev, void *res)
 801 {
 802         clk_free(res);
 803 }
 804
 805 static int devm_clk_match(struct udevice *dev, void *res, void *data)
 806 {
 807         return res == data;
 808 }
 809
 810 struct clk *devm_clk_get(struct udevice *dev, const char *id)
 811 {
 812         int rc;
 813         struct clk *clk;
 814
 815         clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
 816         if (unlikely(!clk))
 817                 return ERR_PTR(-ENOMEM);
 818
 819         rc = clk_get_by_name(dev, id, clk);
 820         if (rc)
 821                 return ERR_PTR(rc);
 822
 823         devres_add(dev, clk);
 824         return clk;
 825 }
 826
 827 struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
 828 {
 829         struct clk *clk = devm_clk_get(dev, id);
 830
 831         if (PTR_ERR(clk) == -ENODATA)
 832                 return NULL;
 833
 834         return clk;
 835 }
 836
 837 void devm_clk_put(struct udevice *dev, struct clk *clk)
 838 {
 839         int rc;
 840
 841         if (!clk)
 842                 return;
 843
 844         rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
 845         WARN_ON(rc);
 846 }
 847
 848 int clk_uclass_post_probe(struct udevice *dev)
 849 {
 850         /*
 851          * when a clock provider is probed. Call clk_set_defaults()
 852          * also after the device is probed. This takes care of cases
 853          * where the DT is used to setup default parents and rates
 854          * using assigned-clocks
 855          */
 856         clk_set_defaults(dev, CLK_DEFAULTS_POST);
 857
 858         return 0;
 859 }
 860
 861 UCLASS_DRIVER(clk) = {
 862         .id             = UCLASS_CLK,
 863         .name           = "clk",
 864         .post_probe     = clk_uclass_post_probe,
 865 };