drivers/clk/clk-uclass.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Google, Inc
   4  * Written by Simon Glass <sjg@chromium.org>
   5  * Copyright (c) 2016, NVIDIA CORPORATION.
   6  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
   7  */
   8
   9 #define LOG_CATEGORY UCLASS_CLK
  10
  11 #include <common.h>
  12 #include <clk.h>
  13 #include <clk-uclass.h>
  14 #include <dm.h>
  15 #include <dt-structs.h>
  16 #include <errno.h>
  17 #include <log.h>
  18 #include <malloc.h>
  19 #include <asm/global_data.h>
  20 #include <dm/device_compat.h>
  21 #include <dm/device-internal.h>
  22 #include <dm/devres.h>
  23 #include <dm/read.h>
  24 #include <linux/bug.h>
  25 #include <linux/clk-provider.h>
  26 #include <linux/err.h>
  27
  28 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  29 {
  30         return (const struct clk_ops *)dev->driver->ops;
  31 }
  32
  33 struct clk *dev_get_clk_ptr(struct udevice *dev)
  34 {
  35         return (struct clk *)dev_get_uclass_priv(dev);
  36 }
  37
  38 #if CONFIG_IS_ENABLED(OF_PLATDATA)
  39 int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells,
  40                        struct clk *clk)
  41 {
  42         int ret;
  43
  44         ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
  45         if (ret)
  46                 return ret;
  47         clk->id = cells->arg[0];
  48
  49         return 0;
  50 }
  51 #endif
  52
  53 #if CONFIG_IS_ENABLED(OF_REAL)
  54 static int clk_of_xlate_default(struct clk *clk,
  55                                 struct ofnode_phandle_args *args)
  56 {
  57         debug("%s(clk=%p)\n", __func__, clk);
  58
  59         if (args->args_count > 1) {
  60                 debug("Invalid args_count: %d\n", args->args_count);
  61                 return -EINVAL;
  62         }
  63
  64         if (args->args_count)
  65                 clk->id = args->args[0];
  66         else
  67                 clk->id = 0;
  68
  69         clk->data = 0;
  70
  71         return 0;
  72 }
  73
  74 static int clk_get_by_index_tail(int ret, ofnode node,
  75                                  struct ofnode_phandle_args *args,
  76                                  const char *list_name, int index,
  77                                  struct clk *clk)
  78 {
  79         struct udevice *dev_clk;
  80         const struct clk_ops *ops;
  81
  82         assert(clk);
  83         clk->dev = NULL;
  84         if (ret)
  85                 goto err;
  86
  87         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  88         if (ret) {
  89                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  90                       __func__, ret);
  91                 return log_msg_ret("get", ret);
  92         }
  93
  94         clk->dev = dev_clk;
  95
  96         ops = clk_dev_ops(dev_clk);
  97
  98         if (ops->of_xlate)
  99                 ret = ops->of_xlate(clk, args);
 100         else
 101                 ret = clk_of_xlate_default(clk, args);
 102         if (ret) {
 103                 debug("of_xlate() failed: %d\n", ret);
 104                 return log_msg_ret("xlate", ret);
 105         }
 106
 107         return clk_request(dev_clk, clk);
 108 err:
 109         debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
 110               __func__, ofnode_get_name(node), list_name, index, ret);
 111
 112         return log_msg_ret("prop", ret);
 113 }
 114
 115 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 116                                    int index, struct clk *clk)
 117 {
 118         int ret;
 119         struct ofnode_phandle_args args;
 120
 121         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 122
 123         assert(clk);
 124         clk->dev = NULL;
 125
 126         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 127                                          index, &args);
 128         if (ret) {
 129                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 130                       __func__, ret);
 131                 return log_ret(ret);
 132         }
 133
 134
 135         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 136                                      index, clk);
 137 }
 138
 139 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 140 {
 141         return clk_get_by_index_nodev(dev_ofnode(dev), index, clk);
 142 }
 143
 144 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
 145 {
 146         struct ofnode_phandle_args args;
 147         int ret;
 148
 149         ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
 150                                              index, &args);
 151
 152         return clk_get_by_index_tail(ret, node, &args, "clocks",
 153                                      index, clk);
 154 }
 155
 156 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 157 {
 158         int i, ret, err, count;
 159
 160         bulk->count = 0;
 161
 162         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
 163         if (count < 1)
 164                 return count;
 165
 166         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
 167         if (!bulk->clks)
 168                 return -ENOMEM;
 169
 170         for (i = 0; i < count; i++) {
 171                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
 172                 if (ret < 0)
 173                         goto bulk_get_err;
 174
 175                 ++bulk->count;
 176         }
 177
 178         return 0;
 179
 180 bulk_get_err:
 181         err = clk_release_all(bulk->clks, bulk->count);
 182         if (err)
 183                 debug("%s: could release all clocks for %p\n",
 184                       __func__, dev);
 185
 186         return ret;
 187 }
 188
 189 static struct clk *clk_set_default_get_by_id(struct clk *clk)
 190 {
 191         struct clk *c = clk;
 192
 193         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 194                 int ret = clk_get_by_id(clk->id, &c);
 195
 196                 if (ret) {
 197                         debug("%s(): could not get parent clock pointer, id %lu\n",
 198                               __func__, clk->id);
 199                         ERR_PTR(ret);
 200                 }
 201         }
 202
 203         return c;
 204 }
 205
 206 static int clk_set_default_parents(struct udevice *dev,
 207                                    enum clk_defaults_stage stage)
 208 {
 209         struct clk clk, parent_clk, *c, *p;
 210         int index;
 211         int num_parents;
 212         int ret;
 213
 214         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 215                                                   "#clock-cells", 0);
 216         if (num_parents < 0) {
 217                 debug("%s: could not read assigned-clock-parents for %p\n",
 218                       __func__, dev);
 219                 return 0;
 220         }
 221
 222         for (index = 0; index < num_parents; index++) {
 223                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
 224                                               index, &parent_clk);
 225                 /* If -ENOENT, this is a no-op entry */
 226                 if (ret == -ENOENT)
 227                         continue;
 228
 229                 if (ret) {
 230                         debug("%s: could not get parent clock %d for %s\n",
 231                               __func__, index, dev_read_name(dev));
 232                         return ret;
 233                 }
 234
 235                 p = clk_set_default_get_by_id(&parent_clk);
 236                 if (IS_ERR(p))
 237                         return PTR_ERR(p);
 238
 239                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 240                                               index, &clk);
 241                 /*
 242                  * If the clock provider is not ready yet, let it handle
 243                  * the re-programming later.
 244                  */
 245                 if (ret == -EPROBE_DEFER) {
 246                         ret = 0;
 247                         continue;
 248                 }
 249
 250                 if (ret) {
 251                         debug("%s: could not get assigned clock %d for %s\n",
 252                               __func__, index, dev_read_name(dev));
 253                         return ret;
 254                 }
 255
 256                 /* This is clk provider device trying to reparent itself
 257                  * It cannot be done right now but need to wait after the
 258                  * device is probed
 259                  */
 260                 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
 261                         continue;
 262
 263                 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
 264                         /* do not setup twice the parent clocks */
 265                         continue;
 266
 267                 c = clk_set_default_get_by_id(&clk);
 268                 if (IS_ERR(c))
 269                         return PTR_ERR(c);
 270
 271                 ret = clk_set_parent(c, p);
 272                 /*
 273                  * Not all drivers may support clock-reparenting (as of now).
 274                  * Ignore errors due to this.
 275                  */
 276                 if (ret == -ENOSYS)
 277                         continue;
 278
 279                 if (ret < 0) {
 280                         debug("%s: failed to reparent clock %d for %s\n",
 281                               __func__, index, dev_read_name(dev));
 282                         return ret;
 283                 }
 284         }
 285
 286         return 0;
 287 }
 288
 289 static int clk_set_default_rates(struct udevice *dev,
 290                                  enum clk_defaults_stage stage)
 291 {
 292         struct clk clk, *c;
 293         int index;
 294         int num_rates;
 295         int size;
 296         int ret = 0;
 297         u32 *rates = NULL;
 298
 299         size = dev_read_size(dev, "assigned-clock-rates");
 300         if (size < 0)
 301                 return 0;
 302
 303         num_rates = size / sizeof(u32);
 304         rates = calloc(num_rates, sizeof(u32));
 305         if (!rates)
 306                 return -ENOMEM;
 307
 308         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
 309         if (ret)
 310                 goto fail;
 311
 312         for (index = 0; index < num_rates; index++) {
 313                 /* If 0 is passed, this is a no-op */
 314                 if (!rates[index])
 315                         continue;
 316
 317                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 318                                               index, &clk);
 319                 /*
 320                  * If the clock provider is not ready yet, let it handle
 321                  * the re-programming later.
 322                  */
 323                 if (ret == -EPROBE_DEFER) {
 324                         ret = 0;
 325                         continue;
 326                 }
 327
 328                 if (ret) {
 329                         dev_dbg(dev,
 330                                 "could not get assigned clock %d (err = %d)\n",
 331                                 index, ret);
 332                         continue;
 333                 }
 334
 335                 /* This is clk provider device trying to program itself
 336                  * It cannot be done right now but need to wait after the
 337                  * device is probed
 338                  */
 339                 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
 340                         continue;
 341
 342                 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
 343                         /* do not setup twice the parent clocks */
 344                         continue;
 345
 346                 c = clk_set_default_get_by_id(&clk);
 347                 if (IS_ERR(c))
 348                         return PTR_ERR(c);
 349
 350                 ret = clk_set_rate(c, rates[index]);
 351
 352                 if (ret < 0) {
 353                         dev_warn(dev,
 354                                  "failed to set rate on clock index %d (%ld) (error = %d)\n",
 355                                  index, clk.id, ret);
 356                         break;
 357                 }
 358         }
 359
 360 fail:
 361         free(rates);
 362         return ret;
 363 }
 364
 365 int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
 366 {
 367         int ret;
 368
 369         if (!dev_has_ofnode(dev))
 370                 return 0;
 371
 372         /*
 373          * To avoid setting defaults twice, don't set them before relocation.
 374          * However, still set them for SPL. And still set them if explicitly
 375          * asked.
 376          */
 377         if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
 378                 if (stage != CLK_DEFAULTS_POST_FORCE)
 379                         return 0;
 380
 381         debug("%s(%s)\n", __func__, dev_read_name(dev));
 382
 383         ret = clk_set_default_parents(dev, stage);
 384         if (ret)
 385                 return ret;
 386
 387         ret = clk_set_default_rates(dev, stage);
 388         if (ret < 0)
 389                 return ret;
 390
 391         return 0;
 392 }
 393
 394 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 395 {
 396         return clk_get_by_name_nodev(dev_ofnode(dev), name, clk);
 397 }
 398 #endif /* OF_REAL */
 399
 400 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
 401 {
 402         int index = 0;
 403
 404         debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
 405                 ofnode_get_name(node), name, clk);
 406         clk->dev = NULL;
 407
 408         if (name) {
 409                 index = ofnode_stringlist_search(node, "clock-names", name);
 410                 if (index < 0) {
 411                         debug("fdt_stringlist_search() failed: %d\n", index);
 412                         return index;
 413                 }
 414         }
 415
 416         return clk_get_by_index_nodev(node, index, clk);
 417 }
 418
 419 int clk_release_all(struct clk *clk, int count)
 420 {
 421         int i, ret;
 422
 423         for (i = 0; i < count; i++) {
 424                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 425
 426                 /* check if clock has been previously requested */
 427                 if (!clk[i].dev)
 428                         continue;
 429
 430                 ret = clk_disable(&clk[i]);
 431                 if (ret && ret != -ENOSYS)
 432                         return ret;
 433
 434                 clk_free(&clk[i]);
 435         }
 436
 437         return 0;
 438 }
 439
 440 int clk_request(struct udevice *dev, struct clk *clk)
 441 {
 442         const struct clk_ops *ops;
 443
 444         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 445         if (!clk)
 446                 return 0;
 447         ops = clk_dev_ops(dev);
 448
 449         clk->dev = dev;
 450
 451         if (!ops->request)
 452                 return 0;
 453
 454         return ops->request(clk);
 455 }
 456
 457 void clk_free(struct clk *clk)
 458 {
 459         const struct clk_ops *ops;
 460
 461         debug("%s(clk=%p)\n", __func__, clk);
 462         if (!clk_valid(clk))
 463                 return;
 464         ops = clk_dev_ops(clk->dev);
 465
 466         if (ops->rfree)
 467                 ops->rfree(clk);
 468         return;
 469 }
 470
 471 ulong clk_get_rate(struct clk *clk)
 472 {
 473         const struct clk_ops *ops;
 474         int ret;
 475
 476         debug("%s(clk=%p)\n", __func__, clk);
 477         if (!clk_valid(clk))
 478                 return 0;
 479         ops = clk_dev_ops(clk->dev);
 480
 481         if (!ops->get_rate)
 482                 return -ENOSYS;
 483
 484         ret = ops->get_rate(clk);
 485         if (ret)
 486                 return log_ret(ret);
 487
 488         return 0;
 489 }
 490
 491 struct clk *clk_get_parent(struct clk *clk)
 492 {
 493         struct udevice *pdev;
 494         struct clk *pclk;
 495
 496         debug("%s(clk=%p)\n", __func__, clk);
 497         if (!clk_valid(clk))
 498                 return NULL;
 499
 500         pdev = dev_get_parent(clk->dev);
 501         if (!pdev)
 502                 return ERR_PTR(-ENODEV);
 503         pclk = dev_get_clk_ptr(pdev);
 504         if (!pclk)
 505                 return ERR_PTR(-ENODEV);
 506
 507         return pclk;
 508 }
 509
 510 ulong clk_get_parent_rate(struct clk *clk)
 511 {
 512         const struct clk_ops *ops;
 513         struct clk *pclk;
 514
 515         debug("%s(clk=%p)\n", __func__, clk);
 516         if (!clk_valid(clk))
 517                 return 0;
 518
 519         pclk = clk_get_parent(clk);
 520         if (IS_ERR(pclk))
 521                 return -ENODEV;
 522
 523         ops = clk_dev_ops(pclk->dev);
 524         if (!ops->get_rate)
 525                 return -ENOSYS;
 526
 527         /* Read the 'rate' if not already set or if proper flag set*/
 528         if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
 529                 pclk->rate = clk_get_rate(pclk);
 530
 531         return pclk->rate;
 532 }
 533
 534 ulong clk_round_rate(struct clk *clk, ulong rate)
 535 {
 536         const struct clk_ops *ops;
 537
 538         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 539         if (!clk_valid(clk))
 540                 return 0;
 541
 542         ops = clk_dev_ops(clk->dev);
 543         if (!ops->round_rate)
 544                 return -ENOSYS;
 545
 546         return ops->round_rate(clk, rate);
 547 }
 548
 549 static void clk_get_priv(struct clk *clk, struct clk **clkp)
 550 {
 551         *clkp = clk;
 552
 553         /* get private clock struct associated to the provided clock */
 554         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 555                 /* Take id 0 as a non-valid clk, such as dummy */
 556                 if (clk->id)
 557                         clk_get_by_id(clk->id, clkp);
 558         }
 559 }
 560
 561 /* clean cache, called with private clock struct */
 562 static void clk_clean_rate_cache(struct clk *clk)
 563 {
 564         struct udevice *child_dev;
 565         struct clk *clkp;
 566
 567         if (!clk)
 568                 return;
 569
 570         clk->rate = 0;
 571
 572         list_for_each_entry(child_dev, &clk->dev->child_head, sibling_node) {
 573                 clkp = dev_get_clk_ptr(child_dev);
 574                 clk_clean_rate_cache(clkp);
 575         }
 576 }
 577
 578 ulong clk_set_rate(struct clk *clk, ulong rate)
 579 {
 580         const struct clk_ops *ops;
 581         struct clk *clkp;
 582
 583         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 584         if (!clk_valid(clk))
 585                 return 0;
 586         ops = clk_dev_ops(clk->dev);
 587
 588         if (!ops->set_rate)
 589                 return -ENOSYS;
 590
 591         /* get private clock struct used for cache */
 592         clk_get_priv(clk, &clkp);
 593         /* Clean up cached rates for us and all child clocks */
 594         clk_clean_rate_cache(clkp);
 595
 596         return ops->set_rate(clk, rate);
 597 }
 598
 599 int clk_set_parent(struct clk *clk, struct clk *parent)
 600 {
 601         const struct clk_ops *ops;
 602         int ret;
 603
 604         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 605         if (!clk_valid(clk))
 606                 return 0;
 607         ops = clk_dev_ops(clk->dev);
 608
 609         if (!ops->set_parent)
 610                 return -ENOSYS;
 611
 612         ret = ops->set_parent(clk, parent);
 613         if (ret)
 614                 return ret;
 615
 616         if (CONFIG_IS_ENABLED(CLK_CCF))
 617                 ret = device_reparent(clk->dev, parent->dev);
 618
 619         return ret;
 620 }
 621
 622 int clk_enable(struct clk *clk)
 623 {
 624         const struct clk_ops *ops;
 625         struct clk *clkp = NULL;
 626         int ret;
 627
 628         debug("%s(clk=%p)\n", __func__, clk);
 629         if (!clk_valid(clk))
 630                 return 0;
 631         ops = clk_dev_ops(clk->dev);
 632
 633         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 634                 /* Take id 0 as a non-valid clk, such as dummy */
 635                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
 636                         if (clkp->enable_count) {
 637                                 clkp->enable_count++;
 638                                 return 0;
 639                         }
 640                         if (clkp->dev->parent &&
 641                             device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
 642                                 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
 643                                 if (ret) {
 644                                         printf("Enable %s failed\n",
 645                                                clkp->dev->parent->name);
 646                                         return ret;
 647                                 }
 648                         }
 649                 }
 650
 651                 if (ops->enable) {
 652                         ret = ops->enable(clk);
 653                         if (ret) {
 654                                 printf("Enable %s failed\n", clk->dev->name);
 655                                 return ret;
 656                         }
 657                 }
 658                 if (clkp)
 659                         clkp->enable_count++;
 660         } else {
 661                 if (!ops->enable)
 662                         return -ENOSYS;
 663                 return ops->enable(clk);
 664         }
 665
 666         return 0;
 667 }
 668
 669 int clk_enable_bulk(struct clk_bulk *bulk)
 670 {
 671         int i, ret;
 672
 673         for (i = 0; i < bulk->count; i++) {
 674                 ret = clk_enable(&bulk->clks[i]);
 675                 if (ret < 0 && ret != -ENOSYS)
 676                         return ret;
 677         }
 678
 679         return 0;
 680 }
 681
 682 int clk_disable(struct clk *clk)
 683 {
 684         const struct clk_ops *ops;
 685         struct clk *clkp = NULL;
 686         int ret;
 687
 688         debug("%s(clk=%p)\n", __func__, clk);
 689         if (!clk_valid(clk))
 690                 return 0;
 691         ops = clk_dev_ops(clk->dev);
 692
 693         if (CONFIG_IS_ENABLED(CLK_CCF)) {
 694                 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
 695                         if (clkp->flags & CLK_IS_CRITICAL)
 696                                 return 0;
 697
 698                         if (clkp->enable_count == 0) {
 699                                 printf("clk %s already disabled\n",
 700                                        clkp->dev->name);
 701                                 return 0;
 702                         }
 703
 704                         if (--clkp->enable_count > 0)
 705                                 return 0;
 706                 }
 707
 708                 if (ops->disable) {
 709                         ret = ops->disable(clk);
 710                         if (ret)
 711                                 return ret;
 712                 }
 713
 714                 if (clkp && clkp->dev->parent &&
 715                     device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
 716                         ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
 717                         if (ret) {
 718                                 printf("Disable %s failed\n",
 719                                        clkp->dev->parent->name);
 720                                 return ret;
 721                         }
 722                 }
 723         } else {
 724                 if (!ops->disable)
 725                         return -ENOSYS;
 726
 727                 return ops->disable(clk);
 728         }
 729
 730         return 0;
 731 }
 732
 733 int clk_disable_bulk(struct clk_bulk *bulk)
 734 {
 735         int i, ret;
 736
 737         for (i = 0; i < bulk->count; i++) {
 738                 ret = clk_disable(&bulk->clks[i]);
 739                 if (ret < 0 && ret != -ENOSYS)
 740                         return ret;
 741         }
 742
 743         return 0;
 744 }
 745
 746 int clk_get_by_id(ulong id, struct clk **clkp)
 747 {
 748         struct udevice *dev;
 749         struct uclass *uc;
 750         int ret;
 751
 752         ret = uclass_get(UCLASS_CLK, &uc);
 753         if (ret)
 754                 return ret;
 755
 756         uclass_foreach_dev(dev, uc) {
 757                 struct clk *clk = dev_get_clk_ptr(dev);
 758
 759                 if (clk && clk->id == id) {
 760                         *clkp = clk;
 761                         return 0;
 762                 }
 763         }
 764
 765         return -ENOENT;
 766 }
 767
 768 bool clk_is_match(const struct clk *p, const struct clk *q)
 769 {
 770         /* trivial case: identical struct clk's or both NULL */
 771         if (p == q)
 772                 return true;
 773
 774         /* trivial case #2: on the clk pointer is NULL */
 775         if (!p || !q)
 776                 return false;
 777
 778         /* same device, id and data */
 779         if (p->dev == q->dev && p->id == q->id && p->data == q->data)
 780                 return true;
 781
 782         return false;
 783 }
 784
 785 static void devm_clk_release(struct udevice *dev, void *res)
 786 {
 787         clk_free(res);
 788 }
 789
 790 static int devm_clk_match(struct udevice *dev, void *res, void *data)
 791 {
 792         return res == data;
 793 }
 794
 795 struct clk *devm_clk_get(struct udevice *dev, const char *id)
 796 {
 797         int rc;
 798         struct clk *clk;
 799
 800         clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
 801         if (unlikely(!clk))
 802                 return ERR_PTR(-ENOMEM);
 803
 804         rc = clk_get_by_name(dev, id, clk);
 805         if (rc)
 806                 return ERR_PTR(rc);
 807
 808         devres_add(dev, clk);
 809         return clk;
 810 }
 811
 812 void devm_clk_put(struct udevice *dev, struct clk *clk)
 813 {
 814         int rc;
 815
 816         if (!clk)
 817                 return;
 818
 819         rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
 820         WARN_ON(rc);
 821 }
 822
 823 int clk_uclass_post_probe(struct udevice *dev)
 824 {
 825         /*
 826          * when a clock provider is probed. Call clk_set_defaults()
 827          * also after the device is probed. This takes care of cases
 828          * where the DT is used to setup default parents and rates
 829          * using assigned-clocks
 830          */
 831         clk_set_defaults(dev, CLK_DEFAULTS_POST);
 832
 833         return 0;
 834 }
 835
 836 UCLASS_DRIVER(clk) = {
 837         .id             = UCLASS_CLK,
 838         .name           = "clk",
 839         .post_probe     = clk_uclass_post_probe,
 840 };