1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
5 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
9 #define LOG_CATEGORY UCLASS_CLK
13 #include <clk-uclass.h>
15 #include <dt-structs.h>
19 #include <asm/global_data.h>
20 #include <dm/device_compat.h>
21 #include <dm/device-internal.h>
22 #include <dm/devres.h>
24 #include <linux/bug.h>
25 #include <linux/clk-provider.h>
26 #include <linux/err.h>
28 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
30 return (const struct clk_ops *)dev->driver->ops;
33 struct clk *dev_get_clk_ptr(struct udevice *dev)
35 return (struct clk *)dev_get_uclass_priv(dev);
38 #if CONFIG_IS_ENABLED(OF_PLATDATA)
39 int clk_get_by_phandle(struct udevice *dev, const struct phandle_1_arg *cells,
44 ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
47 clk->id = cells->arg[0];
53 #if CONFIG_IS_ENABLED(OF_REAL)
54 static int clk_of_xlate_default(struct clk *clk,
55 struct ofnode_phandle_args *args)
57 debug("%s(clk=%p)\n", __func__, clk);
59 if (args->args_count > 1) {
60 debug("Invalid args_count: %d\n", args->args_count);
65 clk->id = args->args[0];
74 static int clk_get_by_index_tail(int ret, ofnode node,
75 struct ofnode_phandle_args *args,
76 const char *list_name, int index,
79 struct udevice *dev_clk;
80 const struct clk_ops *ops;
87 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
89 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
91 return log_msg_ret("get", ret);
96 ops = clk_dev_ops(dev_clk);
99 ret = ops->of_xlate(clk, args);
101 ret = clk_of_xlate_default(clk, args);
103 debug("of_xlate() failed: %d\n", ret);
104 return log_msg_ret("xlate", ret);
107 return clk_request(dev_clk, clk);
109 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
110 __func__, ofnode_get_name(node), list_name, index, ret);
112 return log_msg_ret("prop", ret);
115 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
116 int index, struct clk *clk)
119 struct ofnode_phandle_args args;
121 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
126 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
129 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
135 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
139 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
141 return clk_get_by_index_nodev(dev_ofnode(dev), index, clk);
144 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
146 struct ofnode_phandle_args args;
149 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
152 return clk_get_by_index_tail(ret, node, &args, "clocks",
156 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
158 int i, ret, err, count;
162 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
166 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
170 for (i = 0; i < count; i++) {
171 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
181 err = clk_release_all(bulk->clks, bulk->count);
183 debug("%s: could release all clocks for %p\n",
189 static struct clk *clk_set_default_get_by_id(struct clk *clk)
193 if (CONFIG_IS_ENABLED(CLK_CCF)) {
194 int ret = clk_get_by_id(clk->id, &c);
197 debug("%s(): could not get parent clock pointer, id %lu\n",
206 static int clk_set_default_parents(struct udevice *dev,
207 enum clk_defaults_stage stage)
209 struct clk clk, parent_clk, *c, *p;
214 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
216 if (num_parents < 0) {
217 debug("%s: could not read assigned-clock-parents for %p\n",
222 for (index = 0; index < num_parents; index++) {
223 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
225 /* If -ENOENT, this is a no-op entry */
230 debug("%s: could not get parent clock %d for %s\n",
231 __func__, index, dev_read_name(dev));
235 p = clk_set_default_get_by_id(&parent_clk);
239 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
242 * If the clock provider is not ready yet, let it handle
243 * the re-programming later.
245 if (ret == -EPROBE_DEFER) {
251 debug("%s: could not get assigned clock %d for %s\n",
252 __func__, index, dev_read_name(dev));
256 /* This is clk provider device trying to reparent itself
257 * It cannot be done right now but need to wait after the
260 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
263 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
264 /* do not setup twice the parent clocks */
267 c = clk_set_default_get_by_id(&clk);
271 ret = clk_set_parent(c, p);
273 * Not all drivers may support clock-reparenting (as of now).
274 * Ignore errors due to this.
280 debug("%s: failed to reparent clock %d for %s\n",
281 __func__, index, dev_read_name(dev));
289 static int clk_set_default_rates(struct udevice *dev,
290 enum clk_defaults_stage stage)
299 size = dev_read_size(dev, "assigned-clock-rates");
303 num_rates = size / sizeof(u32);
304 rates = calloc(num_rates, sizeof(u32));
308 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
312 for (index = 0; index < num_rates; index++) {
313 /* If 0 is passed, this is a no-op */
317 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
320 * If the clock provider is not ready yet, let it handle
321 * the re-programming later.
323 if (ret == -EPROBE_DEFER) {
330 "could not get assigned clock %d (err = %d)\n",
335 /* This is clk provider device trying to program itself
336 * It cannot be done right now but need to wait after the
339 if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
342 if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
343 /* do not setup twice the parent clocks */
346 c = clk_set_default_get_by_id(&clk);
350 ret = clk_set_rate(c, rates[index]);
354 "failed to set rate on clock index %d (%ld) (error = %d)\n",
365 int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
369 if (!dev_has_ofnode(dev))
373 * To avoid setting defaults twice, don't set them before relocation.
374 * However, still set them for SPL. And still set them if explicitly
377 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
378 if (stage != CLK_DEFAULTS_POST_FORCE)
381 debug("%s(%s)\n", __func__, dev_read_name(dev));
383 ret = clk_set_default_parents(dev, stage);
387 ret = clk_set_default_rates(dev, stage);
394 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
396 return clk_get_by_name_nodev(dev_ofnode(dev), name, clk);
400 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
404 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
405 ofnode_get_name(node), name, clk);
408 index = ofnode_stringlist_search(node, "clock-names", name);
410 debug("fdt_stringlist_search() failed: %d\n", index);
414 return clk_get_by_index_nodev(node, index, clk);
417 int clk_release_all(struct clk *clk, int count)
421 for (i = 0; i < count; i++) {
422 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
424 /* check if clock has been previously requested */
428 ret = clk_disable(&clk[i]);
429 if (ret && ret != -ENOSYS)
438 int clk_request(struct udevice *dev, struct clk *clk)
440 const struct clk_ops *ops;
442 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
445 ops = clk_dev_ops(dev);
452 return ops->request(clk);
455 void clk_free(struct clk *clk)
457 const struct clk_ops *ops;
459 debug("%s(clk=%p)\n", __func__, clk);
462 ops = clk_dev_ops(clk->dev);
469 ulong clk_get_rate(struct clk *clk)
471 const struct clk_ops *ops;
474 debug("%s(clk=%p)\n", __func__, clk);
477 ops = clk_dev_ops(clk->dev);
482 ret = ops->get_rate(clk);
489 struct clk *clk_get_parent(struct clk *clk)
491 struct udevice *pdev;
494 debug("%s(clk=%p)\n", __func__, clk);
498 pdev = dev_get_parent(clk->dev);
500 return ERR_PTR(-ENODEV);
501 pclk = dev_get_clk_ptr(pdev);
503 return ERR_PTR(-ENODEV);
508 long long clk_get_parent_rate(struct clk *clk)
510 const struct clk_ops *ops;
513 debug("%s(clk=%p)\n", __func__, clk);
517 pclk = clk_get_parent(clk);
521 ops = clk_dev_ops(pclk->dev);
525 /* Read the 'rate' if not already set or if proper flag set*/
526 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
527 pclk->rate = clk_get_rate(pclk);
532 ulong clk_round_rate(struct clk *clk, ulong rate)
534 const struct clk_ops *ops;
536 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
540 ops = clk_dev_ops(clk->dev);
541 if (!ops->round_rate)
544 return ops->round_rate(clk, rate);
547 static void clk_clean_rate_cache(struct clk *clk)
549 struct udevice *child_dev;
557 list_for_each_entry(child_dev, &clk->dev->child_head, sibling_node) {
558 clkp = dev_get_clk_ptr(child_dev);
559 clk_clean_rate_cache(clkp);
563 ulong clk_set_rate(struct clk *clk, ulong rate)
565 const struct clk_ops *ops;
567 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
570 ops = clk_dev_ops(clk->dev);
575 /* Clean up cached rates for us and all child clocks */
576 clk_clean_rate_cache(clk);
578 return ops->set_rate(clk, rate);
581 int clk_set_parent(struct clk *clk, struct clk *parent)
583 const struct clk_ops *ops;
586 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
589 ops = clk_dev_ops(clk->dev);
591 if (!ops->set_parent)
594 ret = ops->set_parent(clk, parent);
598 if (CONFIG_IS_ENABLED(CLK_CCF))
599 ret = device_reparent(clk->dev, parent->dev);
604 int clk_enable(struct clk *clk)
606 const struct clk_ops *ops;
607 struct clk *clkp = NULL;
610 debug("%s(clk=%p)\n", __func__, clk);
613 ops = clk_dev_ops(clk->dev);
615 if (CONFIG_IS_ENABLED(CLK_CCF)) {
616 /* Take id 0 as a non-valid clk, such as dummy */
617 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
618 if (clkp->enable_count) {
619 clkp->enable_count++;
622 if (clkp->dev->parent &&
623 device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
624 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
626 printf("Enable %s failed\n",
627 clkp->dev->parent->name);
634 ret = ops->enable(clk);
636 printf("Enable %s failed\n", clk->dev->name);
641 clkp->enable_count++;
645 return ops->enable(clk);
651 int clk_enable_bulk(struct clk_bulk *bulk)
655 for (i = 0; i < bulk->count; i++) {
656 ret = clk_enable(&bulk->clks[i]);
657 if (ret < 0 && ret != -ENOSYS)
664 int clk_disable(struct clk *clk)
666 const struct clk_ops *ops;
667 struct clk *clkp = NULL;
670 debug("%s(clk=%p)\n", __func__, clk);
673 ops = clk_dev_ops(clk->dev);
675 if (CONFIG_IS_ENABLED(CLK_CCF)) {
676 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
677 if (clkp->flags & CLK_IS_CRITICAL)
680 if (clkp->enable_count == 0) {
681 printf("clk %s already disabled\n",
686 if (--clkp->enable_count > 0)
691 ret = ops->disable(clk);
696 if (clkp && clkp->dev->parent &&
697 device_get_uclass_id(clkp->dev->parent) == UCLASS_CLK) {
698 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
700 printf("Disable %s failed\n",
701 clkp->dev->parent->name);
709 return ops->disable(clk);
715 int clk_disable_bulk(struct clk_bulk *bulk)
719 for (i = 0; i < bulk->count; i++) {
720 ret = clk_disable(&bulk->clks[i]);
721 if (ret < 0 && ret != -ENOSYS)
728 int clk_get_by_id(ulong id, struct clk **clkp)
734 ret = uclass_get(UCLASS_CLK, &uc);
738 uclass_foreach_dev(dev, uc) {
739 struct clk *clk = dev_get_clk_ptr(dev);
741 if (clk && clk->id == id) {
750 bool clk_is_match(const struct clk *p, const struct clk *q)
752 /* trivial case: identical struct clk's or both NULL */
756 /* trivial case #2: on the clk pointer is NULL */
760 /* same device, id and data */
761 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
767 static void devm_clk_release(struct udevice *dev, void *res)
772 static int devm_clk_match(struct udevice *dev, void *res, void *data)
777 struct clk *devm_clk_get(struct udevice *dev, const char *id)
782 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
784 return ERR_PTR(-ENOMEM);
786 rc = clk_get_by_name(dev, id, clk);
790 devres_add(dev, clk);
794 void devm_clk_put(struct udevice *dev, struct clk *clk)
801 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
805 int clk_uclass_post_probe(struct udevice *dev)
808 * when a clock provider is probed. Call clk_set_defaults()
809 * also after the device is probed. This takes care of cases
810 * where the DT is used to setup default parents and rates
811 * using assigned-clocks
813 clk_set_defaults(dev, CLK_DEFAULTS_POST);
818 UCLASS_DRIVER(clk) = {
821 .post_probe = clk_uclass_post_probe,