1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
7 * Gated clock implementation
13 #include <clk-uclass.h>
14 #include <dm/device.h>
15 #include <linux/clk-provider.h>
19 #define UBOOT_DM_CLK_GATE "clk_gate"
22 * DOC: basic gatable clock which can gate and ungate it's output
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gating
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
32 * It works on following logic:
34 * For enabling clock, enable = 1
35 * set2dis = 1 -> clear bit -> set = 0
36 * set2dis = 0 -> set bit -> set = 1
38 * For disabling clock, enable = 0
39 * set2dis = 1 -> set bit -> set = 1
40 * set2dis = 0 -> clear bit -> set = 0
42 * So, result is always: enable xor set2dis.
44 static void clk_gate_endisable(struct clk *clk, int enable)
46 struct clk_gate *gate = to_clk_gate(clk_dev_binded(clk) ?
47 dev_get_clk_ptr(clk->dev) : clk);
48 int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
53 if (gate->flags & CLK_GATE_HIWORD_MASK) {
54 reg = BIT(gate->bit_idx + 16);
56 reg |= BIT(gate->bit_idx);
58 reg = readl(gate->reg);
61 reg |= BIT(gate->bit_idx);
63 reg &= ~BIT(gate->bit_idx);
66 writel(reg, gate->reg);
69 static int clk_gate_enable(struct clk *clk)
71 clk_gate_endisable(clk, 1);
76 static int clk_gate_disable(struct clk *clk)
78 clk_gate_endisable(clk, 0);
83 int clk_gate_is_enabled(struct clk *clk)
85 struct clk_gate *gate = to_clk_gate(clk_dev_binded(clk) ?
86 dev_get_clk_ptr(clk->dev) : clk);
89 reg = readl(gate->reg);
91 /* if a set bit disables this clk, flip it before masking */
92 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
93 reg ^= BIT(gate->bit_idx);
95 reg &= BIT(gate->bit_idx);
100 const struct clk_ops clk_gate_ops = {
101 .enable = clk_gate_enable,
102 .disable = clk_gate_disable,
103 .get_rate = clk_generic_get_rate,
106 struct clk *clk_register_gate(struct device *dev, const char *name,
107 const char *parent_name, unsigned long flags,
108 void __iomem *reg, u8 bit_idx,
109 u8 clk_gate_flags, spinlock_t *lock)
111 struct clk_gate *gate;
115 if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
117 pr_err("gate bit exceeds LOWORD field\n");
118 return ERR_PTR(-EINVAL);
122 /* allocate the gate */
123 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
125 return ERR_PTR(-ENOMEM);
127 /* struct clk_gate assignments */
129 gate->bit_idx = bit_idx;
130 gate->flags = clk_gate_flags;
134 ret = clk_register(clk, UBOOT_DM_CLK_GATE, name, parent_name);
143 U_BOOT_DRIVER(clk_gate) = {
144 .name = UBOOT_DM_CLK_GATE,
146 .ops = &clk_gate_ops,
147 .flags = DM_FLAG_PRE_RELOC,