1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Intel Corporation
5 * Adjustable fractional divider clock implementation.
6 * Uses rational best approximation algorithm.
8 * Output is calculated as
10 * rate = (m / n) * parent_rate (1)
12 * This is useful when we have a prescaler block which asks for
13 * m (numerator) and n (denominator) values to be provided to satisfy
14 * the (1) as much as possible.
16 * Since m and n have the limitation by a range, e.g.
18 * n >= 1, n < N_width, where N_width = 2^nwidth (2)
20 * for some cases the output may be saturated. Hence, from (1) and (2),
21 * assuming the worst case when m = 1, the inequality
23 * floor(log2(parent_rate / rate)) <= nwidth (3)
25 * may be derived. Thus, in cases when
27 * (parent_rate / rate) >> N_width (4)
29 * we might scale up the rate by 2^scale (see the description of
30 * CLK_FRAC_DIVIDER_POWER_OF_TWO_PS for additional information), where
32 * scale = floor(log2(parent_rate / rate)) - nwidth (5)
34 * and assume that the IP, that needs m and n, has also its own
35 * prescaler, which is capable to divide by 2^scale. In this way
36 * we get the denominator to satisfy the desired range (2) and
37 * at the same time a much better result of m and n than simple
41 #include <linux/debugfs.h>
42 #include <linux/device.h>
44 #include <linux/math.h>
45 #include <linux/module.h>
46 #include <linux/rational.h>
47 #include <linux/slab.h>
49 #include <linux/clk-provider.h>
51 #include "clk-fractional-divider.h"
53 static inline u32 clk_fd_readl(struct clk_fractional_divider *fd)
55 if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
56 return ioread32be(fd->reg);
58 return readl(fd->reg);
61 static inline void clk_fd_writel(struct clk_fractional_divider *fd, u32 val)
63 if (fd->flags & CLK_FRAC_DIVIDER_BIG_ENDIAN)
64 iowrite32be(val, fd->reg);
69 static void clk_fd_get_div(struct clk_hw *hw, struct u32_fract *fract)
71 struct clk_fractional_divider *fd = to_clk_fd(hw);
72 unsigned long flags = 0;
78 spin_lock_irqsave(fd->lock, flags);
82 val = clk_fd_readl(fd);
85 spin_unlock_irqrestore(fd->lock, flags);
89 mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift;
90 nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift;
92 m = (val & mmask) >> fd->mshift;
93 n = (val & nmask) >> fd->nshift;
95 if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
100 fract->numerator = m;
101 fract->denominator = n;
104 static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
106 struct u32_fract fract;
109 clk_fd_get_div(hw, &fract);
111 if (!fract.numerator || !fract.denominator)
114 ret = (u64)parent_rate * fract.numerator;
115 do_div(ret, fract.denominator);
120 void clk_fractional_divider_general_approximation(struct clk_hw *hw,
122 unsigned long *parent_rate,
123 unsigned long *m, unsigned long *n)
125 struct clk_fractional_divider *fd = to_clk_fd(hw);
128 * Get rate closer to *parent_rate to guarantee there is no overflow
129 * for m and n. In the result it will be the nearest rate left shifted
130 * by (scale - fd->nwidth) bits.
132 * For the detailed explanation see the top comment in this file.
134 if (fd->flags & CLK_FRAC_DIVIDER_POWER_OF_TWO_PS) {
135 unsigned long scale = fls_long(*parent_rate / rate - 1);
137 if (scale > fd->nwidth)
138 rate <<= scale - fd->nwidth;
141 rational_best_approximation(rate, *parent_rate,
142 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
146 static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
147 unsigned long *parent_rate)
149 struct clk_fractional_divider *fd = to_clk_fd(hw);
153 if (!rate || (!clk_hw_can_set_rate_parent(hw) && rate >= *parent_rate))
156 if (fd->approximation)
157 fd->approximation(hw, rate, parent_rate, &m, &n);
159 clk_fractional_divider_general_approximation(hw, rate, parent_rate, &m, &n);
161 ret = (u64)*parent_rate * m;
167 static int clk_fd_set_rate(struct clk_hw *hw, unsigned long rate,
168 unsigned long parent_rate)
170 struct clk_fractional_divider *fd = to_clk_fd(hw);
171 unsigned long flags = 0;
176 rational_best_approximation(rate, parent_rate,
177 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
180 if (fd->flags & CLK_FRAC_DIVIDER_ZERO_BASED) {
186 spin_lock_irqsave(fd->lock, flags);
190 mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift;
191 nmask = GENMASK(fd->nwidth - 1, 0) << fd->nshift;
193 val = clk_fd_readl(fd);
194 val &= ~(mmask | nmask);
195 val |= (m << fd->mshift) | (n << fd->nshift);
196 clk_fd_writel(fd, val);
199 spin_unlock_irqrestore(fd->lock, flags);
206 #ifdef CONFIG_DEBUG_FS
207 static int clk_fd_numerator_get(void *hw, u64 *val)
209 struct u32_fract fract;
211 clk_fd_get_div(hw, &fract);
213 *val = fract.numerator;
217 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_numerator_fops, clk_fd_numerator_get, NULL, "%llu\n");
219 static int clk_fd_denominator_get(void *hw, u64 *val)
221 struct u32_fract fract;
223 clk_fd_get_div(hw, &fract);
225 *val = fract.denominator;
229 DEFINE_DEBUGFS_ATTRIBUTE(clk_fd_denominator_fops, clk_fd_denominator_get, NULL, "%llu\n");
231 static void clk_fd_debug_init(struct clk_hw *hw, struct dentry *dentry)
233 debugfs_create_file("numerator", 0444, dentry, hw, &clk_fd_numerator_fops);
234 debugfs_create_file("denominator", 0444, dentry, hw, &clk_fd_denominator_fops);
238 const struct clk_ops clk_fractional_divider_ops = {
239 .recalc_rate = clk_fd_recalc_rate,
240 .round_rate = clk_fd_round_rate,
241 .set_rate = clk_fd_set_rate,
242 #ifdef CONFIG_DEBUG_FS
243 .debug_init = clk_fd_debug_init,
246 EXPORT_SYMBOL_GPL(clk_fractional_divider_ops);
248 struct clk_hw *clk_hw_register_fractional_divider(struct device *dev,
249 const char *name, const char *parent_name, unsigned long flags,
250 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
251 u8 clk_divider_flags, spinlock_t *lock)
253 struct clk_fractional_divider *fd;
254 struct clk_init_data init;
258 fd = kzalloc(sizeof(*fd), GFP_KERNEL);
260 return ERR_PTR(-ENOMEM);
263 init.ops = &clk_fractional_divider_ops;
265 init.parent_names = parent_name ? &parent_name : NULL;
266 init.num_parents = parent_name ? 1 : 0;
273 fd->flags = clk_divider_flags;
278 ret = clk_hw_register(dev, hw);
286 EXPORT_SYMBOL_GPL(clk_hw_register_fractional_divider);
288 struct clk *clk_register_fractional_divider(struct device *dev,
289 const char *name, const char *parent_name, unsigned long flags,
290 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
291 u8 clk_divider_flags, spinlock_t *lock)
295 hw = clk_hw_register_fractional_divider(dev, name, parent_name, flags,
296 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags,
302 EXPORT_SYMBOL_GPL(clk_register_fractional_divider);
304 void clk_hw_unregister_fractional_divider(struct clk_hw *hw)
306 struct clk_fractional_divider *fd;
310 clk_hw_unregister(hw);