1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 #include <linux/module.h>
6 #include <linux/clk-provider.h>
7 #include <linux/slab.h>
10 #include <linux/platform_device.h>
13 * DOC: basic fixed multiplier and divider clock that cannot gate
15 * Traits of this clock:
16 * prepare - clk_prepare only ensures that parents are prepared
17 * enable - clk_enable only ensures that parents are enabled
18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
19 * parent - fixed parent. No clk_set_parent support
22 static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
23 unsigned long parent_rate)
25 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
26 unsigned long long int rate;
28 rate = (unsigned long long int)parent_rate * fix->mult;
29 do_div(rate, fix->div);
30 return (unsigned long)rate;
33 static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
36 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
38 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
39 unsigned long best_parent;
41 best_parent = (rate / fix->mult) * fix->div;
42 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
45 return (*prate / fix->div) * fix->mult;
48 static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
49 unsigned long parent_rate)
52 * We must report success but we can do so unconditionally because
53 * clk_factor_round_rate returns values that ensure this call is a
60 const struct clk_ops clk_fixed_factor_ops = {
61 .round_rate = clk_factor_round_rate,
62 .set_rate = clk_factor_set_rate,
63 .recalc_rate = clk_factor_recalc_rate,
65 EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
67 static void devm_clk_hw_register_fixed_factor_release(struct device *dev, void *res)
69 struct clk_fixed_factor *fix = res;
72 * We can not use clk_hw_unregister_fixed_factor, since it will kfree()
73 * the hw, resulting in double free. Just unregister the hw and let
74 * devres code kfree() it.
76 clk_hw_unregister(&fix->hw);
79 static struct clk_hw *
80 __clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
81 const char *name, const char *parent_name, int index,
82 unsigned long flags, unsigned int mult, unsigned int div,
85 struct clk_fixed_factor *fix;
86 struct clk_init_data init = { };
87 struct clk_parent_data pdata = { .index = index };
91 /* You can't use devm without a dev */
93 return ERR_PTR(-EINVAL);
96 fix = devres_alloc(devm_clk_hw_register_fixed_factor_release,
97 sizeof(*fix), GFP_KERNEL);
99 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
101 return ERR_PTR(-ENOMEM);
103 /* struct clk_fixed_factor assignments */
106 fix->hw.init = &init;
109 init.ops = &clk_fixed_factor_ops;
112 init.parent_names = &parent_name;
114 init.parent_data = &pdata;
115 init.num_parents = 1;
119 ret = clk_hw_register(dev, hw);
121 ret = of_clk_hw_register(np, hw);
129 devres_add(dev, fix);
135 * devm_clk_hw_register_fixed_factor_index - Register a fixed factor clock with
136 * parent from DT index
137 * @dev: device that is registering this clock
138 * @name: name of this clock
139 * @index: index of phandle in @dev 'clocks' property
140 * @flags: fixed factor flags
144 * Return: Pointer to fixed factor clk_hw structure that was registered or
147 struct clk_hw *devm_clk_hw_register_fixed_factor_index(struct device *dev,
148 const char *name, unsigned int index, unsigned long flags,
149 unsigned int mult, unsigned int div)
151 return __clk_hw_register_fixed_factor(dev, NULL, name, NULL, index,
152 flags, mult, div, true);
154 EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor_index);
156 struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
157 const char *name, const char *parent_name, unsigned long flags,
158 unsigned int mult, unsigned int div)
160 return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
161 flags, mult, div, false);
163 EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
165 struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
166 const char *parent_name, unsigned long flags,
167 unsigned int mult, unsigned int div)
171 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
177 EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
179 void clk_unregister_fixed_factor(struct clk *clk)
183 hw = __clk_get_hw(clk);
188 kfree(to_clk_fixed_factor(hw));
190 EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
192 void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
194 struct clk_fixed_factor *fix;
196 fix = to_clk_fixed_factor(hw);
198 clk_hw_unregister(hw);
201 EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
203 struct clk_hw *devm_clk_hw_register_fixed_factor(struct device *dev,
204 const char *name, const char *parent_name, unsigned long flags,
205 unsigned int mult, unsigned int div)
207 return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
208 flags, mult, div, true);
210 EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor);
213 static const struct of_device_id set_rate_parent_matches[] = {
214 { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
218 static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
221 const char *clk_name = node->name;
222 unsigned long flags = 0;
226 if (of_property_read_u32(node, "clock-div", &div)) {
227 pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
229 return ERR_PTR(-EIO);
232 if (of_property_read_u32(node, "clock-mult", &mult)) {
233 pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
235 return ERR_PTR(-EIO);
238 of_property_read_string(node, "clock-output-names", &clk_name);
240 if (of_match_node(set_rate_parent_matches, node))
241 flags |= CLK_SET_RATE_PARENT;
243 hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
244 flags, mult, div, false);
247 * Clear OF_POPULATED flag so that clock registration can be
248 * attempted again from probe function.
250 of_node_clear_flag(node, OF_POPULATED);
254 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
256 clk_hw_unregister_fixed_factor(hw);
264 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
265 * @node: device node for the clock
267 void __init of_fixed_factor_clk_setup(struct device_node *node)
269 _of_fixed_factor_clk_setup(node);
271 CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
272 of_fixed_factor_clk_setup);
274 static int of_fixed_factor_clk_remove(struct platform_device *pdev)
276 struct clk_hw *clk = platform_get_drvdata(pdev);
278 of_clk_del_provider(pdev->dev.of_node);
279 clk_hw_unregister_fixed_factor(clk);
284 static int of_fixed_factor_clk_probe(struct platform_device *pdev)
289 * This function is not executed when of_fixed_factor_clk_setup
292 clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
296 platform_set_drvdata(pdev, clk);
301 static const struct of_device_id of_fixed_factor_clk_ids[] = {
302 { .compatible = "fixed-factor-clock" },
305 MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
307 static struct platform_driver of_fixed_factor_clk_driver = {
309 .name = "of_fixed_factor_clk",
310 .of_match_table = of_fixed_factor_clk_ids,
312 .probe = of_fixed_factor_clk_probe,
313 .remove = of_fixed_factor_clk_remove,
315 builtin_platform_driver(of_fixed_factor_clk_driver);