1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
10 #include <clk-uclass.h>
11 #include <dm/device.h>
12 #include <dm/devres.h>
13 #include <linux/clk-provider.h>
15 #include <linux/err.h>
19 #define UBOOT_DM_CLK_COMPOSITE "clk_composite"
21 static u8 clk_composite_get_parent(struct clk *clk)
23 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
24 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
25 struct clk *mux = composite->mux;
28 return clk_mux_get_parent(mux);
33 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
35 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
36 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
37 const struct clk_ops *mux_ops = composite->mux_ops;
38 struct clk *mux = composite->mux;
41 return mux_ops->set_parent(mux, parent);
46 static unsigned long clk_composite_recalc_rate(struct clk *clk)
48 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
49 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
50 const struct clk_ops *rate_ops = composite->rate_ops;
51 struct clk *rate = composite->rate;
54 return rate_ops->get_rate(rate);
56 return clk_get_parent_rate(clk);
59 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
61 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
62 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
63 const struct clk_ops *rate_ops = composite->rate_ops;
64 struct clk *clk_rate = composite->rate;
67 return rate_ops->set_rate(clk_rate, rate);
69 return clk_get_rate(clk);
72 static int clk_composite_enable(struct clk *clk)
74 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
75 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
76 const struct clk_ops *gate_ops = composite->gate_ops;
77 struct clk *gate = composite->gate;
80 return gate_ops->enable(gate);
85 static int clk_composite_disable(struct clk *clk)
87 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
88 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
89 const struct clk_ops *gate_ops = composite->gate_ops;
90 struct clk *gate = composite->gate;
93 return gate_ops->disable(gate);
98 struct clk *clk_register_composite(struct device *dev, const char *name,
99 const char * const *parent_names,
100 int num_parents, struct clk *mux,
101 const struct clk_ops *mux_ops,
103 const struct clk_ops *rate_ops,
105 const struct clk_ops *gate_ops,
109 struct clk_composite *composite;
112 if (!num_parents || (num_parents != 1 && !mux))
113 return ERR_PTR(-EINVAL);
115 composite = kzalloc(sizeof(*composite), GFP_KERNEL);
117 return ERR_PTR(-ENOMEM);
119 if (mux && mux_ops) {
120 composite->mux = mux;
121 composite->mux_ops = mux_ops;
122 mux->data = (ulong)composite;
125 if (rate && rate_ops) {
126 if (!rate_ops->get_rate) {
127 clk = ERR_PTR(-EINVAL);
131 composite->rate = rate;
132 composite->rate_ops = rate_ops;
133 rate->data = (ulong)composite;
136 if (gate && gate_ops) {
137 if (!gate_ops->enable || !gate_ops->disable) {
138 clk = ERR_PTR(-EINVAL);
142 composite->gate = gate;
143 composite->gate_ops = gate_ops;
144 gate->data = (ulong)composite;
147 clk = &composite->clk;
148 ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
149 parent_names[clk_composite_get_parent(clk)]);
156 composite->mux->dev = clk->dev;
158 composite->rate->dev = clk->dev;
160 composite->gate->dev = clk->dev;
169 static const struct clk_ops clk_composite_ops = {
170 .set_parent = clk_composite_set_parent,
171 .get_rate = clk_composite_recalc_rate,
172 .set_rate = clk_composite_set_rate,
173 .enable = clk_composite_enable,
174 .disable = clk_composite_disable,
177 U_BOOT_DRIVER(clk_composite) = {
178 .name = UBOOT_DM_CLK_COMPOSITE,
180 .ops = &clk_composite_ops,
181 .flags = DM_FLAG_PRE_RELOC,