Merge tag 'v5.15.57' into rpi-5.15.y
[platform/kernel/linux-rpi.git] / drivers / clk / bcm / clk-raspberrypi.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Raspberry Pi driver for firmware controlled clocks
4  *
5  * Even though clk-bcm2835 provides an interface to the hardware registers for
6  * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
7  * We're not allowed to change it directly as we might race with the
8  * over-temperature and under-voltage protections provided by the firmware.
9  *
10  * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11  */
12
13 #include <linux/clkdev.h>
14 #include <linux/clk-provider.h>
15 #include <linux/io.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18
19 #include <soc/bcm2835/raspberrypi-firmware.h>
20
21 enum rpi_firmware_clk_id {
22         RPI_FIRMWARE_EMMC_CLK_ID = 1,
23         RPI_FIRMWARE_UART_CLK_ID,
24         RPI_FIRMWARE_ARM_CLK_ID,
25         RPI_FIRMWARE_CORE_CLK_ID,
26         RPI_FIRMWARE_V3D_CLK_ID,
27         RPI_FIRMWARE_H264_CLK_ID,
28         RPI_FIRMWARE_ISP_CLK_ID,
29         RPI_FIRMWARE_SDRAM_CLK_ID,
30         RPI_FIRMWARE_PIXEL_CLK_ID,
31         RPI_FIRMWARE_PWM_CLK_ID,
32         RPI_FIRMWARE_HEVC_CLK_ID,
33         RPI_FIRMWARE_EMMC2_CLK_ID,
34         RPI_FIRMWARE_M2MC_CLK_ID,
35         RPI_FIRMWARE_PIXEL_BVB_CLK_ID,
36         RPI_FIRMWARE_VEC_CLK_ID,
37         RPI_FIRMWARE_NUM_CLK_ID,
38 };
39
40 static char *rpi_firmware_clk_names[] = {
41         [RPI_FIRMWARE_EMMC_CLK_ID]      = "emmc",
42         [RPI_FIRMWARE_UART_CLK_ID]      = "uart",
43         [RPI_FIRMWARE_ARM_CLK_ID]       = "arm",
44         [RPI_FIRMWARE_CORE_CLK_ID]      = "core",
45         [RPI_FIRMWARE_V3D_CLK_ID]       = "v3d",
46         [RPI_FIRMWARE_H264_CLK_ID]      = "h264",
47         [RPI_FIRMWARE_ISP_CLK_ID]       = "isp",
48         [RPI_FIRMWARE_SDRAM_CLK_ID]     = "sdram",
49         [RPI_FIRMWARE_PIXEL_CLK_ID]     = "pixel",
50         [RPI_FIRMWARE_PWM_CLK_ID]       = "pwm",
51         [RPI_FIRMWARE_HEVC_CLK_ID]      = "hevc",
52         [RPI_FIRMWARE_EMMC2_CLK_ID]     = "emmc2",
53         [RPI_FIRMWARE_M2MC_CLK_ID]      = "m2mc",
54         [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
55         [RPI_FIRMWARE_VEC_CLK_ID]       = "vec",
56 };
57
58 #define RPI_FIRMWARE_STATE_ENABLE_BIT   BIT(0)
59 #define RPI_FIRMWARE_STATE_WAIT_BIT     BIT(1)
60
61 struct raspberrypi_clk_variant;
62
63 struct raspberrypi_clk {
64         struct device *dev;
65         struct rpi_firmware *firmware;
66         struct platform_device *cpufreq;
67 };
68
69 struct raspberrypi_clk_data {
70         struct clk_hw hw;
71
72         unsigned int id;
73         struct raspberrypi_clk_variant *variant;
74
75         struct raspberrypi_clk *rpi;
76 };
77
78 struct raspberrypi_clk_variant {
79         bool            export;
80         char            *clkdev;
81         unsigned long   min_rate;
82         bool            minimize;
83 };
84
85 static struct raspberrypi_clk_variant
86 raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
87         [RPI_FIRMWARE_ARM_CLK_ID] = {
88                 .export = true,
89                 .clkdev = "cpu0",
90         },
91         [RPI_FIRMWARE_CORE_CLK_ID] = {
92                 .export = true,
93
94                 /*
95                  * The clock is shared between the HVS and the CSI
96                  * controllers, on the BCM2711 and will change depending
97                  * on the pixels composited on the HVS and the capture
98                  * resolution on Unicam.
99                  *
100                  * Since the rate can get quite large, and we need to
101                  * coordinate between both driver instances, let's
102                  * always use the minimum the drivers will let us.
103                  */
104                 .minimize = true,
105         },
106         [RPI_FIRMWARE_M2MC_CLK_ID] = {
107                 .export = true,
108
109                 /*
110                  * If we boot without any cable connected to any of the
111                  * HDMI connector, the firmware will skip the HSM
112                  * initialization and leave it with a rate of 0,
113                  * resulting in a bus lockup when we're accessing the
114                  * registers even if it's enabled.
115                  *
116                  * Let's put a sensible default so that we don't end up
117                  * in this situation.
118                  */
119                 .min_rate = 120000000,
120
121                 /*
122                  * The clock is shared between the two HDMI controllers
123                  * on the BCM2711 and will change depending on the
124                  * resolution output on each. Since the rate can get
125                  * quite large, and we need to coordinate between both
126                  * driver instances, let's always use the minimum the
127                  * drivers will let us.
128                  */
129                 .minimize = true,
130         },
131         [RPI_FIRMWARE_V3D_CLK_ID] = {
132                 .export = true,
133                 .minimize = true,
134         },
135         [RPI_FIRMWARE_HEVC_CLK_ID] = {
136                 .export = true,
137                 .minimize = true,
138         },
139         [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
140                 .export = true,
141                 .minimize = true,
142         },
143         [RPI_FIRMWARE_VEC_CLK_ID] = {
144                 .export = true,
145                 .minimize = true,
146         },
147         [RPI_FIRMWARE_PIXEL_CLK_ID] = {
148                 .export = true,
149                 .minimize = true,
150         },
151 };
152
153 /*
154  * Structure of the message passed to Raspberry Pi's firmware in order to
155  * change clock rates. The 'disable_turbo' option is only available to the ARM
156  * clock (pllb) which we enable by default as turbo mode will alter multiple
157  * clocks at once.
158  *
159  * Even though we're able to access the clock registers directly we're bound to
160  * use the firmware interface as the firmware ultimately takes care of
161  * mitigating overheating/undervoltage situations and we would be changing
162  * frequencies behind his back.
163  *
164  * For more information on the firmware interface check:
165  * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
166  */
167 struct raspberrypi_firmware_prop {
168         __le32 id;
169         __le32 val;
170         __le32 disable_turbo;
171 } __packed;
172
173 static int raspberrypi_clock_property(struct rpi_firmware *firmware,
174                                       const struct raspberrypi_clk_data *data,
175                                       u32 tag, u32 *val)
176 {
177         struct raspberrypi_firmware_prop msg = {
178                 .id = cpu_to_le32(data->id),
179                 .val = cpu_to_le32(*val),
180                 .disable_turbo = cpu_to_le32(0),
181         };
182         int ret;
183
184         ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
185         if (ret)
186                 return ret;
187
188         *val = le32_to_cpu(msg.val);
189
190         return 0;
191 }
192
193 static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
194 {
195         struct raspberrypi_clk_data *data =
196                 container_of(hw, struct raspberrypi_clk_data, hw);
197         struct raspberrypi_clk *rpi = data->rpi;
198         u32 val = 0;
199         int ret;
200
201         ret = raspberrypi_clock_property(rpi->firmware, data,
202                                          RPI_FIRMWARE_GET_CLOCK_STATE, &val);
203         if (ret)
204                 return 0;
205
206         return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
207 }
208
209
210 static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
211                                              unsigned long parent_rate)
212 {
213         struct raspberrypi_clk_data *data =
214                 container_of(hw, struct raspberrypi_clk_data, hw);
215         struct raspberrypi_clk *rpi = data->rpi;
216         u32 val = 0;
217         int ret;
218
219         ret = raspberrypi_clock_property(rpi->firmware, data,
220                                          RPI_FIRMWARE_GET_CLOCK_RATE, &val);
221         if (ret)
222                 return ret;
223
224         return val;
225 }
226
227 static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
228                                    unsigned long parent_rate)
229 {
230         struct raspberrypi_clk_data *data =
231                 container_of(hw, struct raspberrypi_clk_data, hw);
232         struct raspberrypi_clk *rpi = data->rpi;
233         u32 _rate = rate;
234         int ret;
235
236         ret = raspberrypi_clock_property(rpi->firmware, data,
237                                          RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
238         if (ret)
239                 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d",
240                                     clk_hw_get_name(hw), ret);
241
242         return ret;
243 }
244
245 static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
246                                               struct clk_rate_request *req)
247 {
248         struct raspberrypi_clk_data *data =
249                 container_of(hw, struct raspberrypi_clk_data, hw);
250         struct raspberrypi_clk_variant *variant = data->variant;
251
252         /*
253          * The firmware will do the rounding but that isn't part of
254          * the interface with the firmware, so we just do our best
255          * here.
256          */
257
258         req->rate = clamp(req->rate, req->min_rate, req->max_rate);
259
260         /*
261          * We want to aggressively reduce the clock rate here, so let's
262          * just ignore the requested rate and return the bare minimum
263          * rate we can get away with.
264          */
265         if (variant->minimize && req->min_rate > 0)
266                 req->rate = req->min_rate;
267
268         return 0;
269 }
270
271 static const struct clk_ops raspberrypi_firmware_clk_ops = {
272         .is_prepared    = raspberrypi_fw_is_prepared,
273         .recalc_rate    = raspberrypi_fw_get_rate,
274         .determine_rate = raspberrypi_fw_dumb_determine_rate,
275         .set_rate       = raspberrypi_fw_set_rate,
276 };
277
278 static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
279                                                unsigned int parent,
280                                                unsigned int id,
281                                                struct raspberrypi_clk_variant *variant)
282 {
283         struct raspberrypi_clk_data *data;
284         struct clk_init_data init = {};
285         u32 min_rate, max_rate;
286         int ret;
287
288         data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
289         if (!data)
290                 return ERR_PTR(-ENOMEM);
291         data->rpi = rpi;
292         data->id = id;
293         data->variant = variant;
294
295         init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
296                                    "fw-clk-%s",
297                                    rpi_firmware_clk_names[id]);
298         init.ops = &raspberrypi_firmware_clk_ops;
299         init.flags = CLK_GET_RATE_NOCACHE;
300
301         data->hw.init = &init;
302
303         ret = raspberrypi_clock_property(rpi->firmware, data,
304                                          RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
305                                          &min_rate);
306         if (ret) {
307                 dev_err(rpi->dev, "Failed to get clock %d min freq: %d",
308                         id, ret);
309                 return ERR_PTR(ret);
310         }
311
312         ret = raspberrypi_clock_property(rpi->firmware, data,
313                                          RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
314                                          &max_rate);
315         if (ret) {
316                 dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
317                         id, ret);
318                 return ERR_PTR(ret);
319         }
320
321         ret = devm_clk_hw_register(rpi->dev, &data->hw);
322         if (ret)
323                 return ERR_PTR(ret);
324
325         clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
326
327         if (variant->clkdev) {
328                 ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
329                                                   NULL, variant->clkdev);
330                 if (ret) {
331                         dev_err(rpi->dev, "Failed to initialize clkdev\n");
332                         return ERR_PTR(ret);
333                 }
334         }
335
336         if (variant->min_rate) {
337                 unsigned long rate;
338
339                 clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate);
340
341                 rate = raspberrypi_fw_get_rate(&data->hw, 0);
342                 if (rate < variant->min_rate) {
343                         ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0);
344                         if (ret)
345                                 return ERR_PTR(ret);
346                 }
347         }
348
349         return &data->hw;
350 }
351
352 struct rpi_firmware_get_clocks_response {
353         u32 parent;
354         u32 id;
355 };
356
357 static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
358                                        struct clk_hw_onecell_data *data)
359 {
360         struct rpi_firmware_get_clocks_response *clks;
361         int ret;
362
363         clks = devm_kcalloc(rpi->dev,
364                             sizeof(*clks), RPI_FIRMWARE_NUM_CLK_ID,
365                             GFP_KERNEL);
366         if (!clks)
367                 return -ENOMEM;
368
369         ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
370                                     clks,
371                                     sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
372         if (ret)
373                 return ret;
374
375         while (clks->id) {
376                 struct raspberrypi_clk_variant *variant;
377
378                 if (clks->id > RPI_FIRMWARE_NUM_CLK_ID) {
379                         dev_err(rpi->dev, "Unknown clock id: %u", clks->id);
380                         return -EINVAL;
381                 }
382
383                 variant = &raspberrypi_clk_variants[clks->id];
384                 if (variant->export) {
385                         struct clk_hw *hw;
386
387                         hw = raspberrypi_clk_register(rpi, clks->parent,
388                                                       clks->id, variant);
389                         if (IS_ERR(hw))
390                                 return PTR_ERR(hw);
391
392                         data->hws[clks->id] = hw;
393                         data->num = clks->id + 1;
394                 }
395
396                 clks++;
397         }
398
399         return 0;
400 }
401
402 static int raspberrypi_clk_probe(struct platform_device *pdev)
403 {
404         struct clk_hw_onecell_data *clk_data;
405         struct device_node *firmware_node;
406         struct device *dev = &pdev->dev;
407         struct rpi_firmware *firmware;
408         struct raspberrypi_clk *rpi;
409         int ret;
410
411         /*
412          * We can be probed either through the an old-fashioned
413          * platform device registration or through a DT node that is a
414          * child of the firmware node. Handle both cases.
415          */
416         if (dev->of_node)
417                 firmware_node = of_get_parent(dev->of_node);
418         else
419                 firmware_node = of_find_compatible_node(NULL, NULL,
420                                                         "raspberrypi,bcm2835-firmware");
421         if (!firmware_node) {
422                 dev_err(dev, "Missing firmware node\n");
423                 return -ENOENT;
424         }
425
426         firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
427         of_node_put(firmware_node);
428         if (!firmware)
429                 return -EPROBE_DEFER;
430
431         rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
432         if (!rpi)
433                 return -ENOMEM;
434
435         rpi->dev = dev;
436         rpi->firmware = firmware;
437         platform_set_drvdata(pdev, rpi);
438
439         clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
440                                                  RPI_FIRMWARE_NUM_CLK_ID),
441                                 GFP_KERNEL);
442         if (!clk_data)
443                 return -ENOMEM;
444
445         ret = raspberrypi_discover_clocks(rpi, clk_data);
446         if (ret)
447                 return ret;
448
449         ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
450                                           clk_data);
451         if (ret)
452                 return ret;
453
454         rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
455                                                      -1, NULL, 0);
456
457         return 0;
458 }
459
460 static int raspberrypi_clk_remove(struct platform_device *pdev)
461 {
462         struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
463
464         platform_device_unregister(rpi->cpufreq);
465
466         return 0;
467 }
468
469 static const struct of_device_id raspberrypi_clk_match[] = {
470         { .compatible = "raspberrypi,firmware-clocks" },
471         { },
472 };
473 MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
474
475 static struct platform_driver raspberrypi_clk_driver = {
476         .driver = {
477                 .name = "raspberrypi-clk",
478                 .of_match_table = raspberrypi_clk_match,
479         },
480         .probe          = raspberrypi_clk_probe,
481         .remove         = raspberrypi_clk_remove,
482 };
483 module_platform_driver(raspberrypi_clk_driver);
484
485 MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
486 MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
487 MODULE_LICENSE("GPL");
488 MODULE_ALIAS("platform:raspberrypi-clk");