drivers/clk/bcm/clk-raspberrypi.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Raspberry Pi driver for firmware controlled clocks
   4  *
   5  * Even though clk-bcm2835 provides an interface to the hardware registers for
   6  * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
   7  * We're not allowed to change it directly as we might race with the
   8  * over-temperature and under-voltage protections provided by the firmware.
   9  *
  10  * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11  */
  12
  13 #include <linux/clkdev.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/io.h>
  16 #include <linux/module.h>
  17 #include <linux/platform_device.h>
  18
  19 #include <soc/bcm2835/raspberrypi-firmware.h>
  20
  21 #define RPI_FIRMWARE_ARM_CLK_ID         0x00000003
  22
  23 #define RPI_FIRMWARE_STATE_ENABLE_BIT   BIT(0)
  24 #define RPI_FIRMWARE_STATE_WAIT_BIT     BIT(1)
  25
  26 /*
  27  * Even though the firmware interface alters 'pllb' the frequencies are
  28  * provided as per 'pllb_arm'. We need to scale before passing them trough.
  29  */
  30 #define RPI_FIRMWARE_PLLB_ARM_DIV_RATE  2
  31
  32 #define A2W_PLL_FRAC_BITS               20
  33
  34 #define NUM_FW_CLKS                     16
  35
  36 struct raspberrypi_clk {
  37         struct device *dev;
  38         struct rpi_firmware *firmware;
  39         struct platform_device *cpufreq;
  40 };
  41
  42 struct raspberrypi_clk_data {
  43         struct clk_hw hw;
  44         unsigned id;
  45
  46         unsigned long min_rate;
  47         unsigned long max_rate;
  48
  49         struct raspberrypi_clk *rpi;
  50 };
  51
  52 /*
  53  * Structure of the message passed to Raspberry Pi's firmware in order to
  54  * change clock rates. The 'disable_turbo' option is only available to the ARM
  55  * clock (pllb) which we enable by default as turbo mode will alter multiple
  56  * clocks at once.
  57  *
  58  * Even though we're able to access the clock registers directly we're bound to
  59  * use the firmware interface as the firmware ultimately takes care of
  60  * mitigating overheating/undervoltage situations and we would be changing
  61  * frequencies behind his back.
  62  *
  63  * For more information on the firmware interface check:
  64  * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
  65  */
  66 struct raspberrypi_firmware_prop {
  67         __le32 id;
  68         __le32 val;
  69         __le32 disable_turbo;
  70 } __packed;
  71
  72 static int raspberrypi_clock_property(struct rpi_firmware *firmware,
  73                                       const struct raspberrypi_clk_data *data,
  74                                       u32 tag, u32 *val)
  75 {
  76         struct raspberrypi_firmware_prop msg = {
  77                 .id = cpu_to_le32(data->id),
  78                 .val = cpu_to_le32(*val),
  79                 .disable_turbo = cpu_to_le32(1),
  80         };
  81         int ret;
  82
  83         ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
  84         if (ret)
  85                 return ret;
  86
  87         *val = le32_to_cpu(msg.val);
  88
  89         return 0;
  90 }
  91
  92 static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
  93 {
  94         struct raspberrypi_clk_data *data =
  95                 container_of(hw, struct raspberrypi_clk_data, hw);
  96         struct raspberrypi_clk *rpi = data->rpi;
  97         u32 val = 0;
  98         int ret;
  99
 100         ret = raspberrypi_clock_property(rpi->firmware, data,
 101                                          RPI_FIRMWARE_GET_CLOCK_STATE, &val);
 102         if (ret)
 103                 return 0;
 104
 105         return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
 106 }
 107
 108
 109 static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
 110                                              unsigned long parent_rate)
 111 {
 112         struct raspberrypi_clk_data *data =
 113                 container_of(hw, struct raspberrypi_clk_data, hw);
 114         struct raspberrypi_clk *rpi = data->rpi;
 115         u32 val = 0;
 116         int ret;
 117
 118         ret = raspberrypi_clock_property(rpi->firmware, data,
 119                                          RPI_FIRMWARE_GET_CLOCK_RATE, &val);
 120         if (ret)
 121                 return ret;
 122
 123         return val;
 124 }
 125
 126 static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw,
 127                                                  unsigned long parent_rate)
 128 {
 129         return raspberrypi_fw_get_rate(hw, parent_rate) *
 130                 RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
 131 }
 132
 133 static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
 134                                    unsigned long parent_rate)
 135 {
 136         struct raspberrypi_clk_data *data =
 137                 container_of(hw, struct raspberrypi_clk_data, hw);
 138         struct raspberrypi_clk *rpi = data->rpi;
 139         u32 _rate = rate;
 140         int ret;
 141
 142         ret = raspberrypi_clock_property(rpi->firmware, data,
 143                                          RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
 144         if (ret)
 145                 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d",
 146                                     clk_hw_get_name(hw), ret);
 147
 148         return ret;
 149 }
 150
 151 static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 152                                        unsigned long parent_rate)
 153 {
 154         u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
 155
 156         return raspberrypi_fw_set_rate(hw, new_rate, parent_rate);
 157 }
 158
 159 /*
 160  * Sadly there is no firmware rate rounding interface. We borrowed it from
 161  * clk-bcm2835.
 162  */
 163 static int raspberrypi_pll_determine_rate(struct clk_hw *hw,
 164                                           struct clk_rate_request *req)
 165 {
 166         struct raspberrypi_clk_data *data =
 167                 container_of(hw, struct raspberrypi_clk_data, hw);
 168         u64 div, final_rate;
 169         u32 ndiv, fdiv;
 170
 171         /* We can't use req->rate directly as it would overflow */
 172         final_rate = clamp(req->rate, data->min_rate, data->max_rate);
 173
 174         div = (u64)final_rate << A2W_PLL_FRAC_BITS;
 175         do_div(div, req->best_parent_rate);
 176
 177         ndiv = div >> A2W_PLL_FRAC_BITS;
 178         fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1);
 179
 180         final_rate = ((u64)req->best_parent_rate *
 181                                         ((ndiv << A2W_PLL_FRAC_BITS) + fdiv));
 182
 183         req->rate = final_rate >> A2W_PLL_FRAC_BITS;
 184
 185         return 0;
 186 }
 187
 188 static const struct clk_ops raspberrypi_firmware_pll_clk_ops = {
 189         .is_prepared = raspberrypi_fw_is_prepared,
 190         .recalc_rate = raspberrypi_fw_pll_get_rate,
 191         .set_rate = raspberrypi_fw_pll_set_rate,
 192         .determine_rate = raspberrypi_pll_determine_rate,
 193 };
 194
 195 static struct clk_hw *raspberrypi_register_pllb(struct raspberrypi_clk *rpi)
 196 {
 197         struct raspberrypi_clk_data *data;
 198         struct clk_init_data init = {};
 199         u32 min_rate = 0, max_rate = 0;
 200         int ret;
 201
 202         data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
 203         if (!data)
 204                 return ERR_PTR(-ENOMEM);
 205         data->rpi = rpi;
 206         data->id = RPI_FIRMWARE_ARM_CLK_ID;
 207
 208         /* All of the PLLs derive from the external oscillator. */
 209         init.parent_names = (const char *[]){ "osc" };
 210         init.num_parents = 1;
 211         init.name = "pllb";
 212         init.ops = &raspberrypi_firmware_pll_clk_ops;
 213         init.flags = CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED;
 214
 215         /* Get min & max rates set by the firmware */
 216         ret = raspberrypi_clock_property(rpi->firmware, data,
 217                                          RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
 218                                          &min_rate);
 219         if (ret) {
 220                 dev_err(rpi->dev, "Failed to get %s min freq: %d\n",
 221                         init.name, ret);
 222                 return ERR_PTR(ret);
 223         }
 224
 225         ret = raspberrypi_clock_property(rpi->firmware, data,
 226                                          RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
 227                                          &max_rate);
 228         if (ret) {
 229                 dev_err(rpi->dev, "Failed to get %s max freq: %d\n",
 230                         init.name, ret);
 231                 return ERR_PTR(ret);
 232         }
 233
 234         if (!min_rate || !max_rate) {
 235                 dev_err(rpi->dev, "Unexpected frequency range: min %u, max %u\n",
 236                         min_rate, max_rate);
 237                 return ERR_PTR(-EINVAL);
 238         }
 239
 240         dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n",
 241                  min_rate, max_rate);
 242
 243         data->min_rate = min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
 244         data->max_rate = max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
 245
 246         data->hw.init = &init;
 247
 248         ret = devm_clk_hw_register(rpi->dev, &data->hw);
 249         if (ret)
 250                 return ERR_PTR(ret);
 251
 252         return &data->hw;
 253 }
 254
 255 static struct clk_fixed_factor raspberrypi_clk_pllb_arm = {
 256         .mult = 1,
 257         .div = 2,
 258         .hw.init = &(struct clk_init_data) {
 259                 .name           = "pllb_arm",
 260                 .parent_names   = (const char *[]){ "pllb" },
 261                 .num_parents    = 1,
 262                 .ops            = &clk_fixed_factor_ops,
 263                 .flags          = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
 264         },
 265 };
 266
 267 static struct clk_hw *raspberrypi_register_pllb_arm(struct raspberrypi_clk *rpi)
 268 {
 269         int ret;
 270
 271         ret = devm_clk_hw_register(rpi->dev, &raspberrypi_clk_pllb_arm.hw);
 272         if (ret) {
 273                 dev_err(rpi->dev, "Failed to initialize pllb_arm\n");
 274                 return ERR_PTR(ret);
 275         }
 276
 277         ret = devm_clk_hw_register_clkdev(rpi->dev,
 278                                           &raspberrypi_clk_pllb_arm.hw,
 279                                           NULL, "cpu0");
 280         if (ret) {
 281                 dev_err(rpi->dev, "Failed to initialize clkdev\n");
 282                 return ERR_PTR(ret);
 283         }
 284
 285         return &raspberrypi_clk_pllb_arm.hw;
 286 }
 287
 288 static long raspberrypi_fw_dumb_round_rate(struct clk_hw *hw,
 289                                            unsigned long rate,
 290                                            unsigned long *parent_rate)
 291 {
 292         /*
 293          * The firmware will do the rounding but that isn't part of
 294          * the interface with the firmware, so we just do our best
 295          * here.
 296          */
 297         return rate;
 298 }
 299
 300 static const struct clk_ops raspberrypi_firmware_clk_ops = {
 301         .is_prepared    = raspberrypi_fw_is_prepared,
 302         .recalc_rate    = raspberrypi_fw_get_rate,
 303         .round_rate     = raspberrypi_fw_dumb_round_rate,
 304         .set_rate       = raspberrypi_fw_set_rate,
 305 };
 306
 307 static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
 308                                                unsigned int parent,
 309                                                unsigned int id)
 310 {
 311         struct raspberrypi_clk_data *data;
 312         struct clk_init_data init = {};
 313         int ret;
 314
 315         if (id == RPI_FIRMWARE_ARM_CLK_ID) {
 316                 struct clk_hw *hw;
 317
 318                 hw = raspberrypi_register_pllb(rpi);
 319                 if (IS_ERR(hw)) {
 320                         dev_err(rpi->dev, "Failed to initialize pllb, %ld\n",
 321                                 PTR_ERR(hw));
 322                         return hw;
 323                 }
 324
 325                 return raspberrypi_register_pllb_arm(rpi);
 326         }
 327
 328         data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
 329         if (!data)
 330                 return ERR_PTR(-ENOMEM);
 331         data->rpi = rpi;
 332         data->id = id;
 333
 334         init.name = devm_kasprintf(rpi->dev, GFP_KERNEL, "fw-clk-%u", id);
 335         init.ops = &raspberrypi_firmware_clk_ops;
 336         init.flags = CLK_GET_RATE_NOCACHE;
 337
 338         data->hw.init = &init;
 339
 340         ret = devm_clk_hw_register(rpi->dev, &data->hw);
 341         if (ret)
 342                 return ERR_PTR(ret);
 343
 344         return &data->hw;
 345 }
 346
 347 static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
 348                                        struct clk_hw_onecell_data *data)
 349 {
 350         struct rpi_firmware_get_clocks_response *clks;
 351         int ret;
 352
 353         clks = devm_kcalloc(rpi->dev, sizeof(*clks), NUM_FW_CLKS, GFP_KERNEL);
 354         if (!clks)
 355                 return -ENOMEM;
 356
 357         ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
 358                                     clks, sizeof(*clks) * NUM_FW_CLKS);
 359         if (ret)
 360                 return ret;
 361
 362         while (clks->id) {
 363                 struct clk_hw *hw;
 364
 365                 hw = raspberrypi_clk_register(rpi, clks->parent, clks->id);
 366                 if (IS_ERR(hw))
 367                         return PTR_ERR(hw);
 368
 369                 data->hws[clks->id] = hw;
 370                 data->num = clks->id + 1;
 371                 clks++;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static int raspberrypi_clk_probe(struct platform_device *pdev)
 378 {
 379         struct clk_hw_onecell_data *clk_data;
 380         struct device_node *firmware_node;
 381         struct device *dev = &pdev->dev;
 382         struct rpi_firmware *firmware;
 383         struct raspberrypi_clk *rpi;
 384         int ret;
 385
 386         firmware_node = of_parse_phandle(dev->of_node, "raspberrypi,firmware", 0);
 387         if (!firmware_node) {
 388                 dev_err(dev, "Missing firmware node\n");
 389                 return -ENOENT;
 390         }
 391
 392         firmware = rpi_firmware_get(firmware_node);
 393         if (!firmware)
 394                 return -EPROBE_DEFER;
 395
 396         rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
 397         if (!rpi)
 398                 return -ENOMEM;
 399
 400         rpi->dev = dev;
 401         rpi->firmware = firmware;
 402         platform_set_drvdata(pdev, rpi);
 403
 404         clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, NUM_FW_CLKS),
 405                                 GFP_KERNEL);
 406         if (!clk_data)
 407                 return -ENOMEM;
 408
 409         ret = raspberrypi_discover_clocks(rpi, clk_data);
 410         if (ret)
 411                 return ret;
 412
 413         ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
 414                                           clk_data);
 415         if (ret)
 416                 return ret;
 417
 418         rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
 419                                                      -1, NULL, 0);
 420
 421         return 0;
 422 }
 423
 424 static int raspberrypi_clk_remove(struct platform_device *pdev)
 425 {
 426         struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
 427
 428         platform_device_unregister(rpi->cpufreq);
 429
 430         return 0;
 431 }
 432
 433 static const struct of_device_id raspberrypi_clk_match[] = {
 434         { .compatible = "raspberrypi,firmware-clocks" },
 435         { },
 436 };
 437 MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
 438
 439 static struct platform_driver raspberrypi_clk_driver = {
 440         .driver = {
 441                 .name = "raspberrypi-clk",
 442                 .of_match_table = raspberrypi_clk_match,
 443         },
 444         .probe          = raspberrypi_clk_probe,
 445         .remove         = raspberrypi_clk_remove,
 446 };
 447 module_platform_driver(raspberrypi_clk_driver);
 448
 449 MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
 450 MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
 451 MODULE_LICENSE("GPL");
 452 MODULE_ALIAS("platform:raspberrypi-clk");