drivers/clk/bcm/clk-raspberrypi.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Raspberry Pi driver for firmware controlled clocks
   4  *
   5  * Even though clk-bcm2835 provides an interface to the hardware registers for
   6  * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
   7  * We're not allowed to change it directly as we might race with the
   8  * over-temperature and under-voltage protections provided by the firmware.
   9  *
  10  * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
  11  */
  12
  13 #include <linux/clkdev.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/io.h>
  16 #include <linux/module.h>
  17 #include <linux/platform_device.h>
  18
  19 #include <soc/bcm2835/raspberrypi-firmware.h>
  20
  21 static char *rpi_firmware_clk_names[] = {
  22         [RPI_FIRMWARE_EMMC_CLK_ID]      = "emmc",
  23         [RPI_FIRMWARE_UART_CLK_ID]      = "uart",
  24         [RPI_FIRMWARE_ARM_CLK_ID]       = "arm",
  25         [RPI_FIRMWARE_CORE_CLK_ID]      = "core",
  26         [RPI_FIRMWARE_V3D_CLK_ID]       = "v3d",
  27         [RPI_FIRMWARE_H264_CLK_ID]      = "h264",
  28         [RPI_FIRMWARE_ISP_CLK_ID]       = "isp",
  29         [RPI_FIRMWARE_SDRAM_CLK_ID]     = "sdram",
  30         [RPI_FIRMWARE_PIXEL_CLK_ID]     = "pixel",
  31         [RPI_FIRMWARE_PWM_CLK_ID]       = "pwm",
  32         [RPI_FIRMWARE_HEVC_CLK_ID]      = "hevc",
  33         [RPI_FIRMWARE_EMMC2_CLK_ID]     = "emmc2",
  34         [RPI_FIRMWARE_M2MC_CLK_ID]      = "m2mc",
  35         [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
  36         [RPI_FIRMWARE_VEC_CLK_ID]       = "vec",
  37 };
  38
  39 #define RPI_FIRMWARE_STATE_ENABLE_BIT   BIT(0)
  40 #define RPI_FIRMWARE_STATE_WAIT_BIT     BIT(1)
  41
  42 struct raspberrypi_clk_variant;
  43
  44 struct raspberrypi_clk {
  45         struct device *dev;
  46         struct rpi_firmware *firmware;
  47         struct platform_device *cpufreq;
  48 };
  49
  50 struct raspberrypi_clk_data {
  51         struct clk_hw hw;
  52
  53         unsigned int id;
  54         struct raspberrypi_clk_variant *variant;
  55
  56         struct raspberrypi_clk *rpi;
  57 };
  58
  59 static inline
  60 const struct raspberrypi_clk_data *clk_hw_to_data(const struct clk_hw *hw)
  61 {
  62         return container_of(hw, struct raspberrypi_clk_data, hw);
  63 }
  64
  65 struct raspberrypi_clk_variant {
  66         bool            export;
  67         char            *clkdev;
  68         unsigned long   min_rate;
  69         bool            minimize;
  70 };
  71
  72 static struct raspberrypi_clk_variant
  73 raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
  74         [RPI_FIRMWARE_ARM_CLK_ID] = {
  75                 .export = true,
  76                 .clkdev = "cpu0",
  77         },
  78         [RPI_FIRMWARE_CORE_CLK_ID] = {
  79                 .export = true,
  80
  81                 /*
  82                  * The clock is shared between the HVS and the CSI
  83                  * controllers, on the BCM2711 and will change depending
  84                  * on the pixels composited on the HVS and the capture
  85                  * resolution on Unicam.
  86                  *
  87                  * Since the rate can get quite large, and we need to
  88                  * coordinate between both driver instances, let's
  89                  * always use the minimum the drivers will let us.
  90                  */
  91                 .minimize = true,
  92         },
  93         [RPI_FIRMWARE_M2MC_CLK_ID] = {
  94                 .export = true,
  95
  96                 /*
  97                  * If we boot without any cable connected to any of the
  98                  * HDMI connector, the firmware will skip the HSM
  99                  * initialization and leave it with a rate of 0,
 100                  * resulting in a bus lockup when we're accessing the
 101                  * registers even if it's enabled.
 102                  *
 103                  * Let's put a sensible default so that we don't end up
 104                  * in this situation.
 105                  */
 106                 .min_rate = 120000000,
 107
 108                 /*
 109                  * The clock is shared between the two HDMI controllers
 110                  * on the BCM2711 and will change depending on the
 111                  * resolution output on each. Since the rate can get
 112                  * quite large, and we need to coordinate between both
 113                  * driver instances, let's always use the minimum the
 114                  * drivers will let us.
 115                  */
 116                 .minimize = true,
 117         },
 118         [RPI_FIRMWARE_V3D_CLK_ID] = {
 119                 .export = true,
 120                 .minimize = true,
 121         },
 122         [RPI_FIRMWARE_PIXEL_CLK_ID] = {
 123                 .export = true,
 124                 .minimize = true,
 125         },
 126         [RPI_FIRMWARE_HEVC_CLK_ID] = {
 127                 .export = true,
 128                 .minimize = true,
 129         },
 130         [RPI_FIRMWARE_ISP_CLK_ID] = {
 131                 .export = true,
 132                 .minimize = true,
 133         },
 134         [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
 135                 .export = true,
 136                 .minimize = true,
 137         },
 138         [RPI_FIRMWARE_VEC_CLK_ID] = {
 139                 .export = true,
 140                 .minimize = true,
 141         },
 142 };
 143
 144 /*
 145  * Structure of the message passed to Raspberry Pi's firmware in order to
 146  * change clock rates. The 'disable_turbo' option is only available to the ARM
 147  * clock (pllb) which we enable by default as turbo mode will alter multiple
 148  * clocks at once.
 149  *
 150  * Even though we're able to access the clock registers directly we're bound to
 151  * use the firmware interface as the firmware ultimately takes care of
 152  * mitigating overheating/undervoltage situations and we would be changing
 153  * frequencies behind his back.
 154  *
 155  * For more information on the firmware interface check:
 156  * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
 157  */
 158 struct raspberrypi_firmware_prop {
 159         __le32 id;
 160         __le32 val;
 161         __le32 disable_turbo;
 162 } __packed;
 163
 164 static int raspberrypi_clock_property(struct rpi_firmware *firmware,
 165                                       const struct raspberrypi_clk_data *data,
 166                                       u32 tag, u32 *val)
 167 {
 168         struct raspberrypi_firmware_prop msg = {
 169                 .id = cpu_to_le32(data->id),
 170                 .val = cpu_to_le32(*val),
 171                 .disable_turbo = cpu_to_le32(0),
 172         };
 173         int ret;
 174
 175         ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
 176         if (ret)
 177                 return ret;
 178
 179         *val = le32_to_cpu(msg.val);
 180
 181         return 0;
 182 }
 183
 184 static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
 185 {
 186         const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
 187         struct raspberrypi_clk *rpi = data->rpi;
 188         u32 val = 0;
 189         int ret;
 190
 191         ret = raspberrypi_clock_property(rpi->firmware, data,
 192                                          RPI_FIRMWARE_GET_CLOCK_STATE, &val);
 193         if (ret)
 194                 return 0;
 195
 196         return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
 197 }
 198
 199
 200 static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
 201                                              unsigned long parent_rate)
 202 {
 203         const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
 204         struct raspberrypi_clk *rpi = data->rpi;
 205         u32 val = 0;
 206         int ret;
 207
 208         ret = raspberrypi_clock_property(rpi->firmware, data,
 209                                          RPI_FIRMWARE_GET_CLOCK_RATE, &val);
 210         if (ret)
 211                 return 0;
 212
 213         return val;
 214 }
 215
 216 static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
 217                                    unsigned long parent_rate)
 218 {
 219         const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
 220         struct raspberrypi_clk *rpi = data->rpi;
 221         u32 _rate = rate;
 222         int ret;
 223
 224         ret = raspberrypi_clock_property(rpi->firmware, data,
 225                                          RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
 226         if (ret)
 227                 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
 228                                     clk_hw_get_name(hw), ret);
 229
 230         return ret;
 231 }
 232
 233 static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
 234                                               struct clk_rate_request *req)
 235 {
 236         const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
 237         struct raspberrypi_clk_variant *variant = data->variant;
 238
 239         /*
 240          * The firmware will do the rounding but that isn't part of
 241          * the interface with the firmware, so we just do our best
 242          * here.
 243          */
 244
 245         req->rate = clamp(req->rate, req->min_rate, req->max_rate);
 246
 247         /*
 248          * We want to aggressively reduce the clock rate here, so let's
 249          * just ignore the requested rate and return the bare minimum
 250          * rate we can get away with.
 251          */
 252         if (variant->minimize && req->min_rate > 0)
 253                 req->rate = req->min_rate;
 254
 255         return 0;
 256 }
 257
 258 static const struct clk_ops raspberrypi_firmware_clk_ops = {
 259         .is_prepared    = raspberrypi_fw_is_prepared,
 260         .recalc_rate    = raspberrypi_fw_get_rate,
 261         .determine_rate = raspberrypi_fw_dumb_determine_rate,
 262         .set_rate       = raspberrypi_fw_set_rate,
 263 };
 264
 265 static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
 266                                                unsigned int parent,
 267                                                unsigned int id,
 268                                                struct raspberrypi_clk_variant *variant)
 269 {
 270         struct raspberrypi_clk_data *data;
 271         struct clk_init_data init = {};
 272         u32 min_rate, max_rate;
 273         int ret;
 274
 275         data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
 276         if (!data)
 277                 return ERR_PTR(-ENOMEM);
 278         data->rpi = rpi;
 279         data->id = id;
 280         data->variant = variant;
 281
 282         init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
 283                                    "fw-clk-%s",
 284                                    rpi_firmware_clk_names[id]);
 285         init.ops = &raspberrypi_firmware_clk_ops;
 286         init.flags = CLK_GET_RATE_NOCACHE;
 287
 288         data->hw.init = &init;
 289
 290         ret = raspberrypi_clock_property(rpi->firmware, data,
 291                                          RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
 292                                          &min_rate);
 293         if (ret) {
 294                 dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
 295                         id, ret);
 296                 return ERR_PTR(ret);
 297         }
 298
 299         ret = raspberrypi_clock_property(rpi->firmware, data,
 300                                          RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
 301                                          &max_rate);
 302         if (ret) {
 303                 dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
 304                         id, ret);
 305                 return ERR_PTR(ret);
 306         }
 307
 308         ret = devm_clk_hw_register(rpi->dev, &data->hw);
 309         if (ret)
 310                 return ERR_PTR(ret);
 311
 312         clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
 313
 314         if (variant->clkdev) {
 315                 ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
 316                                                   NULL, variant->clkdev);
 317                 if (ret) {
 318                         dev_err(rpi->dev, "Failed to initialize clkdev\n");
 319                         return ERR_PTR(ret);
 320                 }
 321         }
 322
 323         if (variant->min_rate) {
 324                 unsigned long rate;
 325
 326                 clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate);
 327
 328                 rate = raspberrypi_fw_get_rate(&data->hw, 0);
 329                 if (rate < variant->min_rate) {
 330                         ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0);
 331                         if (ret)
 332                                 return ERR_PTR(ret);
 333                 }
 334         }
 335
 336         return &data->hw;
 337 }
 338
 339 struct rpi_firmware_get_clocks_response {
 340         u32 parent;
 341         u32 id;
 342 };
 343
 344 static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
 345                                        struct clk_hw_onecell_data *data)
 346 {
 347         struct rpi_firmware_get_clocks_response *clks;
 348         int ret;
 349
 350         /*
 351          * The firmware doesn't guarantee that the last element of
 352          * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
 353          * zero element as sentinel.
 354          */
 355         clks = devm_kcalloc(rpi->dev,
 356                             RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks),
 357                             GFP_KERNEL);
 358         if (!clks)
 359                 return -ENOMEM;
 360
 361         ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
 362                                     clks,
 363                                     sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
 364         if (ret)
 365                 return ret;
 366
 367         while (clks->id) {
 368                 struct raspberrypi_clk_variant *variant;
 369
 370                 if (clks->id >= RPI_FIRMWARE_NUM_CLK_ID) {
 371                         dev_err(rpi->dev, "Unknown clock id: %u (max: %u)\n",
 372                                            clks->id, RPI_FIRMWARE_NUM_CLK_ID - 1);
 373                         return -EINVAL;
 374                 }
 375
 376                 variant = &raspberrypi_clk_variants[clks->id];
 377                 if (variant->export) {
 378                         struct clk_hw *hw;
 379
 380                         hw = raspberrypi_clk_register(rpi, clks->parent,
 381                                                       clks->id, variant);
 382                         if (IS_ERR(hw))
 383                                 return PTR_ERR(hw);
 384
 385                         data->hws[clks->id] = hw;
 386                         data->num = clks->id + 1;
 387                 }
 388
 389                 clks++;
 390         }
 391
 392         return 0;
 393 }
 394
 395 static int raspberrypi_clk_probe(struct platform_device *pdev)
 396 {
 397         struct clk_hw_onecell_data *clk_data;
 398         struct device_node *firmware_node;
 399         struct device *dev = &pdev->dev;
 400         struct rpi_firmware *firmware;
 401         struct raspberrypi_clk *rpi;
 402         int ret;
 403
 404         /*
 405          * We can be probed either through the an old-fashioned
 406          * platform device registration or through a DT node that is a
 407          * child of the firmware node. Handle both cases.
 408          */
 409         if (dev->of_node)
 410                 firmware_node = of_get_parent(dev->of_node);
 411         else
 412                 firmware_node = of_find_compatible_node(NULL, NULL,
 413                                                         "raspberrypi,bcm2835-firmware");
 414         if (!firmware_node) {
 415                 dev_err(dev, "Missing firmware node\n");
 416                 return -ENOENT;
 417         }
 418
 419         firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
 420         of_node_put(firmware_node);
 421         if (!firmware)
 422                 return -EPROBE_DEFER;
 423
 424         rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
 425         if (!rpi)
 426                 return -ENOMEM;
 427
 428         rpi->dev = dev;
 429         rpi->firmware = firmware;
 430         platform_set_drvdata(pdev, rpi);
 431
 432         clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
 433                                                  RPI_FIRMWARE_NUM_CLK_ID),
 434                                 GFP_KERNEL);
 435         if (!clk_data)
 436                 return -ENOMEM;
 437
 438         ret = raspberrypi_discover_clocks(rpi, clk_data);
 439         if (ret)
 440                 return ret;
 441
 442         ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
 443                                           clk_data);
 444         if (ret)
 445                 return ret;
 446
 447         rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
 448                                                      -1, NULL, 0);
 449
 450         return 0;
 451 }
 452
 453 static void raspberrypi_clk_remove(struct platform_device *pdev)
 454 {
 455         struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
 456
 457         platform_device_unregister(rpi->cpufreq);
 458 }
 459
 460 static const struct of_device_id raspberrypi_clk_match[] = {
 461         { .compatible = "raspberrypi,firmware-clocks" },
 462         { },
 463 };
 464 MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
 465
 466 static struct platform_driver raspberrypi_clk_driver = {
 467         .driver = {
 468                 .name = "raspberrypi-clk",
 469                 .of_match_table = raspberrypi_clk_match,
 470         },
 471         .probe          = raspberrypi_clk_probe,
 472         .remove_new     = raspberrypi_clk_remove,
 473 };
 474 module_platform_driver(raspberrypi_clk_driver);
 475
 476 MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
 477 MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
 478 MODULE_LICENSE("GPL");
 479 MODULE_ALIAS("platform:raspberrypi-clk");