2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
11 #include <linux/clk-provider.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk/at91_pmc.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/regmap.h>
20 #define SAM9X5_USB_DIV_SHIFT 8
21 #define SAM9X5_USB_MAX_DIV 0xf
23 #define RM9200_USB_DIV_SHIFT 28
24 #define RM9200_USB_DIV_TAB_SIZE 4
26 struct at91sam9x5_clk_usb {
28 struct regmap *regmap;
31 #define to_at91sam9x5_clk_usb(hw) \
32 container_of(hw, struct at91sam9x5_clk_usb, hw)
34 struct at91rm9200_clk_usb {
36 struct regmap *regmap;
40 #define to_at91rm9200_clk_usb(hw) \
41 container_of(hw, struct at91rm9200_clk_usb, hw)
43 static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
44 unsigned long parent_rate)
46 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
50 regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
51 usbdiv = (usbr & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT;
53 return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
56 static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
57 struct clk_rate_request *req)
59 struct clk_hw *parent;
60 long best_rate = -EINVAL;
61 unsigned long tmp_rate;
66 for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
69 parent = clk_hw_get_parent_by_index(hw, i);
73 for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) {
74 unsigned long tmp_parent_rate;
76 tmp_parent_rate = req->rate * div;
77 tmp_parent_rate = clk_hw_round_rate(parent,
79 tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
80 if (tmp_rate < req->rate)
81 tmp_diff = req->rate - tmp_rate;
83 tmp_diff = tmp_rate - req->rate;
85 if (best_diff < 0 || best_diff > tmp_diff) {
88 req->best_parent_rate = tmp_parent_rate;
89 req->best_parent_hw = parent;
92 if (!best_diff || tmp_rate < req->rate)
103 req->rate = best_rate;
107 static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
109 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
114 regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
115 index ? AT91_PMC_USBS : 0);
120 static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
122 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
125 regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
127 return usbr & AT91_PMC_USBS;
130 static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
131 unsigned long parent_rate)
133 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
139 div = DIV_ROUND_CLOSEST(parent_rate, rate);
140 if (div > SAM9X5_USB_MAX_DIV + 1 || !div)
143 regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_OHCIUSBDIV,
144 (div - 1) << SAM9X5_USB_DIV_SHIFT);
149 static const struct clk_ops at91sam9x5_usb_ops = {
150 .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
151 .determine_rate = at91sam9x5_clk_usb_determine_rate,
152 .get_parent = at91sam9x5_clk_usb_get_parent,
153 .set_parent = at91sam9x5_clk_usb_set_parent,
154 .set_rate = at91sam9x5_clk_usb_set_rate,
157 static int at91sam9n12_clk_usb_enable(struct clk_hw *hw)
159 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
161 regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
167 static void at91sam9n12_clk_usb_disable(struct clk_hw *hw)
169 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
171 regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 0);
174 static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw)
176 struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
179 regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
181 return usbr & AT91_PMC_USBS;
184 static const struct clk_ops at91sam9n12_usb_ops = {
185 .enable = at91sam9n12_clk_usb_enable,
186 .disable = at91sam9n12_clk_usb_disable,
187 .is_enabled = at91sam9n12_clk_usb_is_enabled,
188 .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
189 .determine_rate = at91sam9x5_clk_usb_determine_rate,
190 .set_rate = at91sam9x5_clk_usb_set_rate,
193 struct clk_hw * __init
194 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
195 const char **parent_names, u8 num_parents)
197 struct at91sam9x5_clk_usb *usb;
199 struct clk_init_data init;
202 usb = kzalloc(sizeof(*usb), GFP_KERNEL);
204 return ERR_PTR(-ENOMEM);
207 init.ops = &at91sam9x5_usb_ops;
208 init.parent_names = parent_names;
209 init.num_parents = num_parents;
210 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
213 usb->hw.init = &init;
214 usb->regmap = regmap;
217 ret = clk_hw_register(NULL, &usb->hw);
226 struct clk_hw * __init
227 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
228 const char *parent_name)
230 struct at91sam9x5_clk_usb *usb;
232 struct clk_init_data init;
235 usb = kzalloc(sizeof(*usb), GFP_KERNEL);
237 return ERR_PTR(-ENOMEM);
240 init.ops = &at91sam9n12_usb_ops;
241 init.parent_names = &parent_name;
242 init.num_parents = 1;
243 init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
245 usb->hw.init = &init;
246 usb->regmap = regmap;
249 ret = clk_hw_register(NULL, &usb->hw);
258 static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
259 unsigned long parent_rate)
261 struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
265 regmap_read(usb->regmap, AT91_CKGR_PLLBR, &pllbr);
267 usbdiv = (pllbr & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT;
268 if (usb->divisors[usbdiv])
269 return parent_rate / usb->divisors[usbdiv];
274 static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
275 unsigned long *parent_rate)
277 struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
278 struct clk_hw *parent = clk_hw_get_parent(hw);
279 unsigned long bestrate = 0;
281 unsigned long tmprate;
285 for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
286 unsigned long tmp_parent_rate;
288 if (!usb->divisors[i])
291 tmp_parent_rate = rate * usb->divisors[i];
292 tmp_parent_rate = clk_hw_round_rate(parent, tmp_parent_rate);
293 tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]);
295 tmpdiff = rate - tmprate;
297 tmpdiff = tmprate - rate;
299 if (bestdiff < 0 || bestdiff > tmpdiff) {
302 *parent_rate = tmp_parent_rate;
312 static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
313 unsigned long parent_rate)
316 struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
322 div = DIV_ROUND_CLOSEST(parent_rate, rate);
324 for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
325 if (usb->divisors[i] == div) {
326 regmap_update_bits(usb->regmap, AT91_CKGR_PLLBR,
328 i << RM9200_USB_DIV_SHIFT);
337 static const struct clk_ops at91rm9200_usb_ops = {
338 .recalc_rate = at91rm9200_clk_usb_recalc_rate,
339 .round_rate = at91rm9200_clk_usb_round_rate,
340 .set_rate = at91rm9200_clk_usb_set_rate,
343 struct clk_hw * __init
344 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
345 const char *parent_name, const u32 *divisors)
347 struct at91rm9200_clk_usb *usb;
349 struct clk_init_data init;
352 usb = kzalloc(sizeof(*usb), GFP_KERNEL);
354 return ERR_PTR(-ENOMEM);
357 init.ops = &at91rm9200_usb_ops;
358 init.parent_names = &parent_name;
359 init.num_parents = 1;
360 init.flags = CLK_SET_RATE_PARENT;
362 usb->hw.init = &init;
363 usb->regmap = regmap;
364 memcpy(usb->divisors, divisors, sizeof(usb->divisors));
367 ret = clk_hw_register(NULL, &usb->hw);