1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
9 config HAVE_CLK_PREPARE
12 config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
16 Select this option when the clock API in <linux/clk.h> is implemented
17 by platform/architecture code. This method is deprecated. Modern
18 code should select COMMON_CLK instead and not define a custom
22 bool "Common Clock Framework"
23 depends on !HAVE_LEGACY_CLK
24 select HAVE_CLK_PREPARE
28 The common clock framework is a single definition of struct
29 clk, useful across many platforms, as well as an
30 implementation of the clock API in include/linux/clk.h.
31 Architectures utilizing the common struct clk should select
36 config COMMON_CLK_WM831X
37 tristate "Clock driver for WM831x/2x PMICs"
40 Supports the clocking subsystem of the WM831x/2x series of
41 PMICs from Wolfson Microelectronics.
43 source "drivers/clk/versatile/Kconfig"
46 bool "PLL Driver for HSDK platform"
47 depends on ARC_SOC_HSDK || COMPILE_TEST
50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
58 Say yes here to build support for Texas Instruments' LMK04832 Ultra
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
61 config COMMON_CLK_APPLE_NCO
62 tristate "Clock driver for Apple SoC NCOs"
63 depends on ARCH_APPLE || COMPILE_TEST
66 This driver supports NCO (Numerically Controlled Oscillator) blocks
67 found on Apple SoCs such as t8103 (M1). The blocks are typically
68 generators of audio clocks.
70 config COMMON_CLK_MAX77686
71 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
72 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
74 This driver supports Maxim 77620/77686/77802 crystal oscillator
77 config COMMON_CLK_MAX9485
78 tristate "Maxim 9485 Programmable Clock Generator"
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
83 config COMMON_CLK_RK808
84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
87 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
89 Clkout1 is always on, Clkout2 can off by control register.
91 config COMMON_CLK_HI655X
92 tristate "Clock driver for Hi655x" if EXPERT
93 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
95 default MFD_HI655X_PMIC
97 This driver supports the hi655x PMIC clock. This
98 multi-function device has one fixed-rate oscillator, clocked
101 config COMMON_CLK_SCMI
102 tristate "Clock driver controlled via SCMI interface"
103 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
105 This driver provides support for clocks that are controlled
106 by firmware that implements the SCMI interface.
108 This driver uses SCMI Message Protocol to interact with the
109 firmware providing all the clock controls.
111 config COMMON_CLK_SCPI
112 tristate "Clock driver controlled via SCPI interface"
113 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
115 This driver provides support for clocks that are controlled
116 by firmware that implements the SCPI interface.
118 This driver uses SCPI Message Protocol to interact with the
119 firmware providing all the clock controls.
121 config COMMON_CLK_SI5341
122 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
126 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
127 generators. Not all features of these chips are currently supported
128 by the driver, in particular it only supports XTAL input. The chip can
129 be pre-programmed to support other configurations and features not yet
130 implemented in the driver.
132 config COMMON_CLK_SI5351
133 tristate "Clock driver for SiLabs 5351A/B/C"
137 This driver supports Silicon Labs 5351A/B/C programmable clock
140 config COMMON_CLK_SI514
141 tristate "Clock driver for SiLabs 514 devices"
146 This driver supports the Silicon Labs 514 programmable clock
149 config COMMON_CLK_SI544
150 tristate "Clock driver for SiLabs 544 devices"
154 This driver supports the Silicon Labs 544 programmable clock
157 config COMMON_CLK_SI570
158 tristate "Clock driver for SiLabs 570 and compatible devices"
163 This driver supports Silicon Labs 570/571/598/599 programmable
166 config COMMON_CLK_BM1880
167 bool "Clock driver for Bitmain BM1880 SoC"
168 depends on ARCH_BITMAIN || COMPILE_TEST
171 This driver supports the clocks on Bitmain BM1880 SoC.
173 config COMMON_CLK_CDCE706
174 tristate "Clock driver for TI CDCE706 clock synthesizer"
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
180 config COMMON_CLK_TPS68470
181 tristate "Clock Driver for TI TPS68470 PMIC"
183 depends on INTEL_SKL_INT3472 || COMPILE_TEST
186 This driver supports the clocks provided by the TPS68470 PMIC.
188 config COMMON_CLK_CDCE925
189 tristate "Clock driver for TI CDCE913/925/937/949 devices"
194 This driver supports the TI CDCE913/925/937/949 programmable clock
195 synthesizer. Each chip has different number of PLLs and outputs.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
197 clocking support and five output dividers. The driver only supports
198 the following setup, and uses a fixed setting for the output muxes.
199 Y1 is derived from the input clock
200 Y2 and Y3 derive from PLL1
201 Y4 and Y5 derive from PLL2
202 Given a target output frequency, the driver will set the PLL and
203 divider to best approximate the desired output.
205 config COMMON_CLK_CS2000_CP
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
210 If you say yes here you get support for the CS2000 clock multiplier.
212 config COMMON_CLK_EN7523
213 bool "Clock driver for Airoha EN7523 SoC system clocks"
215 depends on ARCH_AIROHA || COMPILE_TEST
218 This driver provides the fixed clocks and gates present on Airoha
221 config COMMON_CLK_FSL_FLEXSPI
222 tristate "Clock driver for FlexSPI on Layerscape SoCs"
223 depends on ARCH_LAYERSCAPE || COMPILE_TEST
224 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
226 On Layerscape SoCs there is a special clock for the FlexSPI
229 config COMMON_CLK_FSL_SAI
230 bool "Clock driver for BCLK of Freescale SAI cores"
231 depends on ARCH_LAYERSCAPE || COMPILE_TEST
233 This driver supports the Freescale SAI (Synchronous Audio Interface)
234 to be used as a generic clock output. Some SoCs have restrictions
235 regarding the possible pin multiplexer settings. Eg. on some SoCs
236 two SAI interfaces can only be enabled together. If just one is
237 needed, the BCLK pin of the second one can be used as general
238 purpose clock output. Ideally, it can be used to drive an audio
239 codec (sometimes known as MCLK).
241 config COMMON_CLK_GEMINI
242 bool "Clock driver for Cortina Systems Gemini SoC"
243 depends on ARCH_GEMINI || COMPILE_TEST
245 select RESET_CONTROLLER
247 This driver supports the SoC clocks on the Cortina Systems Gemini
248 platform, also known as SL3516 or CS3516.
250 config COMMON_CLK_LAN966X
251 tristate "Generic Clock Controller driver for LAN966X SoC"
254 depends on SOC_LAN966 || COMPILE_TEST
256 This driver provides support for Generic Clock Controller(GCK) on
257 LAN966X SoC. GCK generates and supplies clock to various peripherals
260 config COMMON_CLK_ASPEED
261 bool "Clock driver for Aspeed BMC SoCs"
262 depends on ARCH_ASPEED || COMPILE_TEST
265 select RESET_CONTROLLER
267 This driver supports the SoC clocks on the Aspeed BMC platforms.
269 The G4 and G5 series, including the ast2400 and ast2500, are supported
272 config COMMON_CLK_S2MPS11
273 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
274 depends on MFD_SEC_CORE || COMPILE_TEST
276 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
277 clock. These multi-function devices have two (S2MPS14) or three
278 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
281 tristate "External McPDM functional clock from twl6040"
282 depends on TWL6040_CORE
284 Enable the external functional clock support on OMAP4+ platforms for
285 McPDM. McPDM module is using the external bit clock on the McPDM bus
288 config COMMON_CLK_AXI_CLKGEN
289 tristate "AXI clkgen driver"
290 depends on HAS_IOMEM || COMPILE_TEST
293 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
294 FPGAs. It is commonly used in Analog Devices' reference designs.
297 bool "Clock driver for Freescale QorIQ platforms"
299 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
301 This adds the clock driver support for Freescale QorIQ platforms
302 using common clock framework.
304 config CLK_LS1028A_PLLDIG
305 tristate "Clock driver for LS1028A Display output"
306 depends on ARCH_LAYERSCAPE || COMPILE_TEST
307 default ARCH_LAYERSCAPE
309 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
310 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
311 features of the PLL are currently supported by the driver. By default,
312 configured bypass mode with this PLL.
314 config COMMON_CLK_XGENE
315 bool "Clock driver for APM XGene SoC"
317 depends on ARM64 || COMPILE_TEST
319 Support for the APM X-Gene SoC reference, PLL, and device clocks.
321 config COMMON_CLK_LOCHNAGAR
322 tristate "Cirrus Logic Lochnagar clock driver"
323 depends on MFD_LOCHNAGAR
325 This driver supports the clocking features of the Cirrus Logic
326 Lochnagar audio development board.
328 config COMMON_CLK_LOONGSON2
329 bool "Clock driver for Loongson-2 SoC"
330 depends on LOONGARCH || COMPILE_TEST
332 This driver provides support for clock controller on Loongson-2 SoC.
333 The clock controller can generates and supplies clock to various
334 peripherals within the SoC.
335 Say Y here to support Loongson-2 SoC clock driver.
337 config COMMON_CLK_NXP
338 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
339 select REGMAP_MMIO if ARCH_LPC32XX
340 select MFD_SYSCON if ARCH_LPC18XX
342 Support for clock providers on NXP platforms.
344 config COMMON_CLK_PALMAS
345 tristate "Clock driver for TI Palmas devices"
346 depends on MFD_PALMAS
348 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
349 using common clock framework.
351 config COMMON_CLK_PWM
352 tristate "Clock driver for PWMs used as clock outputs"
355 Adapter driver so that any PWM output can be (mis)used as clock signal
358 config COMMON_CLK_PXA
359 def_bool COMMON_CLK && ARCH_PXA
361 Support for the Marvell PXA SoC.
363 config COMMON_CLK_RS9_PCIE
364 tristate "Clock driver for Renesas 9-series PCIe clock generators"
369 This driver supports the Renesas 9-series PCIe clock generator
370 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
372 config COMMON_CLK_SI521XX
373 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
378 This driver supports the SkyWorks Si521xx PCIe clock generator
379 models Si52144/Si52146/Si52147.
381 config COMMON_CLK_VC5
382 tristate "Clock driver for IDT VersaClock 5,6 devices"
387 This driver supports the IDT VersaClock 5 and VersaClock 6
388 programmable clock generators.
390 config COMMON_CLK_VC7
391 tristate "Clock driver for Renesas Versaclock 7 devices"
396 Renesas Versaclock7 is a family of configurable clock generator
397 and jitter attenuator ICs with fractional and integer dividers.
399 config COMMON_CLK_STM32MP135
400 def_bool COMMON_CLK && MACH_STM32MP13
402 Support for stm32mp135 SoC family clocks
404 config COMMON_CLK_STM32MP157
405 def_bool COMMON_CLK && MACH_STM32MP157
407 Support for stm32mp157 SoC family clocks
409 config COMMON_CLK_STM32F
410 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
412 Support for stm32f4 and stm32f7 SoC families clocks
414 config COMMON_CLK_STM32H7
415 def_bool COMMON_CLK && MACH_STM32H743
417 Support for stm32h7 SoC family clocks
419 config COMMON_CLK_MMP2
420 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
422 Support for Marvell MMP2 and MMP3 SoC clocks
424 config COMMON_CLK_MMP2_AUDIO
425 tristate "Clock driver for MMP2 Audio subsystem"
426 depends on COMMON_CLK_MMP2 || COMPILE_TEST
428 This driver supports clocks for Audio subsystem on MMP2 SoC.
430 config COMMON_CLK_BD718XX
431 tristate "Clock driver for 32K clk gates on ROHM PMICs"
432 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
434 This driver supports ROHM BD71837, BD71847, BD71850, BD71815
435 and BD71828 PMICs clock gates.
437 config COMMON_CLK_FIXED_MMIO
438 bool "Clock driver for Memory Mapped Fixed values"
439 depends on COMMON_CLK && OF
441 Support for Memory Mapped IO Fixed clocks
443 config COMMON_CLK_K210
444 bool "Clock driver for the Canaan Kendryte K210 SoC"
445 depends on OF && RISCV && SOC_CANAAN
448 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
450 config COMMON_CLK_SP7021
451 tristate "Clock driver for Sunplus SP7021 SoC"
452 depends on SOC_SP7021 || COMPILE_TEST
455 This driver supports the Sunplus SP7021 SoC clocks.
456 It implements SP7021 PLLs/gate.
457 Not all features of the PLL are currently supported
460 source "drivers/clk/actions/Kconfig"
461 source "drivers/clk/analogbits/Kconfig"
462 source "drivers/clk/baikal-t1/Kconfig"
463 source "drivers/clk/bcm/Kconfig"
464 source "drivers/clk/hisilicon/Kconfig"
465 source "drivers/clk/imgtec/Kconfig"
466 source "drivers/clk/imx/Kconfig"
467 source "drivers/clk/ingenic/Kconfig"
468 source "drivers/clk/keystone/Kconfig"
469 source "drivers/clk/mediatek/Kconfig"
470 source "drivers/clk/meson/Kconfig"
471 source "drivers/clk/mstar/Kconfig"
472 source "drivers/clk/microchip/Kconfig"
473 source "drivers/clk/mvebu/Kconfig"
474 source "drivers/clk/nuvoton/Kconfig"
475 source "drivers/clk/pistachio/Kconfig"
476 source "drivers/clk/qcom/Kconfig"
477 source "drivers/clk/ralink/Kconfig"
478 source "drivers/clk/renesas/Kconfig"
479 source "drivers/clk/rockchip/Kconfig"
480 source "drivers/clk/samsung/Kconfig"
481 source "drivers/clk/sifive/Kconfig"
482 source "drivers/clk/socfpga/Kconfig"
483 source "drivers/clk/sprd/Kconfig"
484 source "drivers/clk/starfive/Kconfig"
485 source "drivers/clk/sunxi/Kconfig"
486 source "drivers/clk/sunxi-ng/Kconfig"
487 source "drivers/clk/tegra/Kconfig"
488 source "drivers/clk/ti/Kconfig"
489 source "drivers/clk/uniphier/Kconfig"
490 source "drivers/clk/visconti/Kconfig"
491 source "drivers/clk/x86/Kconfig"
492 source "drivers/clk/xilinx/Kconfig"
493 source "drivers/clk/zynqmp/Kconfig"
496 config CLK_KUNIT_TEST
497 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
499 default KUNIT_ALL_TESTS
501 Kunit tests for the common clock framework.
503 config CLK_GATE_KUNIT_TEST
504 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
506 default KUNIT_ALL_TESTS
508 Kunit test for the basic clk gate type.