2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/compat.h>
33 #include <linux/clocksource.h>
34 #include <linux/uaccess.h>
35 #include <linux/slab.h>
37 #include <linux/acpi.h>
38 #include <linux/hpet.h>
39 #include <asm/current.h>
41 #include <asm/div64.h>
44 * The High Precision Event Timer driver.
45 * This driver is closely modelled after the rtc.c driver.
46 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
48 #define HPET_USER_FREQ (64)
49 #define HPET_DRIFT (500)
51 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
54 /* WARNING -- don't get confused. These macros are never used
55 * to write the (single) counter, and rarely to read it.
56 * They're badly named; to fix, someday.
58 #if BITS_PER_LONG == 64
59 #define write_counter(V, MC) writeq(V, MC)
60 #define read_counter(MC) readq(MC)
62 #define write_counter(V, MC) writel(V, MC)
63 #define read_counter(MC) readl(MC)
66 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
67 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
69 /* This clocksource driver currently only works on ia64 */
71 static void __iomem *hpet_mctr;
73 static cycle_t read_hpet(struct clocksource *cs)
75 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
78 static struct clocksource clocksource_hpet = {
82 .mask = CLOCKSOURCE_MASK(64),
83 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
85 static struct clocksource *hpet_clocksource;
88 /* A lock for concurrent access by app and isr hpet activity. */
89 static DEFINE_SPINLOCK(hpet_lock);
91 #define HPET_DEV_NAME (7)
94 struct hpets *hd_hpets;
95 struct hpet __iomem *hd_hpet;
96 struct hpet_timer __iomem *hd_timer;
97 unsigned long hd_ireqfreq;
98 unsigned long hd_irqdata;
99 wait_queue_head_t hd_waitqueue;
100 struct fasync_struct *hd_async_queue;
101 unsigned int hd_flags;
103 unsigned int hd_hdwirq;
104 char hd_name[HPET_DEV_NAME];
108 struct hpets *hp_next;
109 struct hpet __iomem *hp_hpet;
110 unsigned long hp_hpet_phys;
111 struct clocksource *hp_clocksource;
112 unsigned long long hp_tick_freq;
113 unsigned long hp_delta;
114 unsigned int hp_ntimer;
115 unsigned int hp_which;
116 struct hpet_dev hp_dev[1];
119 static struct hpets *hpets;
121 #define HPET_OPEN 0x0001
122 #define HPET_IE 0x0002 /* interrupt enabled */
123 #define HPET_PERIODIC 0x0004
124 #define HPET_SHARED_IRQ 0x0008
128 static inline unsigned long long readq(void __iomem *addr)
130 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
135 static inline void writeq(unsigned long long v, void __iomem *addr)
137 writel(v & 0xffffffff, addr);
138 writel(v >> 32, addr + 4);
142 static irqreturn_t hpet_interrupt(int irq, void *data)
144 struct hpet_dev *devp;
148 isr = 1 << (devp - devp->hd_hpets->hp_dev);
150 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
151 !(isr & readl(&devp->hd_hpet->hpet_isr)))
154 spin_lock(&hpet_lock);
158 * For non-periodic timers, increment the accumulator.
159 * This has the effect of treating non-periodic like periodic.
161 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
162 unsigned long m, t, mc, base, k;
163 struct hpet __iomem *hpet = devp->hd_hpet;
164 struct hpets *hpetp = devp->hd_hpets;
166 t = devp->hd_ireqfreq;
167 m = read_counter(&devp->hd_timer->hpet_compare);
168 mc = read_counter(&hpet->hpet_mc);
169 /* The time for the next interrupt would logically be t + m,
170 * however, if we are very unlucky and the interrupt is delayed
171 * for longer than t then we will completely miss the next
172 * interrupt if we set t + m and an application will hang.
173 * Therefore we need to make a more complex computation assuming
174 * that there exists a k for which the following is true:
175 * k * t + base < mc + delta
176 * (k + 1) * t + base > mc + delta
177 * where t is the interval in hpet ticks for the given freq,
178 * base is the theoretical start value 0 < base < t,
179 * mc is the main counter value at the time of the interrupt,
180 * delta is the time it takes to write the a value to the
182 * k may then be computed as (mc - base + delta) / t .
185 k = (mc - base + hpetp->hp_delta) / t;
186 write_counter(t * (k + 1) + base,
187 &devp->hd_timer->hpet_compare);
190 if (devp->hd_flags & HPET_SHARED_IRQ)
191 writel(isr, &devp->hd_hpet->hpet_isr);
192 spin_unlock(&hpet_lock);
194 wake_up_interruptible(&devp->hd_waitqueue);
196 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
201 static void hpet_timer_set_irq(struct hpet_dev *devp)
205 struct hpet_timer __iomem *timer;
207 spin_lock_irq(&hpet_lock);
208 if (devp->hd_hdwirq) {
209 spin_unlock_irq(&hpet_lock);
213 timer = devp->hd_timer;
215 /* we prefer level triggered mode */
216 v = readl(&timer->hpet_config);
217 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
218 v |= Tn_INT_TYPE_CNF_MASK;
219 writel(v, &timer->hpet_config);
221 spin_unlock_irq(&hpet_lock);
223 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
224 Tn_INT_ROUTE_CAP_SHIFT;
227 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
228 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
230 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
235 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
236 if (irq >= nr_irqs) {
241 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
246 /* FIXME: Setup interrupt source table */
249 if (irq < HPET_MAX_IRQ) {
250 spin_lock_irq(&hpet_lock);
251 v = readl(&timer->hpet_config);
252 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
253 writel(v, &timer->hpet_config);
254 devp->hd_hdwirq = gsi;
255 spin_unlock_irq(&hpet_lock);
260 static int hpet_open(struct inode *inode, struct file *file)
262 struct hpet_dev *devp;
266 if (file->f_mode & FMODE_WRITE)
269 mutex_lock(&hpet_mutex);
270 spin_lock_irq(&hpet_lock);
272 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
273 for (i = 0; i < hpetp->hp_ntimer; i++)
274 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
277 devp = &hpetp->hp_dev[i];
282 spin_unlock_irq(&hpet_lock);
283 mutex_unlock(&hpet_mutex);
287 file->private_data = devp;
288 devp->hd_irqdata = 0;
289 devp->hd_flags |= HPET_OPEN;
290 spin_unlock_irq(&hpet_lock);
291 mutex_unlock(&hpet_mutex);
293 hpet_timer_set_irq(devp);
299 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
301 DECLARE_WAITQUEUE(wait, current);
304 struct hpet_dev *devp;
306 devp = file->private_data;
307 if (!devp->hd_ireqfreq)
310 if (count < sizeof(unsigned long))
313 add_wait_queue(&devp->hd_waitqueue, &wait);
316 set_current_state(TASK_INTERRUPTIBLE);
318 spin_lock_irq(&hpet_lock);
319 data = devp->hd_irqdata;
320 devp->hd_irqdata = 0;
321 spin_unlock_irq(&hpet_lock);
325 else if (file->f_flags & O_NONBLOCK) {
328 } else if (signal_pending(current)) {
329 retval = -ERESTARTSYS;
335 retval = put_user(data, (unsigned long __user *)buf);
337 retval = sizeof(unsigned long);
339 __set_current_state(TASK_RUNNING);
340 remove_wait_queue(&devp->hd_waitqueue, &wait);
345 static unsigned int hpet_poll(struct file *file, poll_table * wait)
348 struct hpet_dev *devp;
350 devp = file->private_data;
352 if (!devp->hd_ireqfreq)
355 poll_wait(file, &devp->hd_waitqueue, wait);
357 spin_lock_irq(&hpet_lock);
358 v = devp->hd_irqdata;
359 spin_unlock_irq(&hpet_lock);
362 return POLLIN | POLLRDNORM;
367 #ifdef CONFIG_HPET_MMAP
368 #ifdef CONFIG_HPET_MMAP_DEFAULT
369 static int hpet_mmap_enabled = 1;
371 static int hpet_mmap_enabled = 0;
374 static __init int hpet_mmap_enable(char *str)
376 get_option(&str, &hpet_mmap_enabled);
377 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
380 __setup("hpet_mmap", hpet_mmap_enable);
382 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
384 struct hpet_dev *devp;
387 if (!hpet_mmap_enabled)
390 devp = file->private_data;
391 addr = devp->hd_hpets->hp_hpet_phys;
393 if (addr & (PAGE_SIZE - 1))
396 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
397 return vm_iomap_memory(vma, addr, PAGE_SIZE);
400 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
406 static int hpet_fasync(int fd, struct file *file, int on)
408 struct hpet_dev *devp;
410 devp = file->private_data;
412 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
418 static int hpet_release(struct inode *inode, struct file *file)
420 struct hpet_dev *devp;
421 struct hpet_timer __iomem *timer;
424 devp = file->private_data;
425 timer = devp->hd_timer;
427 spin_lock_irq(&hpet_lock);
429 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
430 &timer->hpet_config);
435 devp->hd_ireqfreq = 0;
437 if (devp->hd_flags & HPET_PERIODIC
438 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
441 v = readq(&timer->hpet_config);
442 v ^= Tn_TYPE_CNF_MASK;
443 writeq(v, &timer->hpet_config);
446 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
447 spin_unlock_irq(&hpet_lock);
452 file->private_data = NULL;
456 static int hpet_ioctl_ieon(struct hpet_dev *devp)
458 struct hpet_timer __iomem *timer;
459 struct hpet __iomem *hpet;
462 unsigned long g, v, t, m;
463 unsigned long flags, isr;
465 timer = devp->hd_timer;
466 hpet = devp->hd_hpet;
467 hpetp = devp->hd_hpets;
469 if (!devp->hd_ireqfreq)
472 spin_lock_irq(&hpet_lock);
474 if (devp->hd_flags & HPET_IE) {
475 spin_unlock_irq(&hpet_lock);
479 devp->hd_flags |= HPET_IE;
481 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
482 devp->hd_flags |= HPET_SHARED_IRQ;
483 spin_unlock_irq(&hpet_lock);
485 irq = devp->hd_hdwirq;
488 unsigned long irq_flags;
490 if (devp->hd_flags & HPET_SHARED_IRQ) {
492 * To prevent the interrupt handler from seeing an
493 * unwanted interrupt status bit, program the timer
494 * so that it will not fire in the near future ...
496 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
497 &timer->hpet_config);
498 write_counter(read_counter(&hpet->hpet_mc),
499 &timer->hpet_compare);
500 /* ... and clear any left-over status. */
501 isr = 1 << (devp - devp->hd_hpets->hp_dev);
502 writel(isr, &hpet->hpet_isr);
505 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
506 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
507 if (request_irq(irq, hpet_interrupt, irq_flags,
508 devp->hd_name, (void *)devp)) {
509 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
515 spin_lock_irq(&hpet_lock);
516 devp->hd_flags ^= HPET_IE;
517 spin_unlock_irq(&hpet_lock);
522 t = devp->hd_ireqfreq;
523 v = readq(&timer->hpet_config);
525 /* 64-bit comparators are not yet supported through the ioctls,
526 * so force this into 32-bit mode if it supports both modes
528 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
530 if (devp->hd_flags & HPET_PERIODIC) {
531 g |= Tn_TYPE_CNF_MASK;
532 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
533 writeq(v, &timer->hpet_config);
534 local_irq_save(flags);
537 * NOTE: First we modify the hidden accumulator
538 * register supported by periodic-capable comparators.
539 * We never want to modify the (single) counter; that
540 * would affect all the comparators. The value written
541 * is the counter value when the first interrupt is due.
543 m = read_counter(&hpet->hpet_mc);
544 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
546 * Then we modify the comparator, indicating the period
547 * for subsequent interrupt.
549 write_counter(t, &timer->hpet_compare);
551 local_irq_save(flags);
552 m = read_counter(&hpet->hpet_mc);
553 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
556 if (devp->hd_flags & HPET_SHARED_IRQ) {
557 isr = 1 << (devp - devp->hd_hpets->hp_dev);
558 writel(isr, &hpet->hpet_isr);
560 writeq(g, &timer->hpet_config);
561 local_irq_restore(flags);
566 /* converts Hz to number of timer ticks */
567 static inline unsigned long hpet_time_div(struct hpets *hpets,
570 unsigned long long m;
572 m = hpets->hp_tick_freq + (dis >> 1);
574 return (unsigned long)m;
578 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
579 struct hpet_info *info)
581 struct hpet_timer __iomem *timer;
582 struct hpet __iomem *hpet;
593 timer = devp->hd_timer;
594 hpet = devp->hd_hpet;
595 hpetp = devp->hd_hpets;
598 return hpet_ioctl_ieon(devp);
607 if ((devp->hd_flags & HPET_IE) == 0)
609 v = readq(&timer->hpet_config);
610 v &= ~Tn_INT_ENB_CNF_MASK;
611 writeq(v, &timer->hpet_config);
613 free_irq(devp->hd_irq, devp);
616 devp->hd_flags ^= HPET_IE;
620 memset(info, 0, sizeof(*info));
621 if (devp->hd_ireqfreq)
623 hpet_time_div(hpetp, devp->hd_ireqfreq);
625 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
626 info->hi_hpet = hpetp->hp_which;
627 info->hi_timer = devp - hpetp->hp_dev;
631 v = readq(&timer->hpet_config);
632 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
636 devp->hd_flags |= HPET_PERIODIC;
639 v = readq(&timer->hpet_config);
640 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
644 if (devp->hd_flags & HPET_PERIODIC &&
645 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
646 v = readq(&timer->hpet_config);
647 v ^= Tn_TYPE_CNF_MASK;
648 writeq(v, &timer->hpet_config);
650 devp->hd_flags &= ~HPET_PERIODIC;
653 if ((arg > hpet_max_freq) &&
654 !capable(CAP_SYS_RESOURCE)) {
664 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
671 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
673 struct hpet_info info;
676 mutex_lock(&hpet_mutex);
677 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
678 mutex_unlock(&hpet_mutex);
680 if ((cmd == HPET_INFO) && !err &&
681 (copy_to_user((void __user *)arg, &info, sizeof(info))))
688 struct compat_hpet_info {
689 compat_ulong_t hi_ireqfreq; /* Hz */
690 compat_ulong_t hi_flags; /* information */
691 unsigned short hi_hpet;
692 unsigned short hi_timer;
696 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
698 struct hpet_info info;
701 mutex_lock(&hpet_mutex);
702 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
703 mutex_unlock(&hpet_mutex);
705 if ((cmd == HPET_INFO) && !err) {
706 struct compat_hpet_info __user *u = compat_ptr(arg);
707 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
708 put_user(info.hi_flags, &u->hi_flags) ||
709 put_user(info.hi_hpet, &u->hi_hpet) ||
710 put_user(info.hi_timer, &u->hi_timer))
718 static const struct file_operations hpet_fops = {
719 .owner = THIS_MODULE,
723 .unlocked_ioctl = hpet_ioctl,
725 .compat_ioctl = hpet_compat_ioctl,
728 .release = hpet_release,
729 .fasync = hpet_fasync,
733 static int hpet_is_known(struct hpet_data *hdp)
737 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
738 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
744 static struct ctl_table hpet_table[] = {
746 .procname = "max-user-freq",
747 .data = &hpet_max_freq,
748 .maxlen = sizeof(int),
750 .proc_handler = proc_dointvec,
755 static struct ctl_table hpet_root[] = {
765 static struct ctl_table dev_root[] = {
775 static struct ctl_table_header *sysctl_header;
778 * Adjustment for when arming the timer with
779 * initial conditions. That is, main counter
780 * ticks expired before interrupts are enabled.
782 #define TICK_CALIBRATE (1000UL)
784 static unsigned long __hpet_calibrate(struct hpets *hpetp)
786 struct hpet_timer __iomem *timer = NULL;
787 unsigned long t, m, count, i, flags, start;
788 struct hpet_dev *devp;
790 struct hpet __iomem *hpet;
792 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
793 if ((devp->hd_flags & HPET_OPEN) == 0) {
794 timer = devp->hd_timer;
801 hpet = hpetp->hp_hpet;
802 t = read_counter(&timer->hpet_compare);
805 count = hpet_time_div(hpetp, TICK_CALIBRATE);
807 local_irq_save(flags);
809 start = read_counter(&hpet->hpet_mc);
812 m = read_counter(&hpet->hpet_mc);
813 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
814 } while (i++, (m - start) < count);
816 local_irq_restore(flags);
818 return (m - start) / i;
821 static unsigned long hpet_calibrate(struct hpets *hpetp)
823 unsigned long ret = ~0UL;
827 * Try to calibrate until return value becomes stable small value.
828 * If SMI interruption occurs in calibration loop, the return value
829 * will be big. This avoids its impact.
832 tmp = __hpet_calibrate(hpetp);
841 int hpet_alloc(struct hpet_data *hdp)
844 struct hpet_dev *devp;
848 struct hpet __iomem *hpet;
849 static struct hpets *last;
850 unsigned long period;
851 unsigned long long temp;
855 * hpet_alloc can be called by platform dependent code.
856 * If platform dependent code has allocated the hpet that
857 * ACPI has also reported, then we catch it here.
859 if (hpet_is_known(hdp)) {
860 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
865 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
866 sizeof(struct hpet_dev));
868 hpetp = kzalloc(siz, GFP_KERNEL);
873 hpetp->hp_which = hpet_nhpet++;
874 hpetp->hp_hpet = hdp->hd_address;
875 hpetp->hp_hpet_phys = hdp->hd_phys_address;
877 hpetp->hp_ntimer = hdp->hd_nirqs;
879 for (i = 0; i < hdp->hd_nirqs; i++)
880 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
882 hpet = hpetp->hp_hpet;
884 cap = readq(&hpet->hpet_cap);
886 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
888 if (hpetp->hp_ntimer != ntimer) {
889 printk(KERN_WARNING "hpet: number irqs doesn't agree"
890 " with number of timers\n");
896 last->hp_next = hpetp;
902 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
903 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
904 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
905 temp += period >> 1; /* round */
906 do_div(temp, period);
907 hpetp->hp_tick_freq = temp; /* ticks per second */
909 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
910 hpetp->hp_which, hdp->hd_phys_address,
911 hpetp->hp_ntimer > 1 ? "s" : "");
912 for (i = 0; i < hpetp->hp_ntimer; i++)
913 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
914 printk(KERN_CONT "\n");
916 temp = hpetp->hp_tick_freq;
917 remainder = do_div(temp, 1000000);
919 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
920 hpetp->hp_which, hpetp->hp_ntimer,
921 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
922 (unsigned) temp, remainder);
924 mcfg = readq(&hpet->hpet_config);
925 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
926 write_counter(0L, &hpet->hpet_mc);
927 mcfg |= HPET_ENABLE_CNF_MASK;
928 writeq(mcfg, &hpet->hpet_config);
931 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
932 struct hpet_timer __iomem *timer;
934 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
936 devp->hd_hpets = hpetp;
937 devp->hd_hpet = hpet;
938 devp->hd_timer = timer;
941 * If the timer was reserved by platform code,
942 * then make timer unavailable for opens.
944 if (hdp->hd_state & (1 << i)) {
945 devp->hd_flags = HPET_OPEN;
949 init_waitqueue_head(&devp->hd_waitqueue);
952 hpetp->hp_delta = hpet_calibrate(hpetp);
954 /* This clocksource driver currently only works on ia64 */
956 if (!hpet_clocksource) {
957 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
958 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
959 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
960 hpetp->hp_clocksource = &clocksource_hpet;
961 hpet_clocksource = &clocksource_hpet;
968 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
970 struct hpet_data *hdp;
972 struct acpi_resource_address64 addr;
976 status = acpi_resource_to_address64(res, &addr);
978 if (ACPI_SUCCESS(status)) {
979 hdp->hd_phys_address = addr.minimum;
980 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
982 if (hpet_is_known(hdp)) {
983 iounmap(hdp->hd_address);
984 return AE_ALREADY_EXISTS;
986 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
987 struct acpi_resource_fixed_memory32 *fixmem32;
989 fixmem32 = &res->data.fixed_memory32;
991 hdp->hd_phys_address = fixmem32->address;
992 hdp->hd_address = ioremap(fixmem32->address,
995 if (hpet_is_known(hdp)) {
996 iounmap(hdp->hd_address);
997 return AE_ALREADY_EXISTS;
999 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
1000 struct acpi_resource_extended_irq *irqp;
1003 irqp = &res->data.extended_irq;
1005 for (i = 0; i < irqp->interrupt_count; i++) {
1006 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
1009 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
1010 irqp->triggering, irqp->polarity);
1014 hdp->hd_irq[hdp->hd_nirqs] = irq;
1022 static int hpet_acpi_add(struct acpi_device *device)
1025 struct hpet_data data;
1027 memset(&data, 0, sizeof(data));
1030 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
1031 hpet_resources, &data);
1033 if (ACPI_FAILURE(result))
1036 if (!data.hd_address || !data.hd_nirqs) {
1037 if (data.hd_address)
1038 iounmap(data.hd_address);
1039 printk("%s: no address or irqs in _CRS\n", __func__);
1043 return hpet_alloc(&data);
1046 static int hpet_acpi_remove(struct acpi_device *device)
1048 /* XXX need to unregister clocksource, dealloc mem, etc */
1052 static const struct acpi_device_id hpet_device_ids[] = {
1056 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1058 static struct acpi_driver hpet_acpi_driver = {
1060 .ids = hpet_device_ids,
1062 .add = hpet_acpi_add,
1063 .remove = hpet_acpi_remove,
1067 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1069 static int __init hpet_init(void)
1073 result = misc_register(&hpet_misc);
1077 sysctl_header = register_sysctl_table(dev_root);
1079 result = acpi_bus_register_driver(&hpet_acpi_driver);
1082 unregister_sysctl_table(sysctl_header);
1083 misc_deregister(&hpet_misc);
1090 static void __exit hpet_exit(void)
1092 acpi_bus_unregister_driver(&hpet_acpi_driver);
1095 unregister_sysctl_table(sysctl_header);
1096 misc_deregister(&hpet_misc);
1101 module_init(hpet_init);
1102 module_exit(hpet_exit);
1103 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1104 MODULE_LICENSE("GPL");