1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel & MS High Precision Event Timer Implementation.
5 * Copyright (C) 2003 Intel Corporation
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/miscdevice.h>
15 #include <linux/major.h>
16 #include <linux/ioport.h>
17 #include <linux/fcntl.h>
18 #include <linux/init.h>
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/poll.h>
22 #include <linux/proc_fs.h>
23 #include <linux/spinlock.h>
24 #include <linux/sysctl.h>
25 #include <linux/wait.h>
26 #include <linux/sched/signal.h>
27 #include <linux/bcd.h>
28 #include <linux/seq_file.h>
29 #include <linux/bitops.h>
30 #include <linux/compat.h>
31 #include <linux/clocksource.h>
32 #include <linux/uaccess.h>
33 #include <linux/slab.h>
35 #include <linux/acpi.h>
36 #include <linux/hpet.h>
37 #include <asm/current.h>
39 #include <asm/div64.h>
42 * The High Precision Event Timer driver.
43 * This driver is closely modelled after the rtc.c driver.
44 * See HPET spec revision 1.
46 #define HPET_USER_FREQ (64)
47 #define HPET_DRIFT (500)
49 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
52 /* WARNING -- don't get confused. These macros are never used
53 * to write the (single) counter, and rarely to read it.
54 * They're badly named; to fix, someday.
56 #if BITS_PER_LONG == 64
57 #define write_counter(V, MC) writeq(V, MC)
58 #define read_counter(MC) readq(MC)
60 #define write_counter(V, MC) writel(V, MC)
61 #define read_counter(MC) readl(MC)
64 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
65 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
67 /* This clocksource driver currently only works on ia64 */
69 static void __iomem *hpet_mctr;
71 static u64 read_hpet(struct clocksource *cs)
73 return (u64)read_counter((void __iomem *)hpet_mctr);
76 static struct clocksource clocksource_hpet = {
80 .mask = CLOCKSOURCE_MASK(64),
81 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
83 static struct clocksource *hpet_clocksource;
86 /* A lock for concurrent access by app and isr hpet activity. */
87 static DEFINE_SPINLOCK(hpet_lock);
89 #define HPET_DEV_NAME (7)
92 struct hpets *hd_hpets;
93 struct hpet __iomem *hd_hpet;
94 struct hpet_timer __iomem *hd_timer;
95 unsigned long hd_ireqfreq;
96 unsigned long hd_irqdata;
97 wait_queue_head_t hd_waitqueue;
98 struct fasync_struct *hd_async_queue;
99 unsigned int hd_flags;
101 unsigned int hd_hdwirq;
102 char hd_name[HPET_DEV_NAME];
106 struct hpets *hp_next;
107 struct hpet __iomem *hp_hpet;
108 unsigned long hp_hpet_phys;
109 struct clocksource *hp_clocksource;
110 unsigned long long hp_tick_freq;
111 unsigned long hp_delta;
112 unsigned int hp_ntimer;
113 unsigned int hp_which;
114 struct hpet_dev hp_dev[];
117 static struct hpets *hpets;
119 #define HPET_OPEN 0x0001
120 #define HPET_IE 0x0002 /* interrupt enabled */
121 #define HPET_PERIODIC 0x0004
122 #define HPET_SHARED_IRQ 0x0008
124 static irqreturn_t hpet_interrupt(int irq, void *data)
126 struct hpet_dev *devp;
130 isr = 1 << (devp - devp->hd_hpets->hp_dev);
132 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
133 !(isr & readl(&devp->hd_hpet->hpet_isr)))
136 spin_lock(&hpet_lock);
140 * For non-periodic timers, increment the accumulator.
141 * This has the effect of treating non-periodic like periodic.
143 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
144 unsigned long t, mc, base, k;
145 struct hpet __iomem *hpet = devp->hd_hpet;
146 struct hpets *hpetp = devp->hd_hpets;
148 t = devp->hd_ireqfreq;
149 read_counter(&devp->hd_timer->hpet_compare);
150 mc = read_counter(&hpet->hpet_mc);
151 /* The time for the next interrupt would logically be t + m,
152 * however, if we are very unlucky and the interrupt is delayed
153 * for longer than t then we will completely miss the next
154 * interrupt if we set t + m and an application will hang.
155 * Therefore we need to make a more complex computation assuming
156 * that there exists a k for which the following is true:
157 * k * t + base < mc + delta
158 * (k + 1) * t + base > mc + delta
159 * where t is the interval in hpet ticks for the given freq,
160 * base is the theoretical start value 0 < base < t,
161 * mc is the main counter value at the time of the interrupt,
162 * delta is the time it takes to write the a value to the
164 * k may then be computed as (mc - base + delta) / t .
167 k = (mc - base + hpetp->hp_delta) / t;
168 write_counter(t * (k + 1) + base,
169 &devp->hd_timer->hpet_compare);
172 if (devp->hd_flags & HPET_SHARED_IRQ)
173 writel(isr, &devp->hd_hpet->hpet_isr);
174 spin_unlock(&hpet_lock);
176 wake_up_interruptible(&devp->hd_waitqueue);
178 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
183 static void hpet_timer_set_irq(struct hpet_dev *devp)
187 struct hpet_timer __iomem *timer;
189 spin_lock_irq(&hpet_lock);
190 if (devp->hd_hdwirq) {
191 spin_unlock_irq(&hpet_lock);
195 timer = devp->hd_timer;
197 /* we prefer level triggered mode */
198 v = readl(&timer->hpet_config);
199 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
200 v |= Tn_INT_TYPE_CNF_MASK;
201 writel(v, &timer->hpet_config);
203 spin_unlock_irq(&hpet_lock);
205 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
206 Tn_INT_ROUTE_CAP_SHIFT;
209 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
210 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
212 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
217 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
218 if (irq >= nr_irqs) {
223 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
228 /* FIXME: Setup interrupt source table */
231 if (irq < HPET_MAX_IRQ) {
232 spin_lock_irq(&hpet_lock);
233 v = readl(&timer->hpet_config);
234 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
235 writel(v, &timer->hpet_config);
236 devp->hd_hdwirq = gsi;
237 spin_unlock_irq(&hpet_lock);
242 static int hpet_open(struct inode *inode, struct file *file)
244 struct hpet_dev *devp;
248 if (file->f_mode & FMODE_WRITE)
251 mutex_lock(&hpet_mutex);
252 spin_lock_irq(&hpet_lock);
254 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
255 for (i = 0; i < hpetp->hp_ntimer; i++)
256 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
259 devp = &hpetp->hp_dev[i];
264 spin_unlock_irq(&hpet_lock);
265 mutex_unlock(&hpet_mutex);
269 file->private_data = devp;
270 devp->hd_irqdata = 0;
271 devp->hd_flags |= HPET_OPEN;
272 spin_unlock_irq(&hpet_lock);
273 mutex_unlock(&hpet_mutex);
275 hpet_timer_set_irq(devp);
281 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
283 DECLARE_WAITQUEUE(wait, current);
286 struct hpet_dev *devp;
288 devp = file->private_data;
289 if (!devp->hd_ireqfreq)
292 if (count < sizeof(unsigned long))
295 add_wait_queue(&devp->hd_waitqueue, &wait);
298 set_current_state(TASK_INTERRUPTIBLE);
300 spin_lock_irq(&hpet_lock);
301 data = devp->hd_irqdata;
302 devp->hd_irqdata = 0;
303 spin_unlock_irq(&hpet_lock);
307 } else if (file->f_flags & O_NONBLOCK) {
310 } else if (signal_pending(current)) {
311 retval = -ERESTARTSYS;
317 retval = put_user(data, (unsigned long __user *)buf);
319 retval = sizeof(unsigned long);
321 __set_current_state(TASK_RUNNING);
322 remove_wait_queue(&devp->hd_waitqueue, &wait);
327 static __poll_t hpet_poll(struct file *file, poll_table * wait)
330 struct hpet_dev *devp;
332 devp = file->private_data;
334 if (!devp->hd_ireqfreq)
337 poll_wait(file, &devp->hd_waitqueue, wait);
339 spin_lock_irq(&hpet_lock);
340 v = devp->hd_irqdata;
341 spin_unlock_irq(&hpet_lock);
344 return EPOLLIN | EPOLLRDNORM;
349 #ifdef CONFIG_HPET_MMAP
350 #ifdef CONFIG_HPET_MMAP_DEFAULT
351 static int hpet_mmap_enabled = 1;
353 static int hpet_mmap_enabled = 0;
356 static __init int hpet_mmap_enable(char *str)
358 get_option(&str, &hpet_mmap_enabled);
359 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
362 __setup("hpet_mmap=", hpet_mmap_enable);
364 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
366 struct hpet_dev *devp;
369 if (!hpet_mmap_enabled)
372 devp = file->private_data;
373 addr = devp->hd_hpets->hp_hpet_phys;
375 if (addr & (PAGE_SIZE - 1))
378 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
379 return vm_iomap_memory(vma, addr, PAGE_SIZE);
382 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
388 static int hpet_fasync(int fd, struct file *file, int on)
390 struct hpet_dev *devp;
392 devp = file->private_data;
394 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
400 static int hpet_release(struct inode *inode, struct file *file)
402 struct hpet_dev *devp;
403 struct hpet_timer __iomem *timer;
406 devp = file->private_data;
407 timer = devp->hd_timer;
409 spin_lock_irq(&hpet_lock);
411 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
412 &timer->hpet_config);
417 devp->hd_ireqfreq = 0;
419 if (devp->hd_flags & HPET_PERIODIC
420 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
423 v = readq(&timer->hpet_config);
424 v ^= Tn_TYPE_CNF_MASK;
425 writeq(v, &timer->hpet_config);
428 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
429 spin_unlock_irq(&hpet_lock);
434 file->private_data = NULL;
438 static int hpet_ioctl_ieon(struct hpet_dev *devp)
440 struct hpet_timer __iomem *timer;
441 struct hpet __iomem *hpet;
444 unsigned long g, v, t, m;
445 unsigned long flags, isr;
447 timer = devp->hd_timer;
448 hpet = devp->hd_hpet;
449 hpetp = devp->hd_hpets;
451 if (!devp->hd_ireqfreq)
454 spin_lock_irq(&hpet_lock);
456 if (devp->hd_flags & HPET_IE) {
457 spin_unlock_irq(&hpet_lock);
461 devp->hd_flags |= HPET_IE;
463 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
464 devp->hd_flags |= HPET_SHARED_IRQ;
465 spin_unlock_irq(&hpet_lock);
467 irq = devp->hd_hdwirq;
470 unsigned long irq_flags;
472 if (devp->hd_flags & HPET_SHARED_IRQ) {
474 * To prevent the interrupt handler from seeing an
475 * unwanted interrupt status bit, program the timer
476 * so that it will not fire in the near future ...
478 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
479 &timer->hpet_config);
480 write_counter(read_counter(&hpet->hpet_mc),
481 &timer->hpet_compare);
482 /* ... and clear any left-over status. */
483 isr = 1 << (devp - devp->hd_hpets->hp_dev);
484 writel(isr, &hpet->hpet_isr);
487 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
488 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
489 if (request_irq(irq, hpet_interrupt, irq_flags,
490 devp->hd_name, (void *)devp)) {
491 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
497 spin_lock_irq(&hpet_lock);
498 devp->hd_flags ^= HPET_IE;
499 spin_unlock_irq(&hpet_lock);
504 t = devp->hd_ireqfreq;
505 v = readq(&timer->hpet_config);
507 /* 64-bit comparators are not yet supported through the ioctls,
508 * so force this into 32-bit mode if it supports both modes
510 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
512 if (devp->hd_flags & HPET_PERIODIC) {
513 g |= Tn_TYPE_CNF_MASK;
514 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
519 * NOTE: First we modify the hidden accumulator
520 * register supported by periodic-capable comparators.
521 * We never want to modify the (single) counter; that
522 * would affect all the comparators. The value written
523 * is the counter value when the first interrupt is due.
525 m = read_counter(&hpet->hpet_mc);
526 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
528 * Then we modify the comparator, indicating the period
529 * for subsequent interrupt.
531 write_counter(t, &timer->hpet_compare);
533 local_irq_save(flags);
534 m = read_counter(&hpet->hpet_mc);
535 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
538 if (devp->hd_flags & HPET_SHARED_IRQ) {
539 isr = 1 << (devp - devp->hd_hpets->hp_dev);
540 writel(isr, &hpet->hpet_isr);
542 writeq(g, &timer->hpet_config);
543 local_irq_restore(flags);
548 /* converts Hz to number of timer ticks */
549 static inline unsigned long hpet_time_div(struct hpets *hpets,
552 unsigned long long m;
554 m = hpets->hp_tick_freq + (dis >> 1);
555 return div64_ul(m, dis);
559 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
560 struct hpet_info *info)
562 struct hpet_timer __iomem *timer;
573 timer = devp->hd_timer;
574 hpetp = devp->hd_hpets;
577 return hpet_ioctl_ieon(devp);
586 if ((devp->hd_flags & HPET_IE) == 0)
588 v = readq(&timer->hpet_config);
589 v &= ~Tn_INT_ENB_CNF_MASK;
590 writeq(v, &timer->hpet_config);
592 free_irq(devp->hd_irq, devp);
595 devp->hd_flags ^= HPET_IE;
599 memset(info, 0, sizeof(*info));
600 if (devp->hd_ireqfreq)
602 hpet_time_div(hpetp, devp->hd_ireqfreq);
604 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
605 info->hi_hpet = hpetp->hp_which;
606 info->hi_timer = devp - hpetp->hp_dev;
610 v = readq(&timer->hpet_config);
611 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
615 devp->hd_flags |= HPET_PERIODIC;
618 v = readq(&timer->hpet_config);
619 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
623 if (devp->hd_flags & HPET_PERIODIC &&
624 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
625 v = readq(&timer->hpet_config);
626 v ^= Tn_TYPE_CNF_MASK;
627 writeq(v, &timer->hpet_config);
629 devp->hd_flags &= ~HPET_PERIODIC;
632 if ((arg > hpet_max_freq) &&
633 !capable(CAP_SYS_RESOURCE)) {
643 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
650 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
652 struct hpet_info info;
655 mutex_lock(&hpet_mutex);
656 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
657 mutex_unlock(&hpet_mutex);
659 if ((cmd == HPET_INFO) && !err &&
660 (copy_to_user((void __user *)arg, &info, sizeof(info))))
667 struct compat_hpet_info {
668 compat_ulong_t hi_ireqfreq; /* Hz */
669 compat_ulong_t hi_flags; /* information */
670 unsigned short hi_hpet;
671 unsigned short hi_timer;
675 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
677 struct hpet_info info;
680 mutex_lock(&hpet_mutex);
681 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
682 mutex_unlock(&hpet_mutex);
684 if ((cmd == HPET_INFO) && !err) {
685 struct compat_hpet_info __user *u = compat_ptr(arg);
686 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
687 put_user(info.hi_flags, &u->hi_flags) ||
688 put_user(info.hi_hpet, &u->hi_hpet) ||
689 put_user(info.hi_timer, &u->hi_timer))
697 static const struct file_operations hpet_fops = {
698 .owner = THIS_MODULE,
702 .unlocked_ioctl = hpet_ioctl,
704 .compat_ioctl = hpet_compat_ioctl,
707 .release = hpet_release,
708 .fasync = hpet_fasync,
712 static int hpet_is_known(struct hpet_data *hdp)
716 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
717 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
723 static struct ctl_table hpet_table[] = {
725 .procname = "max-user-freq",
726 .data = &hpet_max_freq,
727 .maxlen = sizeof(int),
729 .proc_handler = proc_dointvec,
734 static struct ctl_table_header *sysctl_header;
737 * Adjustment for when arming the timer with
738 * initial conditions. That is, main counter
739 * ticks expired before interrupts are enabled.
741 #define TICK_CALIBRATE (1000UL)
743 static unsigned long __hpet_calibrate(struct hpets *hpetp)
745 struct hpet_timer __iomem *timer = NULL;
746 unsigned long t, m, count, i, flags, start;
747 struct hpet_dev *devp;
749 struct hpet __iomem *hpet;
751 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
752 if ((devp->hd_flags & HPET_OPEN) == 0) {
753 timer = devp->hd_timer;
760 hpet = hpetp->hp_hpet;
761 t = read_counter(&timer->hpet_compare);
764 count = hpet_time_div(hpetp, TICK_CALIBRATE);
766 local_irq_save(flags);
768 start = read_counter(&hpet->hpet_mc);
771 m = read_counter(&hpet->hpet_mc);
772 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
773 } while (i++, (m - start) < count);
775 local_irq_restore(flags);
777 return (m - start) / i;
780 static unsigned long hpet_calibrate(struct hpets *hpetp)
782 unsigned long ret = ~0UL;
786 * Try to calibrate until return value becomes stable small value.
787 * If SMI interruption occurs in calibration loop, the return value
788 * will be big. This avoids its impact.
791 tmp = __hpet_calibrate(hpetp);
800 int hpet_alloc(struct hpet_data *hdp)
803 struct hpet_dev *devp;
806 struct hpet __iomem *hpet;
807 static struct hpets *last;
808 unsigned long period;
809 unsigned long long temp;
813 * hpet_alloc can be called by platform dependent code.
814 * If platform dependent code has allocated the hpet that
815 * ACPI has also reported, then we catch it here.
817 if (hpet_is_known(hdp)) {
818 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
823 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
829 hpetp->hp_which = hpet_nhpet++;
830 hpetp->hp_hpet = hdp->hd_address;
831 hpetp->hp_hpet_phys = hdp->hd_phys_address;
833 hpetp->hp_ntimer = hdp->hd_nirqs;
835 for (i = 0; i < hdp->hd_nirqs; i++)
836 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
838 hpet = hpetp->hp_hpet;
840 cap = readq(&hpet->hpet_cap);
842 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
844 if (hpetp->hp_ntimer != ntimer) {
845 printk(KERN_WARNING "hpet: number irqs doesn't agree"
846 " with number of timers\n");
852 last->hp_next = hpetp;
858 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
859 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
860 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
861 temp += period >> 1; /* round */
862 do_div(temp, period);
863 hpetp->hp_tick_freq = temp; /* ticks per second */
865 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
866 hpetp->hp_which, hdp->hd_phys_address,
867 hpetp->hp_ntimer > 1 ? "s" : "");
868 for (i = 0; i < hpetp->hp_ntimer; i++)
869 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
870 printk(KERN_CONT "\n");
872 temp = hpetp->hp_tick_freq;
873 remainder = do_div(temp, 1000000);
875 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
876 hpetp->hp_which, hpetp->hp_ntimer,
877 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
878 (unsigned) temp, remainder);
880 mcfg = readq(&hpet->hpet_config);
881 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
882 write_counter(0L, &hpet->hpet_mc);
883 mcfg |= HPET_ENABLE_CNF_MASK;
884 writeq(mcfg, &hpet->hpet_config);
887 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
888 struct hpet_timer __iomem *timer;
890 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
892 devp->hd_hpets = hpetp;
893 devp->hd_hpet = hpet;
894 devp->hd_timer = timer;
897 * If the timer was reserved by platform code,
898 * then make timer unavailable for opens.
900 if (hdp->hd_state & (1 << i)) {
901 devp->hd_flags = HPET_OPEN;
905 init_waitqueue_head(&devp->hd_waitqueue);
908 hpetp->hp_delta = hpet_calibrate(hpetp);
910 /* This clocksource driver currently only works on ia64 */
912 if (!hpet_clocksource) {
913 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
914 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
915 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
916 hpetp->hp_clocksource = &clocksource_hpet;
917 hpet_clocksource = &clocksource_hpet;
924 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
926 struct hpet_data *hdp;
928 struct acpi_resource_address64 addr;
932 status = acpi_resource_to_address64(res, &addr);
934 if (ACPI_SUCCESS(status)) {
935 hdp->hd_phys_address = addr.address.minimum;
936 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
937 if (!hdp->hd_address)
940 if (hpet_is_known(hdp)) {
941 iounmap(hdp->hd_address);
942 return AE_ALREADY_EXISTS;
944 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
945 struct acpi_resource_fixed_memory32 *fixmem32;
947 fixmem32 = &res->data.fixed_memory32;
949 hdp->hd_phys_address = fixmem32->address;
950 hdp->hd_address = ioremap(fixmem32->address,
952 if (!hdp->hd_address)
955 if (hpet_is_known(hdp)) {
956 iounmap(hdp->hd_address);
957 return AE_ALREADY_EXISTS;
959 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
960 struct acpi_resource_extended_irq *irqp;
963 irqp = &res->data.extended_irq;
965 for (i = 0; i < irqp->interrupt_count; i++) {
966 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
969 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
975 hdp->hd_irq[hdp->hd_nirqs] = irq;
983 static int hpet_acpi_add(struct acpi_device *device)
986 struct hpet_data data;
988 memset(&data, 0, sizeof(data));
991 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
992 hpet_resources, &data);
994 if (ACPI_FAILURE(result))
997 if (!data.hd_address || !data.hd_nirqs) {
999 iounmap(data.hd_address);
1000 printk("%s: no address or irqs in _CRS\n", __func__);
1004 return hpet_alloc(&data);
1007 static const struct acpi_device_id hpet_device_ids[] = {
1012 static struct acpi_driver hpet_acpi_driver = {
1014 .ids = hpet_device_ids,
1016 .add = hpet_acpi_add,
1020 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1022 static int __init hpet_init(void)
1026 result = misc_register(&hpet_misc);
1030 sysctl_header = register_sysctl("dev/hpet", hpet_table);
1032 result = acpi_bus_register_driver(&hpet_acpi_driver);
1035 unregister_sysctl_table(sysctl_header);
1036 misc_deregister(&hpet_misc);
1042 device_initcall(hpet_init);
1045 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1046 MODULE_LICENSE("GPL");