2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
39 #include <asm/byteorder.h>
40 #include <environment.h>
41 #ifdef CFG_FLASH_CFI_DRIVER
44 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
45 * The width of the port and the width of the chips are determined at initialization.
46 * These widths are used to calculate the address for access CFI data structures.
49 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
50 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
51 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
52 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
53 * AMD CFI Specification, Release 2.0 December 1, 2001
54 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
55 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
57 * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
58 * reading and writing ... (yes there is such a Hardware).
61 #ifndef CFG_FLASH_BANKS_LIST
62 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
65 #define FLASH_CMD_CFI 0x98
66 #define FLASH_CMD_READ_ID 0x90
67 #define FLASH_CMD_RESET 0xff
68 #define FLASH_CMD_BLOCK_ERASE 0x20
69 #define FLASH_CMD_ERASE_CONFIRM 0xD0
70 #define FLASH_CMD_WRITE 0x40
71 #define FLASH_CMD_PROTECT 0x60
72 #define FLASH_CMD_PROTECT_SET 0x01
73 #define FLASH_CMD_PROTECT_CLEAR 0xD0
74 #define FLASH_CMD_CLEAR_STATUS 0x50
75 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
76 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
78 #define FLASH_STATUS_DONE 0x80
79 #define FLASH_STATUS_ESS 0x40
80 #define FLASH_STATUS_ECLBS 0x20
81 #define FLASH_STATUS_PSLBS 0x10
82 #define FLASH_STATUS_VPENS 0x08
83 #define FLASH_STATUS_PSS 0x04
84 #define FLASH_STATUS_DPS 0x02
85 #define FLASH_STATUS_R 0x01
86 #define FLASH_STATUS_PROTECT 0x01
88 #define AMD_CMD_RESET 0xF0
89 #define AMD_CMD_WRITE 0xA0
90 #define AMD_CMD_ERASE_START 0x80
91 #define AMD_CMD_ERASE_SECTOR 0x30
92 #define AMD_CMD_UNLOCK_START 0xAA
93 #define AMD_CMD_UNLOCK_ACK 0x55
94 #define AMD_CMD_WRITE_TO_BUFFER 0x25
95 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
97 #define AMD_STATUS_TOGGLE 0x40
98 #define AMD_STATUS_ERROR 0x20
100 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
101 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
102 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
113 #define FLASH_OFFSET_WTOUT 0x1F
114 #define FLASH_OFFSET_WBTOUT 0x20
115 #define FLASH_OFFSET_ETOUT 0x21
116 #define FLASH_OFFSET_CETOUT 0x22
117 #define FLASH_OFFSET_WMAX_TOUT 0x23
118 #define FLASH_OFFSET_WBMAX_TOUT 0x24
119 #define FLASH_OFFSET_EMAX_TOUT 0x25
120 #define FLASH_OFFSET_CEMAX_TOUT 0x26
121 #define FLASH_OFFSET_SIZE 0x27
122 #define FLASH_OFFSET_INTERFACE 0x28
123 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
124 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
125 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
126 #define FLASH_OFFSET_PROTECT 0x02
127 #define FLASH_OFFSET_USER_PROTECTION 0x85
128 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
130 #define CFI_CMDSET_NONE 0
131 #define CFI_CMDSET_INTEL_EXTENDED 1
132 #define CFI_CMDSET_AMD_STANDARD 2
133 #define CFI_CMDSET_INTEL_STANDARD 3
134 #define CFI_CMDSET_AMD_EXTENDED 4
135 #define CFI_CMDSET_MITSU_STANDARD 256
136 #define CFI_CMDSET_MITSU_EXTENDED 257
137 #define CFI_CMDSET_SST 258
139 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
140 # undef FLASH_CMD_RESET
141 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
148 unsigned long long ll;
152 volatile unsigned char *cp;
153 volatile unsigned short *wp;
154 volatile unsigned long *lp;
155 volatile unsigned long long *llp;
158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
160 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
162 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
163 #ifdef CFG_MAX_FLASH_BANKS_DETECT
164 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
165 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
167 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
168 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
172 * Check if chip width is defined. If not, start detecting with 8bit.
174 #ifndef CFG_FLASH_CFI_WIDTH
175 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
179 /*-----------------------------------------------------------------------
183 typedef unsigned long flash_sect_t;
185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
192 static void flash_read_jedec_ids (flash_info_t * info);
193 static int flash_detect_cfi (flash_info_t * info);
194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
196 ulong tout, char *prompt);
197 ulong flash_get_size (ulong base, int banknum);
198 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
199 static flash_info_t *flash_get_info(ulong base);
201 #ifdef CFG_FLASH_USE_BUFFER_WRITE
202 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
205 /*-----------------------------------------------------------------------
206 * create an address based on the offset and the port width
208 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
210 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
214 /*-----------------------------------------------------------------------
217 void print_longlong (char *str, unsigned long long data)
222 cp = (unsigned char *) &data;
223 for (i = 0; i < 8; i++)
224 sprintf (&str[i * 2], "%2.2x", *cp++);
226 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
231 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
233 flash_make_addr (info, sect,
234 x + FLASH_OFFSET_CFI_RESP);
235 debug ("%p : ", cptr.cp);
236 for (y = 0; y < 16; y++) {
237 debug ("%2.2x ", cptr.cp[y]);
240 for (y = 0; y < 16; y++) {
241 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
242 debug ("%c", cptr.cp[y]);
253 /*-----------------------------------------------------------------------
254 * read a character at a port width address
256 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
260 cp = flash_make_addr (info, 0, offset);
261 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
264 return (cp[info->portwidth - 1]);
268 /*-----------------------------------------------------------------------
269 * read a short word by swapping for ppc format.
271 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
279 addr = flash_make_addr (info, sect, offset);
282 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
284 for (x = 0; x < 2 * info->portwidth; x++) {
285 debug ("addr[%x] = 0x%x\n", x, addr[x]);
288 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
289 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
291 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
292 addr[info->portwidth - 1]);
295 debug ("retval = 0x%x\n", retval);
299 /*-----------------------------------------------------------------------
300 * read a long word by picking the least significant byte of each maximum
301 * port size word. Swap for ppc format.
303 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
311 addr = flash_make_addr (info, sect, offset);
314 debug ("long addr is at %p info->portwidth = %d\n", addr,
316 for (x = 0; x < 4 * info->portwidth; x++) {
317 debug ("addr[%x] = 0x%x\n", x, addr[x]);
320 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
321 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
322 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
324 retval = (addr[(2 * info->portwidth) - 1] << 24) |
325 (addr[(info->portwidth) - 1] << 16) |
326 (addr[(4 * info->portwidth) - 1] << 8) |
327 addr[(3 * info->portwidth) - 1];
333 /*-----------------------------------------------------------------------
335 unsigned long flash_init (void)
337 unsigned long size = 0;
340 #ifdef CFG_FLASH_PROTECTION
341 char *s = getenv("unlock");
344 /* Init: no FLASHes known */
345 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
346 flash_info[i].flash_id = FLASH_UNKNOWN;
347 size += flash_info[i].size = flash_get_size (bank_base[i], i);
348 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
349 #ifndef CFG_FLASH_QUIET_TEST
350 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
351 i+1, flash_info[i].size, flash_info[i].size << 20);
352 #endif /* CFG_FLASH_QUIET_TEST */
354 #ifdef CFG_FLASH_PROTECTION
355 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
357 * Only the U-Boot image and it's environment is protected,
358 * all other sectors are unprotected (unlocked) if flash
359 * hardware protection is used (CFG_FLASH_PROTECTION) and
360 * the environment variable "unlock" is set to "yes".
362 if (flash_info[i].legacy_unlock) {
366 * Disable legacy_unlock temporarily, since
367 * flash_real_protect would relock all other sectors
370 flash_info[i].legacy_unlock = 0;
373 * Legacy unlocking (e.g. Intel J3) -> unlock only one
374 * sector. This will unlock all sectors.
376 flash_real_protect (&flash_info[i], 0, 0);
378 flash_info[i].legacy_unlock = 1;
381 * Manually mark other sectors as unlocked (unprotected)
383 for (k = 1; k < flash_info[i].sector_count; k++)
384 flash_info[i].protect[k] = 0;
387 * No legancy unlocking -> unlock all sectors
389 flash_protect (FLAG_PROTECT_CLEAR,
390 flash_info[i].start[0],
391 flash_info[i].start[0] + flash_info[i].size - 1,
395 #endif /* CFG_FLASH_PROTECTION */
398 /* Monitor protection ON by default */
399 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
400 flash_protect (FLAG_PROTECT_SET,
402 CFG_MONITOR_BASE + monitor_flash_len - 1,
403 flash_get_info(CFG_MONITOR_BASE));
406 /* Environment protection ON by default */
407 #ifdef CFG_ENV_IS_IN_FLASH
408 flash_protect (FLAG_PROTECT_SET,
410 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
411 flash_get_info(CFG_ENV_ADDR));
414 /* Redundant environment protection ON by default */
415 #ifdef CFG_ENV_ADDR_REDUND
416 flash_protect (FLAG_PROTECT_SET,
418 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
419 flash_get_info(CFG_ENV_ADDR_REDUND));
424 /*-----------------------------------------------------------------------
426 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
427 static flash_info_t *flash_get_info(ulong base)
430 flash_info_t * info = 0;
432 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
433 info = & flash_info[i];
434 if (info->size && info->start[0] <= base &&
435 base <= info->start[0] + info->size - 1)
439 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
443 /*-----------------------------------------------------------------------
445 int flash_erase (flash_info_t * info, int s_first, int s_last)
451 if (info->flash_id != FLASH_MAN_CFI) {
452 puts ("Can't erase unknown flash type - aborted\n");
455 if ((s_first < 0) || (s_first > s_last)) {
456 puts ("- no sectors to erase\n");
461 for (sect = s_first; sect <= s_last; ++sect) {
462 if (info->protect[sect]) {
467 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
473 for (sect = s_first; sect <= s_last; sect++) {
474 if (info->protect[sect] == 0) { /* not protected */
475 switch (info->vendor) {
476 case CFI_CMDSET_INTEL_STANDARD:
477 case CFI_CMDSET_INTEL_EXTENDED:
478 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
479 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
480 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
482 case CFI_CMDSET_AMD_STANDARD:
483 case CFI_CMDSET_AMD_EXTENDED:
484 flash_unlock_seq (info, sect);
485 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
486 AMD_CMD_ERASE_START);
487 flash_unlock_seq (info, sect);
488 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
491 debug ("Unkown flash vendor %d\n",
496 if (flash_full_status_check
497 (info, sect, info->erase_blk_tout, "erase")) {
507 /*-----------------------------------------------------------------------
509 void flash_print_info (flash_info_t * info)
513 if (info->flash_id != FLASH_MAN_CFI) {
514 puts ("missing or unknown FLASH type\n");
518 printf ("CFI conformant FLASH (%d x %d)",
519 (info->portwidth << 3), (info->chipwidth << 3));
520 printf (" Size: %ld MB in %d Sectors\n",
521 info->size >> 20, info->sector_count);
523 switch (info->vendor) {
524 case CFI_CMDSET_INTEL_STANDARD:
525 printf ("Intel Standard");
527 case CFI_CMDSET_INTEL_EXTENDED:
528 printf ("Intel Extended");
530 case CFI_CMDSET_AMD_STANDARD:
531 printf ("AMD Standard");
533 case CFI_CMDSET_AMD_EXTENDED:
534 printf ("AMD Extended");
537 printf ("Unknown (%d)", info->vendor);
540 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
541 info->manufacturer_id, info->device_id);
542 if (info->device_id == 0x7E) {
543 printf("%04X", info->device_id2);
545 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
546 info->erase_blk_tout,
548 if (info->buffer_size > 1) {
549 printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n",
550 info->buffer_write_tout,
554 puts ("\n Sector Start Addresses:");
555 for (i = 0; i < info->sector_count; ++i) {
558 #ifdef CFG_FLASH_EMPTY_INFO
562 volatile unsigned long *flash;
565 * Check if whole sector is erased
567 if (i != (info->sector_count - 1))
568 size = info->start[i + 1] - info->start[i];
570 size = info->start[0] + info->size - info->start[i];
572 flash = (volatile unsigned long *) info->start[i];
573 size = size >> 2; /* divide by 4 for longword access */
574 for (k = 0; k < size; k++) {
575 if (*flash++ != 0xffffffff) {
581 /* print empty and read-only info */
582 printf (" %08lX %c %s ",
585 info->protect[i] ? "RO" : " ");
586 #else /* ! CFG_FLASH_EMPTY_INFO */
587 printf (" %08lX %s ",
589 info->protect[i] ? "RO" : " ");
596 /*-----------------------------------------------------------------------
597 * Copy memory to flash, returns:
600 * 2 - Flash not erased
602 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
610 #ifdef CFG_FLASH_USE_BUFFER_WRITE
613 /* get lower aligned address */
614 /* get lower aligned address */
615 wp = (addr & ~(info->portwidth - 1));
617 /* handle unaligned start */
618 if ((aln = addr - wp) != 0) {
621 for (i = 0; i < aln; ++i, ++cp)
622 flash_add_byte (info, &cword, (*(uchar *) cp));
624 for (; (i < info->portwidth) && (cnt > 0); i++) {
625 flash_add_byte (info, &cword, *src++);
629 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
630 flash_add_byte (info, &cword, (*(uchar *) cp));
631 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
636 /* handle the aligned part */
637 #ifdef CFG_FLASH_USE_BUFFER_WRITE
638 buffered_size = (info->portwidth / info->chipwidth);
639 buffered_size *= info->buffer_size;
640 while (cnt >= info->portwidth) {
641 /* prohibit buffer write when buffer_size is 1 */
642 if (info->buffer_size == 1) {
644 for (i = 0; i < info->portwidth; i++)
645 flash_add_byte (info, &cword, *src++);
646 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
648 wp += info->portwidth;
649 cnt -= info->portwidth;
653 /* write buffer until next buffered_size aligned boundary */
654 i = buffered_size - (wp % buffered_size);
657 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
659 i -= i & (info->portwidth - 1);
665 while (cnt >= info->portwidth) {
667 for (i = 0; i < info->portwidth; i++) {
668 flash_add_byte (info, &cword, *src++);
670 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
672 wp += info->portwidth;
673 cnt -= info->portwidth;
675 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
681 * handle unaligned tail bytes
684 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
685 flash_add_byte (info, &cword, *src++);
688 for (; i < info->portwidth; ++i, ++cp) {
689 flash_add_byte (info, &cword, (*(uchar *) cp));
692 return flash_write_cfiword (info, wp, cword);
695 /*-----------------------------------------------------------------------
697 #ifdef CFG_FLASH_PROTECTION
699 int flash_real_protect (flash_info_t * info, long sector, int prot)
703 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
704 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
706 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
708 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
711 flash_full_status_check (info, sector, info->erase_blk_tout,
712 prot ? "protect" : "unprotect")) == 0) {
714 info->protect[sector] = prot;
717 * On some of Intel's flash chips (marked via legacy_unlock)
718 * unprotect unprotects all locking.
720 if ((prot == 0) && (info->legacy_unlock)) {
723 for (i = 0; i < info->sector_count; i++) {
724 if (info->protect[i])
725 flash_real_protect (info, i, 1);
732 /*-----------------------------------------------------------------------
733 * flash_read_user_serial - read the OneTimeProgramming cells
735 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
742 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
743 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
744 memcpy (dst, src + offset, len);
745 flash_write_cmd (info, 0, 0, info->cmd_reset);
749 * flash_read_factory_serial - read the device Id from the protection area
751 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
756 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
757 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
758 memcpy (buffer, src + offset, len);
759 flash_write_cmd (info, 0, 0, info->cmd_reset);
762 #endif /* CFG_FLASH_PROTECTION */
765 * flash_is_busy - check to see if the flash is busy
766 * This routine checks the status of the chip and returns true if the chip is busy
768 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
772 switch (info->vendor) {
773 case CFI_CMDSET_INTEL_STANDARD:
774 case CFI_CMDSET_INTEL_EXTENDED:
775 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
777 case CFI_CMDSET_AMD_STANDARD:
778 case CFI_CMDSET_AMD_EXTENDED:
779 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
784 debug ("flash_is_busy: %d\n", retval);
788 /*-----------------------------------------------------------------------
789 * wait for XSR.7 to be set. Time out with an error if it does not.
790 * This routine does not set the flash to read-array mode.
792 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
793 ulong tout, char *prompt)
801 /* Wait for command completion */
802 start = get_timer (0);
803 while (flash_is_busy (info, sector)) {
804 if (get_timer (start) > tout) {
805 printf ("Flash %s timeout at address %lx data %lx\n",
806 prompt, info->start[sector],
807 flash_read_long (info, sector, 0));
808 flash_write_cmd (info, sector, 0, info->cmd_reset);
811 udelay (1); /* also triggers watchdog */
816 /*-----------------------------------------------------------------------
817 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
818 * This routine sets the flash to read-array mode.
820 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
821 ulong tout, char *prompt)
825 retcode = flash_status_check (info, sector, tout, prompt);
826 switch (info->vendor) {
827 case CFI_CMDSET_INTEL_EXTENDED:
828 case CFI_CMDSET_INTEL_STANDARD:
829 if ((retcode == ERR_OK)
830 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
832 printf ("Flash %s error at address %lx\n", prompt,
833 info->start[sector]);
834 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
835 puts ("Command Sequence Error.\n");
836 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
837 puts ("Block Erase Error.\n");
838 retcode = ERR_NOT_ERASED;
839 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
840 puts ("Locking Error\n");
842 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
843 puts ("Block locked.\n");
844 retcode = ERR_PROTECTED;
846 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
847 puts ("Vpp Low Error.\n");
849 flash_write_cmd (info, sector, 0, info->cmd_reset);
857 /*-----------------------------------------------------------------------
859 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
861 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
864 unsigned long long ll;
867 switch (info->portwidth) {
871 case FLASH_CFI_16BIT:
872 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
875 cword->w = (cword->w >> 8) | w;
877 cword->w = (cword->w << 8) | c;
880 case FLASH_CFI_32BIT:
881 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
884 cword->l = (cword->l >> 8) | l;
886 cword->l = (cword->l << 8) | c;
889 case FLASH_CFI_64BIT:
890 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
893 cword->ll = (cword->ll >> 8) | ll;
895 cword->ll = (cword->ll << 8) | c;
902 /*-----------------------------------------------------------------------
903 * make a proper sized command based on the port and chip widths
905 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
908 uchar *cp = (uchar *) cmdbuf;
910 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
911 for (i = info->portwidth; i > 0; i--)
913 for (i = 1; i <= info->portwidth; i++)
915 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
919 * Write a proper sized command to the correct address
921 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
924 volatile cfiptr_t addr;
927 addr.cp = flash_make_addr (info, sect, offset);
928 flash_make_cmd (info, cmd, &cword);
929 switch (info->portwidth) {
931 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
932 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
934 #ifdef CONFIG_BLACKFIN
938 case FLASH_CFI_16BIT:
939 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
941 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
943 #ifdef CONFIG_BLACKFIN
947 case FLASH_CFI_32BIT:
948 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
950 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
952 #ifdef CONFIG_BLACKFIN
956 case FLASH_CFI_64BIT:
961 print_longlong (str, cword.ll);
963 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
965 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
968 *addr.llp = cword.ll;
969 #ifdef CONFIG_BLACKFIN
976 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
978 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
979 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
982 /*-----------------------------------------------------------------------
984 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
990 cptr.cp = flash_make_addr (info, sect, offset);
991 flash_make_cmd (info, cmd, &cword);
993 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
994 switch (info->portwidth) {
996 debug ("is= %x %x\n", cptr.cp[0], cword.c);
997 retval = (cptr.cp[0] == cword.c);
999 case FLASH_CFI_16BIT:
1000 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1001 retval = (cptr.wp[0] == cword.w);
1003 case FLASH_CFI_32BIT:
1004 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1005 retval = (cptr.lp[0] == cword.l);
1007 case FLASH_CFI_64BIT:
1013 print_longlong (str1, cptr.llp[0]);
1014 print_longlong (str2, cword.ll);
1015 debug ("is= %s %s\n", str1, str2);
1018 retval = (cptr.llp[0] == cword.ll);
1027 /*-----------------------------------------------------------------------
1029 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1035 cptr.cp = flash_make_addr (info, sect, offset);
1036 flash_make_cmd (info, cmd, &cword);
1037 switch (info->portwidth) {
1038 case FLASH_CFI_8BIT:
1039 retval = ((cptr.cp[0] & cword.c) == cword.c);
1041 case FLASH_CFI_16BIT:
1042 retval = ((cptr.wp[0] & cword.w) == cword.w);
1044 case FLASH_CFI_32BIT:
1045 retval = ((cptr.lp[0] & cword.l) == cword.l);
1047 case FLASH_CFI_64BIT:
1048 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1057 /*-----------------------------------------------------------------------
1059 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1065 cptr.cp = flash_make_addr (info, sect, offset);
1066 flash_make_cmd (info, cmd, &cword);
1067 switch (info->portwidth) {
1068 case FLASH_CFI_8BIT:
1069 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1071 case FLASH_CFI_16BIT:
1072 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1074 case FLASH_CFI_32BIT:
1075 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1077 case FLASH_CFI_64BIT:
1078 retval = ((cptr.llp[0] & cword.ll) !=
1079 (cptr.llp[0] & cword.ll));
1088 /*-----------------------------------------------------------------------
1089 * read jedec ids from device and set corresponding fields in info struct
1091 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1094 static void flash_read_jedec_ids (flash_info_t * info)
1096 info->manufacturer_id = 0;
1097 info->device_id = 0;
1098 info->device_id2 = 0;
1100 switch (info->vendor) {
1101 case CFI_CMDSET_INTEL_STANDARD:
1102 case CFI_CMDSET_INTEL_EXTENDED:
1103 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1104 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1105 udelay(1000); /* some flash are slow to respond */
1106 info->manufacturer_id = flash_read_uchar (info,
1107 FLASH_OFFSET_MANUFACTURER_ID);
1108 info->device_id = flash_read_uchar (info,
1109 FLASH_OFFSET_DEVICE_ID);
1110 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1112 case CFI_CMDSET_AMD_STANDARD:
1113 case CFI_CMDSET_AMD_EXTENDED:
1114 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1115 flash_unlock_seq(info, 0);
1116 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1117 udelay(1000); /* some flash are slow to respond */
1118 info->manufacturer_id = flash_read_uchar (info,
1119 FLASH_OFFSET_MANUFACTURER_ID);
1120 info->device_id = flash_read_uchar (info,
1121 FLASH_OFFSET_DEVICE_ID);
1122 if (info->device_id == 0x7E) {
1123 /* AMD 3-byte (expanded) device ids */
1124 info->device_id2 = flash_read_uchar (info,
1125 FLASH_OFFSET_DEVICE_ID2);
1126 info->device_id2 <<= 8;
1127 info->device_id2 |= flash_read_uchar (info,
1128 FLASH_OFFSET_DEVICE_ID3);
1130 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1137 /*-----------------------------------------------------------------------
1138 * detect if flash is compatible with the Common Flash Interface (CFI)
1139 * http://www.jedec.org/download/search/jesd68.pdf
1142 static int flash_detect_cfi (flash_info_t * info)
1145 debug ("flash detect cfi\n");
1147 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1148 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1149 for (info->chipwidth = FLASH_CFI_BY8;
1150 info->chipwidth <= info->portwidth;
1151 info->chipwidth <<= 1) {
1152 flash_write_cmd (info, 0, 0, info->cmd_reset);
1153 for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1154 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1155 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1156 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1157 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1158 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1159 info->cfi_offset=flash_offset_cfi[cfi_offset];
1160 debug ("device interface is %d\n",
1162 debug ("found port %d chip %d ",
1163 info->portwidth, info->chipwidth);
1164 debug ("port %d bits chip %d bits\n",
1165 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1166 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1172 debug ("not found\n");
1177 * The following code cannot be run from FLASH!
1180 ulong flash_get_size (ulong base, int banknum)
1182 flash_info_t *info = &flash_info[banknum];
1184 flash_sect_t sect_cnt;
1185 unsigned long sector;
1188 uchar num_erase_regions;
1189 int erase_region_size;
1190 int erase_region_count;
1191 int geometry_reversed = 0;
1194 info->cfi_version = 0;
1195 #ifdef CFG_FLASH_PROTECTION
1196 info->legacy_unlock = 0;
1199 info->start[0] = base;
1201 if (flash_detect_cfi (info)) {
1202 info->vendor = flash_read_ushort (info, 0,
1203 FLASH_OFFSET_PRIMARY_VENDOR);
1204 flash_read_jedec_ids (info);
1205 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1206 num_erase_regions = flash_read_uchar (info,
1207 FLASH_OFFSET_NUM_ERASE_REGIONS);
1208 info->ext_addr = flash_read_ushort (info, 0,
1209 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1210 if (info->ext_addr) {
1211 info->cfi_version = (ushort) flash_read_uchar (info,
1212 info->ext_addr + 3) << 8;
1213 info->cfi_version |= (ushort) flash_read_uchar (info,
1214 info->ext_addr + 4);
1217 flash_printqry (info, 0);
1219 switch (info->vendor) {
1220 case CFI_CMDSET_INTEL_STANDARD:
1221 case CFI_CMDSET_INTEL_EXTENDED:
1223 info->cmd_reset = FLASH_CMD_RESET;
1224 #ifdef CFG_FLASH_PROTECTION
1225 /* read legacy lock/unlock bit from intel flash */
1226 if (info->ext_addr) {
1227 info->legacy_unlock = flash_read_uchar (info,
1228 info->ext_addr + 5) & 0x08;
1232 case CFI_CMDSET_AMD_STANDARD:
1233 case CFI_CMDSET_AMD_EXTENDED:
1234 info->cmd_reset = AMD_CMD_RESET;
1235 /* check if flash geometry needs reversal */
1236 if (num_erase_regions <= 1)
1238 /* reverse geometry if top boot part */
1239 if (info->cfi_version < 0x3131) {
1240 /* CFI < 1.1, try to guess from device id */
1241 if ((info->device_id & 0x80) != 0) {
1242 geometry_reversed = 1;
1246 /* CFI >= 1.1, deduct from top/bottom flag */
1247 /* note: ext_addr is valid since cfi_version > 0 */
1248 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1249 geometry_reversed = 1;
1254 debug ("manufacturer is %d\n", info->vendor);
1255 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1256 debug ("device id is 0x%x\n", info->device_id);
1257 debug ("device id2 is 0x%x\n", info->device_id2);
1258 debug ("cfi version is 0x%04x\n", info->cfi_version);
1260 size_ratio = info->portwidth / info->chipwidth;
1261 /* if the chip is x8/x16 reduce the ratio by half */
1262 if ((info->interface == FLASH_CFI_X8X16)
1263 && (info->chipwidth == FLASH_CFI_BY8)) {
1266 debug ("size_ratio %d port %d bits chip %d bits\n",
1267 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1268 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1269 debug ("found %d erase regions\n", num_erase_regions);
1272 for (i = 0; i < num_erase_regions; i++) {
1273 if (i > NUM_ERASE_REGIONS) {
1274 printf ("%d erase regions found, only %d used\n",
1275 num_erase_regions, NUM_ERASE_REGIONS);
1278 if (geometry_reversed)
1279 tmp = flash_read_long (info, 0,
1280 FLASH_OFFSET_ERASE_REGIONS +
1281 (num_erase_regions - 1 - i) * 4);
1283 tmp = flash_read_long (info, 0,
1284 FLASH_OFFSET_ERASE_REGIONS +
1287 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1289 erase_region_count = (tmp & 0xffff) + 1;
1290 debug ("erase_region_count = %d erase_region_size = %d\n",
1291 erase_region_count, erase_region_size);
1292 for (j = 0; j < erase_region_count; j++) {
1293 info->start[sect_cnt] = sector;
1294 sector += (erase_region_size * size_ratio);
1297 * Only read protection status from supported devices (intel...)
1299 switch (info->vendor) {
1300 case CFI_CMDSET_INTEL_EXTENDED:
1301 case CFI_CMDSET_INTEL_STANDARD:
1302 info->protect[sect_cnt] =
1303 flash_isset (info, sect_cnt,
1304 FLASH_OFFSET_PROTECT,
1305 FLASH_STATUS_PROTECT);
1308 info->protect[sect_cnt] = 0; /* default: not protected */
1315 info->sector_count = sect_cnt;
1316 /* multiply the size by the number of chips */
1317 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1318 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1319 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1320 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1321 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1322 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1323 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1324 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1325 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1326 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1327 info->flash_id = FLASH_MAN_CFI;
1328 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1329 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1333 flash_write_cmd (info, 0, 0, info->cmd_reset);
1334 return (info->size);
1337 /* loop through the sectors from the highest address
1338 * when the passed address is greater or equal to the sector address
1341 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1343 flash_sect_t sector;
1345 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1346 if (addr >= info->start[sector])
1352 /*-----------------------------------------------------------------------
1354 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1361 ctladdr.cp = flash_make_addr (info, 0, 0);
1362 cptr.cp = (uchar *) dest;
1364 /* Check if Flash is (sufficiently) erased */
1365 switch (info->portwidth) {
1366 case FLASH_CFI_8BIT:
1367 flag = ((cptr.cp[0] & cword.c) == cword.c);
1369 case FLASH_CFI_16BIT:
1370 flag = ((cptr.wp[0] & cword.w) == cword.w);
1372 case FLASH_CFI_32BIT:
1373 flag = ((cptr.lp[0] & cword.l) == cword.l);
1375 case FLASH_CFI_64BIT:
1376 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1384 /* Disable interrupts which might cause a timeout here */
1385 flag = disable_interrupts ();
1387 switch (info->vendor) {
1388 case CFI_CMDSET_INTEL_EXTENDED:
1389 case CFI_CMDSET_INTEL_STANDARD:
1390 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1391 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1393 case CFI_CMDSET_AMD_EXTENDED:
1394 case CFI_CMDSET_AMD_STANDARD:
1395 flash_unlock_seq (info, 0);
1396 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1400 switch (info->portwidth) {
1401 case FLASH_CFI_8BIT:
1402 cptr.cp[0] = cword.c;
1404 case FLASH_CFI_16BIT:
1405 cptr.wp[0] = cword.w;
1407 case FLASH_CFI_32BIT:
1408 cptr.lp[0] = cword.l;
1410 case FLASH_CFI_64BIT:
1411 cptr.llp[0] = cword.ll;
1415 /* re-enable interrupts if necessary */
1417 enable_interrupts ();
1419 return flash_full_status_check (info, find_sector (info, dest),
1420 info->write_tout, "write");
1423 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1425 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1428 flash_sect_t sector;
1431 volatile cfiptr_t src;
1432 volatile cfiptr_t dst;
1434 switch (info->vendor) {
1435 case CFI_CMDSET_INTEL_STANDARD:
1436 case CFI_CMDSET_INTEL_EXTENDED:
1438 dst.cp = (uchar *) dest;
1439 sector = find_sector (info, dest);
1440 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1441 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1442 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1443 "write to buffer")) == ERR_OK) {
1444 /* reduce the number of loops by the width of the port */
1445 switch (info->portwidth) {
1446 case FLASH_CFI_8BIT:
1449 case FLASH_CFI_16BIT:
1452 case FLASH_CFI_32BIT:
1455 case FLASH_CFI_64BIT:
1462 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1464 switch (info->portwidth) {
1465 case FLASH_CFI_8BIT:
1466 *dst.cp++ = *src.cp++;
1468 case FLASH_CFI_16BIT:
1469 *dst.wp++ = *src.wp++;
1471 case FLASH_CFI_32BIT:
1472 *dst.lp++ = *src.lp++;
1474 case FLASH_CFI_64BIT:
1475 *dst.llp++ = *src.llp++;
1482 flash_write_cmd (info, sector, 0,
1483 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1484 retcode = flash_full_status_check (info, sector,
1485 info->buffer_write_tout,
1490 case CFI_CMDSET_AMD_STANDARD:
1491 case CFI_CMDSET_AMD_EXTENDED:
1493 dst.cp = (uchar *) dest;
1494 sector = find_sector (info, dest);
1496 flash_unlock_seq(info,0);
1497 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1499 switch (info->portwidth) {
1500 case FLASH_CFI_8BIT:
1502 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1503 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1505 case FLASH_CFI_16BIT:
1507 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1508 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1510 case FLASH_CFI_32BIT:
1512 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1513 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1515 case FLASH_CFI_64BIT:
1517 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1518 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1524 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1525 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1530 debug ("Unknown Command Set\n");
1534 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1536 #endif /* CFG_FLASH_CFI */