2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
39 #include <asm/byteorder.h>
40 #include <environment.h>
41 #ifdef CFG_FLASH_CFI_DRIVER
44 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
45 * The width of the port and the width of the chips are determined at initialization.
46 * These widths are used to calculate the address for access CFI data structures.
49 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
50 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
51 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
52 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
53 * AMD CFI Specification, Release 2.0 December 1, 2001
54 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
55 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
59 #ifndef CFG_FLASH_BANKS_LIST
60 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
63 #define FLASH_CMD_CFI 0x98
64 #define FLASH_CMD_READ_ID 0x90
65 #define FLASH_CMD_RESET 0xff
66 #define FLASH_CMD_BLOCK_ERASE 0x20
67 #define FLASH_CMD_ERASE_CONFIRM 0xD0
68 #define FLASH_CMD_WRITE 0x40
69 #define FLASH_CMD_PROTECT 0x60
70 #define FLASH_CMD_PROTECT_SET 0x01
71 #define FLASH_CMD_PROTECT_CLEAR 0xD0
72 #define FLASH_CMD_CLEAR_STATUS 0x50
73 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
74 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
76 #define FLASH_STATUS_DONE 0x80
77 #define FLASH_STATUS_ESS 0x40
78 #define FLASH_STATUS_ECLBS 0x20
79 #define FLASH_STATUS_PSLBS 0x10
80 #define FLASH_STATUS_VPENS 0x08
81 #define FLASH_STATUS_PSS 0x04
82 #define FLASH_STATUS_DPS 0x02
83 #define FLASH_STATUS_R 0x01
84 #define FLASH_STATUS_PROTECT 0x01
86 #define AMD_CMD_RESET 0xF0
87 #define AMD_CMD_WRITE 0xA0
88 #define AMD_CMD_ERASE_START 0x80
89 #define AMD_CMD_ERASE_SECTOR 0x30
90 #define AMD_CMD_UNLOCK_START 0xAA
91 #define AMD_CMD_UNLOCK_ACK 0x55
92 #define AMD_CMD_WRITE_TO_BUFFER 0x25
93 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
95 #define AMD_STATUS_TOGGLE 0x40
96 #define AMD_STATUS_ERROR 0x20
98 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
99 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
100 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
102 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
103 #define FLASH_OFFSET_DEVICE_ID 0x01
104 #define FLASH_OFFSET_DEVICE_ID2 0x0E
105 #define FLASH_OFFSET_DEVICE_ID3 0x0F
106 #define FLASH_OFFSET_CFI 0x55
107 #define FLASH_OFFSET_CFI_ALT 0x555
108 #define FLASH_OFFSET_CFI_RESP 0x10
109 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
110 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
111 #define FLASH_OFFSET_WTOUT 0x1F
112 #define FLASH_OFFSET_WBTOUT 0x20
113 #define FLASH_OFFSET_ETOUT 0x21
114 #define FLASH_OFFSET_CETOUT 0x22
115 #define FLASH_OFFSET_WMAX_TOUT 0x23
116 #define FLASH_OFFSET_WBMAX_TOUT 0x24
117 #define FLASH_OFFSET_EMAX_TOUT 0x25
118 #define FLASH_OFFSET_CEMAX_TOUT 0x26
119 #define FLASH_OFFSET_SIZE 0x27
120 #define FLASH_OFFSET_INTERFACE 0x28
121 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
122 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
123 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
124 #define FLASH_OFFSET_PROTECT 0x02
125 #define FLASH_OFFSET_USER_PROTECTION 0x85
126 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
128 #define CFI_CMDSET_NONE 0
129 #define CFI_CMDSET_INTEL_EXTENDED 1
130 #define CFI_CMDSET_AMD_STANDARD 2
131 #define CFI_CMDSET_INTEL_STANDARD 3
132 #define CFI_CMDSET_AMD_EXTENDED 4
133 #define CFI_CMDSET_MITSU_STANDARD 256
134 #define CFI_CMDSET_MITSU_EXTENDED 257
135 #define CFI_CMDSET_SST 258
137 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
138 # undef FLASH_CMD_RESET
139 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
146 unsigned long long ll;
150 volatile unsigned char *cp;
151 volatile unsigned short *wp;
152 volatile unsigned long *lp;
153 volatile unsigned long long *llp;
156 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
158 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
160 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
161 #ifdef CFG_MAX_FLASH_BANKS_DETECT
162 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
163 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
165 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
166 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
170 * Check if chip width is defined. If not, start detecting with 8bit.
172 #ifndef CFG_FLASH_CFI_WIDTH
173 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
177 /*-----------------------------------------------------------------------
181 typedef unsigned long flash_sect_t;
183 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
184 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
185 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
186 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
187 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
188 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
189 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190 static void flash_read_jedec_ids (flash_info_t * info);
191 static int flash_detect_cfi (flash_info_t * info);
192 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
193 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
194 ulong tout, char *prompt);
195 ulong flash_get_size (ulong base, int banknum);
196 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
197 static flash_info_t *flash_get_info(ulong base);
199 #ifdef CFG_FLASH_USE_BUFFER_WRITE
200 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
203 /*-----------------------------------------------------------------------
204 * create an address based on the offset and the port width
206 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
208 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
212 /*-----------------------------------------------------------------------
215 void print_longlong (char *str, unsigned long long data)
220 cp = (unsigned char *) &data;
221 for (i = 0; i < 8; i++)
222 sprintf (&str[i * 2], "%2.2x", *cp++);
224 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
229 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
231 flash_make_addr (info, sect,
232 x + FLASH_OFFSET_CFI_RESP);
233 debug ("%p : ", cptr.cp);
234 for (y = 0; y < 16; y++) {
235 debug ("%2.2x ", cptr.cp[y]);
238 for (y = 0; y < 16; y++) {
239 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
240 debug ("%c", cptr.cp[y]);
251 /*-----------------------------------------------------------------------
252 * read a character at a port width address
254 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
258 cp = flash_make_addr (info, 0, offset);
259 #if defined(__LITTLE_ENDIAN)
262 return (cp[info->portwidth - 1]);
266 /*-----------------------------------------------------------------------
267 * read a short word by swapping for ppc format.
269 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
277 addr = flash_make_addr (info, sect, offset);
280 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
282 for (x = 0; x < 2 * info->portwidth; x++) {
283 debug ("addr[%x] = 0x%x\n", x, addr[x]);
286 #if defined(__LITTLE_ENDIAN)
287 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
289 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
290 addr[info->portwidth - 1]);
293 debug ("retval = 0x%x\n", retval);
297 /*-----------------------------------------------------------------------
298 * read a long word by picking the least significant byte of each maximum
299 * port size word. Swap for ppc format.
301 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
309 addr = flash_make_addr (info, sect, offset);
312 debug ("long addr is at %p info->portwidth = %d\n", addr,
314 for (x = 0; x < 4 * info->portwidth; x++) {
315 debug ("addr[%x] = 0x%x\n", x, addr[x]);
318 #if defined(__LITTLE_ENDIAN)
319 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
320 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
322 retval = (addr[(2 * info->portwidth) - 1] << 24) |
323 (addr[(info->portwidth) - 1] << 16) |
324 (addr[(4 * info->portwidth) - 1] << 8) |
325 addr[(3 * info->portwidth) - 1];
331 /*-----------------------------------------------------------------------
333 unsigned long flash_init (void)
335 unsigned long size = 0;
338 #ifdef CFG_FLASH_PROTECTION
339 char *s = getenv("unlock");
342 /* Init: no FLASHes known */
343 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
344 flash_info[i].flash_id = FLASH_UNKNOWN;
345 size += flash_info[i].size = flash_get_size (bank_base[i], i);
346 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
347 #ifndef CFG_FLASH_QUIET_TEST
348 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
349 i+1, flash_info[i].size, flash_info[i].size << 20);
350 #endif /* CFG_FLASH_QUIET_TEST */
352 #ifdef CFG_FLASH_PROTECTION
353 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
355 * Only the U-Boot image and it's environment is protected,
356 * all other sectors are unprotected (unlocked) if flash
357 * hardware protection is used (CFG_FLASH_PROTECTION) and
358 * the environment variable "unlock" is set to "yes".
360 if (flash_info[i].legacy_unlock) {
364 * Disable legacy_unlock temporarily, since
365 * flash_real_protect would relock all other sectors
368 flash_info[i].legacy_unlock = 0;
371 * Legacy unlocking (e.g. Intel J3) -> unlock only one
372 * sector. This will unlock all sectors.
374 flash_real_protect (&flash_info[i], 0, 0);
376 flash_info[i].legacy_unlock = 1;
379 * Manually mark other sectors as unlocked (unprotected)
381 for (k = 1; k < flash_info[i].sector_count; k++)
382 flash_info[i].protect[k] = 0;
385 * No legancy unlocking -> unlock all sectors
387 flash_protect (FLAG_PROTECT_CLEAR,
388 flash_info[i].start[0],
389 flash_info[i].start[0] + flash_info[i].size - 1,
393 #endif /* CFG_FLASH_PROTECTION */
396 /* Monitor protection ON by default */
397 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
398 flash_protect (FLAG_PROTECT_SET,
400 CFG_MONITOR_BASE + monitor_flash_len - 1,
401 flash_get_info(CFG_MONITOR_BASE));
404 /* Environment protection ON by default */
405 #ifdef CFG_ENV_IS_IN_FLASH
406 flash_protect (FLAG_PROTECT_SET,
408 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
409 flash_get_info(CFG_ENV_ADDR));
412 /* Redundant environment protection ON by default */
413 #ifdef CFG_ENV_ADDR_REDUND
414 flash_protect (FLAG_PROTECT_SET,
416 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
417 flash_get_info(CFG_ENV_ADDR_REDUND));
422 /*-----------------------------------------------------------------------
424 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
425 static flash_info_t *flash_get_info(ulong base)
428 flash_info_t * info = 0;
430 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
431 info = & flash_info[i];
432 if (info->size && info->start[0] <= base &&
433 base <= info->start[0] + info->size - 1)
437 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
441 /*-----------------------------------------------------------------------
443 int flash_erase (flash_info_t * info, int s_first, int s_last)
449 if (info->flash_id != FLASH_MAN_CFI) {
450 puts ("Can't erase unknown flash type - aborted\n");
453 if ((s_first < 0) || (s_first > s_last)) {
454 puts ("- no sectors to erase\n");
459 for (sect = s_first; sect <= s_last; ++sect) {
460 if (info->protect[sect]) {
465 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
471 for (sect = s_first; sect <= s_last; sect++) {
472 if (info->protect[sect] == 0) { /* not protected */
473 switch (info->vendor) {
474 case CFI_CMDSET_INTEL_STANDARD:
475 case CFI_CMDSET_INTEL_EXTENDED:
476 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
477 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
478 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
480 case CFI_CMDSET_AMD_STANDARD:
481 case CFI_CMDSET_AMD_EXTENDED:
482 flash_unlock_seq (info, sect);
483 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
484 AMD_CMD_ERASE_START);
485 flash_unlock_seq (info, sect);
486 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
489 debug ("Unkown flash vendor %d\n",
494 if (flash_full_status_check
495 (info, sect, info->erase_blk_tout, "erase")) {
505 /*-----------------------------------------------------------------------
507 void flash_print_info (flash_info_t * info)
511 if (info->flash_id != FLASH_MAN_CFI) {
512 puts ("missing or unknown FLASH type\n");
516 printf ("CFI conformant FLASH (%d x %d)",
517 (info->portwidth << 3), (info->chipwidth << 3));
518 printf (" Size: %ld MB in %d Sectors\n",
519 info->size >> 20, info->sector_count);
521 switch (info->vendor) {
522 case CFI_CMDSET_INTEL_STANDARD:
523 printf ("Intel Standard");
525 case CFI_CMDSET_INTEL_EXTENDED:
526 printf ("Intel Extended");
528 case CFI_CMDSET_AMD_STANDARD:
529 printf ("AMD Standard");
531 case CFI_CMDSET_AMD_EXTENDED:
532 printf ("AMD Extended");
535 printf ("Unknown (%d)", info->vendor);
538 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
539 info->manufacturer_id, info->device_id);
540 if (info->device_id == 0x7E) {
541 printf("%04X", info->device_id2);
543 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
544 info->erase_blk_tout,
546 if (info->buffer_size > 1) {
547 printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n",
548 info->buffer_write_tout,
552 puts ("\n Sector Start Addresses:");
553 for (i = 0; i < info->sector_count; ++i) {
556 #ifdef CFG_FLASH_EMPTY_INFO
560 volatile unsigned long *flash;
563 * Check if whole sector is erased
565 if (i != (info->sector_count - 1))
566 size = info->start[i + 1] - info->start[i];
568 size = info->start[0] + info->size - info->start[i];
570 flash = (volatile unsigned long *) info->start[i];
571 size = size >> 2; /* divide by 4 for longword access */
572 for (k = 0; k < size; k++) {
573 if (*flash++ != 0xffffffff) {
579 /* print empty and read-only info */
580 printf (" %08lX %c %s ",
583 info->protect[i] ? "RO" : " ");
584 #else /* ! CFG_FLASH_EMPTY_INFO */
585 printf (" %08lX %s ",
587 info->protect[i] ? "RO" : " ");
594 /*-----------------------------------------------------------------------
595 * Copy memory to flash, returns:
598 * 2 - Flash not erased
600 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
608 #ifdef CFG_FLASH_USE_BUFFER_WRITE
611 /* get lower aligned address */
612 /* get lower aligned address */
613 wp = (addr & ~(info->portwidth - 1));
615 /* handle unaligned start */
616 if ((aln = addr - wp) != 0) {
619 for (i = 0; i < aln; ++i, ++cp)
620 flash_add_byte (info, &cword, (*(uchar *) cp));
622 for (; (i < info->portwidth) && (cnt > 0); i++) {
623 flash_add_byte (info, &cword, *src++);
627 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
628 flash_add_byte (info, &cword, (*(uchar *) cp));
629 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
634 /* handle the aligned part */
635 #ifdef CFG_FLASH_USE_BUFFER_WRITE
636 buffered_size = (info->portwidth / info->chipwidth);
637 buffered_size *= info->buffer_size;
638 while (cnt >= info->portwidth) {
639 /* prohibit buffer write when buffer_size is 1 */
640 if (info->buffer_size == 1) {
642 for (i = 0; i < info->portwidth; i++)
643 flash_add_byte (info, &cword, *src++);
644 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
646 wp += info->portwidth;
647 cnt -= info->portwidth;
651 /* write buffer until next buffered_size aligned boundary */
652 i = buffered_size - (wp % buffered_size);
655 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
657 i -= i & (info->portwidth - 1);
663 while (cnt >= info->portwidth) {
665 for (i = 0; i < info->portwidth; i++) {
666 flash_add_byte (info, &cword, *src++);
668 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
670 wp += info->portwidth;
671 cnt -= info->portwidth;
673 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
679 * handle unaligned tail bytes
682 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
683 flash_add_byte (info, &cword, *src++);
686 for (; i < info->portwidth; ++i, ++cp) {
687 flash_add_byte (info, &cword, (*(uchar *) cp));
690 return flash_write_cfiword (info, wp, cword);
693 /*-----------------------------------------------------------------------
695 #ifdef CFG_FLASH_PROTECTION
697 int flash_real_protect (flash_info_t * info, long sector, int prot)
701 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
702 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
704 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
706 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
709 flash_full_status_check (info, sector, info->erase_blk_tout,
710 prot ? "protect" : "unprotect")) == 0) {
712 info->protect[sector] = prot;
715 * On some of Intel's flash chips (marked via legacy_unlock)
716 * unprotect unprotects all locking.
718 if ((prot == 0) && (info->legacy_unlock)) {
721 for (i = 0; i < info->sector_count; i++) {
722 if (info->protect[i])
723 flash_real_protect (info, i, 1);
730 /*-----------------------------------------------------------------------
731 * flash_read_user_serial - read the OneTimeProgramming cells
733 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
740 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
741 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
742 memcpy (dst, src + offset, len);
743 flash_write_cmd (info, 0, 0, info->cmd_reset);
747 * flash_read_factory_serial - read the device Id from the protection area
749 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
754 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
755 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
756 memcpy (buffer, src + offset, len);
757 flash_write_cmd (info, 0, 0, info->cmd_reset);
760 #endif /* CFG_FLASH_PROTECTION */
763 * flash_is_busy - check to see if the flash is busy
764 * This routine checks the status of the chip and returns true if the chip is busy
766 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
770 switch (info->vendor) {
771 case CFI_CMDSET_INTEL_STANDARD:
772 case CFI_CMDSET_INTEL_EXTENDED:
773 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
775 case CFI_CMDSET_AMD_STANDARD:
776 case CFI_CMDSET_AMD_EXTENDED:
777 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
782 debug ("flash_is_busy: %d\n", retval);
786 /*-----------------------------------------------------------------------
787 * wait for XSR.7 to be set. Time out with an error if it does not.
788 * This routine does not set the flash to read-array mode.
790 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
791 ulong tout, char *prompt)
799 /* Wait for command completion */
800 start = get_timer (0);
801 while (flash_is_busy (info, sector)) {
802 if (get_timer (start) > tout) {
803 printf ("Flash %s timeout at address %lx data %lx\n",
804 prompt, info->start[sector],
805 flash_read_long (info, sector, 0));
806 flash_write_cmd (info, sector, 0, info->cmd_reset);
809 udelay (1); /* also triggers watchdog */
814 /*-----------------------------------------------------------------------
815 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
816 * This routine sets the flash to read-array mode.
818 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
819 ulong tout, char *prompt)
823 retcode = flash_status_check (info, sector, tout, prompt);
824 switch (info->vendor) {
825 case CFI_CMDSET_INTEL_EXTENDED:
826 case CFI_CMDSET_INTEL_STANDARD:
827 if ((retcode == ERR_OK)
828 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
830 printf ("Flash %s error at address %lx\n", prompt,
831 info->start[sector]);
832 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
833 puts ("Command Sequence Error.\n");
834 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
835 puts ("Block Erase Error.\n");
836 retcode = ERR_NOT_ERASED;
837 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
838 puts ("Locking Error\n");
840 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
841 puts ("Block locked.\n");
842 retcode = ERR_PROTECTED;
844 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
845 puts ("Vpp Low Error.\n");
847 flash_write_cmd (info, sector, 0, info->cmd_reset);
855 /*-----------------------------------------------------------------------
857 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
859 #if defined(__LITTLE_ENDIAN)
862 unsigned long long ll;
865 switch (info->portwidth) {
869 case FLASH_CFI_16BIT:
870 #if defined(__LITTLE_ENDIAN)
873 cword->w = (cword->w >> 8) | w;
875 cword->w = (cword->w << 8) | c;
878 case FLASH_CFI_32BIT:
879 #if defined(__LITTLE_ENDIAN)
882 cword->l = (cword->l >> 8) | l;
884 cword->l = (cword->l << 8) | c;
887 case FLASH_CFI_64BIT:
888 #if defined(__LITTLE_ENDIAN)
891 cword->ll = (cword->ll >> 8) | ll;
893 cword->ll = (cword->ll << 8) | c;
900 /*-----------------------------------------------------------------------
901 * make a proper sized command based on the port and chip widths
903 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
906 uchar *cp = (uchar *) cmdbuf;
908 #if defined(__LITTLE_ENDIAN)
909 for (i = info->portwidth; i > 0; i--)
911 for (i = 1; i <= info->portwidth; i++)
913 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
917 * Write a proper sized command to the correct address
919 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
922 volatile cfiptr_t addr;
925 addr.cp = flash_make_addr (info, sect, offset);
926 flash_make_cmd (info, cmd, &cword);
927 switch (info->portwidth) {
929 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
930 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
932 #ifdef CONFIG_BLACKFIN
936 case FLASH_CFI_16BIT:
937 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
939 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
941 #ifdef CONFIG_BLACKFIN
945 case FLASH_CFI_32BIT:
946 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
948 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
950 #ifdef CONFIG_BLACKFIN
954 case FLASH_CFI_64BIT:
959 print_longlong (str, cword.ll);
961 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
963 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
966 *addr.llp = cword.ll;
967 #ifdef CONFIG_BLACKFIN
974 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
976 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
977 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
980 /*-----------------------------------------------------------------------
982 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
988 cptr.cp = flash_make_addr (info, sect, offset);
989 flash_make_cmd (info, cmd, &cword);
991 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
992 switch (info->portwidth) {
994 debug ("is= %x %x\n", cptr.cp[0], cword.c);
995 retval = (cptr.cp[0] == cword.c);
997 case FLASH_CFI_16BIT:
998 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
999 retval = (cptr.wp[0] == cword.w);
1001 case FLASH_CFI_32BIT:
1002 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1003 retval = (cptr.lp[0] == cword.l);
1005 case FLASH_CFI_64BIT:
1011 print_longlong (str1, cptr.llp[0]);
1012 print_longlong (str2, cword.ll);
1013 debug ("is= %s %s\n", str1, str2);
1016 retval = (cptr.llp[0] == cword.ll);
1025 /*-----------------------------------------------------------------------
1027 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1033 cptr.cp = flash_make_addr (info, sect, offset);
1034 flash_make_cmd (info, cmd, &cword);
1035 switch (info->portwidth) {
1036 case FLASH_CFI_8BIT:
1037 retval = ((cptr.cp[0] & cword.c) == cword.c);
1039 case FLASH_CFI_16BIT:
1040 retval = ((cptr.wp[0] & cword.w) == cword.w);
1042 case FLASH_CFI_32BIT:
1043 retval = ((cptr.lp[0] & cword.l) == cword.l);
1045 case FLASH_CFI_64BIT:
1046 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1055 /*-----------------------------------------------------------------------
1057 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1063 cptr.cp = flash_make_addr (info, sect, offset);
1064 flash_make_cmd (info, cmd, &cword);
1065 switch (info->portwidth) {
1066 case FLASH_CFI_8BIT:
1067 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1069 case FLASH_CFI_16BIT:
1070 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1072 case FLASH_CFI_32BIT:
1073 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1075 case FLASH_CFI_64BIT:
1076 retval = ((cptr.llp[0] & cword.ll) !=
1077 (cptr.llp[0] & cword.ll));
1086 /*-----------------------------------------------------------------------
1087 * read jedec ids from device and set corresponding fields in info struct
1089 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1092 static void flash_read_jedec_ids (flash_info_t * info)
1094 info->manufacturer_id = 0;
1095 info->device_id = 0;
1096 info->device_id2 = 0;
1098 switch (info->vendor) {
1099 case CFI_CMDSET_INTEL_STANDARD:
1100 case CFI_CMDSET_INTEL_EXTENDED:
1101 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1102 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1103 udelay(1000); /* some flash are slow to respond */
1104 info->manufacturer_id = flash_read_uchar (info,
1105 FLASH_OFFSET_MANUFACTURER_ID);
1106 info->device_id = flash_read_uchar (info,
1107 FLASH_OFFSET_DEVICE_ID);
1108 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1110 case CFI_CMDSET_AMD_STANDARD:
1111 case CFI_CMDSET_AMD_EXTENDED:
1112 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1113 flash_unlock_seq(info, 0);
1114 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1115 udelay(1000); /* some flash are slow to respond */
1116 info->manufacturer_id = flash_read_uchar (info,
1117 FLASH_OFFSET_MANUFACTURER_ID);
1118 info->device_id = flash_read_uchar (info,
1119 FLASH_OFFSET_DEVICE_ID);
1120 if (info->device_id == 0x7E) {
1121 /* AMD 3-byte (expanded) device ids */
1122 info->device_id2 = flash_read_uchar (info,
1123 FLASH_OFFSET_DEVICE_ID2);
1124 info->device_id2 <<= 8;
1125 info->device_id2 |= flash_read_uchar (info,
1126 FLASH_OFFSET_DEVICE_ID3);
1128 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1135 /*-----------------------------------------------------------------------
1136 * detect if flash is compatible with the Common Flash Interface (CFI)
1137 * http://www.jedec.org/download/search/jesd68.pdf
1140 static int flash_detect_cfi (flash_info_t * info)
1143 debug ("flash detect cfi\n");
1145 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1146 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1147 for (info->chipwidth = FLASH_CFI_BY8;
1148 info->chipwidth <= info->portwidth;
1149 info->chipwidth <<= 1) {
1150 flash_write_cmd (info, 0, 0, info->cmd_reset);
1151 for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1152 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1153 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1154 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1155 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1156 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1157 info->cfi_offset=flash_offset_cfi[cfi_offset];
1158 debug ("device interface is %d\n",
1160 debug ("found port %d chip %d ",
1161 info->portwidth, info->chipwidth);
1162 debug ("port %d bits chip %d bits\n",
1163 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1164 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1170 debug ("not found\n");
1175 * The following code cannot be run from FLASH!
1178 ulong flash_get_size (ulong base, int banknum)
1180 flash_info_t *info = &flash_info[banknum];
1182 flash_sect_t sect_cnt;
1183 unsigned long sector;
1186 uchar num_erase_regions;
1187 int erase_region_size;
1188 int erase_region_count;
1189 int geometry_reversed = 0;
1192 info->cfi_version = 0;
1193 #ifdef CFG_FLASH_PROTECTION
1194 info->legacy_unlock = 0;
1197 info->start[0] = base;
1199 if (flash_detect_cfi (info)) {
1200 info->vendor = flash_read_ushort (info, 0,
1201 FLASH_OFFSET_PRIMARY_VENDOR);
1202 flash_read_jedec_ids (info);
1203 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1204 num_erase_regions = flash_read_uchar (info,
1205 FLASH_OFFSET_NUM_ERASE_REGIONS);
1206 info->ext_addr = flash_read_ushort (info, 0,
1207 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1208 if (info->ext_addr) {
1209 info->cfi_version = (ushort) flash_read_uchar (info,
1210 info->ext_addr + 3) << 8;
1211 info->cfi_version |= (ushort) flash_read_uchar (info,
1212 info->ext_addr + 4);
1215 flash_printqry (info, 0);
1217 switch (info->vendor) {
1218 case CFI_CMDSET_INTEL_STANDARD:
1219 case CFI_CMDSET_INTEL_EXTENDED:
1221 info->cmd_reset = FLASH_CMD_RESET;
1222 #ifdef CFG_FLASH_PROTECTION
1223 /* read legacy lock/unlock bit from intel flash */
1224 if (info->ext_addr) {
1225 info->legacy_unlock = flash_read_uchar (info,
1226 info->ext_addr + 5) & 0x08;
1230 case CFI_CMDSET_AMD_STANDARD:
1231 case CFI_CMDSET_AMD_EXTENDED:
1232 info->cmd_reset = AMD_CMD_RESET;
1233 /* check if flash geometry needs reversal */
1234 if (num_erase_regions <= 1)
1236 /* reverse geometry if top boot part */
1237 if (info->cfi_version < 0x3131) {
1238 /* CFI < 1.1, try to guess from device id */
1239 if ((info->device_id & 0x80) != 0) {
1240 geometry_reversed = 1;
1244 /* CFI >= 1.1, deduct from top/bottom flag */
1245 /* note: ext_addr is valid since cfi_version > 0 */
1246 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1247 geometry_reversed = 1;
1252 debug ("manufacturer is %d\n", info->vendor);
1253 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1254 debug ("device id is 0x%x\n", info->device_id);
1255 debug ("device id2 is 0x%x\n", info->device_id2);
1256 debug ("cfi version is 0x%04x\n", info->cfi_version);
1258 size_ratio = info->portwidth / info->chipwidth;
1259 /* if the chip is x8/x16 reduce the ratio by half */
1260 if ((info->interface == FLASH_CFI_X8X16)
1261 && (info->chipwidth == FLASH_CFI_BY8)) {
1264 debug ("size_ratio %d port %d bits chip %d bits\n",
1265 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1266 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1267 debug ("found %d erase regions\n", num_erase_regions);
1270 for (i = 0; i < num_erase_regions; i++) {
1271 if (i > NUM_ERASE_REGIONS) {
1272 printf ("%d erase regions found, only %d used\n",
1273 num_erase_regions, NUM_ERASE_REGIONS);
1276 if (geometry_reversed)
1277 tmp = flash_read_long (info, 0,
1278 FLASH_OFFSET_ERASE_REGIONS +
1279 (num_erase_regions - 1 - i) * 4);
1281 tmp = flash_read_long (info, 0,
1282 FLASH_OFFSET_ERASE_REGIONS +
1285 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1287 erase_region_count = (tmp & 0xffff) + 1;
1288 debug ("erase_region_count = %d erase_region_size = %d\n",
1289 erase_region_count, erase_region_size);
1290 for (j = 0; j < erase_region_count; j++) {
1291 info->start[sect_cnt] = sector;
1292 sector += (erase_region_size * size_ratio);
1295 * Only read protection status from supported devices (intel...)
1297 switch (info->vendor) {
1298 case CFI_CMDSET_INTEL_EXTENDED:
1299 case CFI_CMDSET_INTEL_STANDARD:
1300 info->protect[sect_cnt] =
1301 flash_isset (info, sect_cnt,
1302 FLASH_OFFSET_PROTECT,
1303 FLASH_STATUS_PROTECT);
1306 info->protect[sect_cnt] = 0; /* default: not protected */
1313 info->sector_count = sect_cnt;
1314 /* multiply the size by the number of chips */
1315 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1316 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1317 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1318 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1319 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1320 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1321 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1322 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1323 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1324 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1325 info->flash_id = FLASH_MAN_CFI;
1326 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1327 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1331 flash_write_cmd (info, 0, 0, info->cmd_reset);
1332 return (info->size);
1335 /* loop through the sectors from the highest address
1336 * when the passed address is greater or equal to the sector address
1339 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1341 flash_sect_t sector;
1343 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1344 if (addr >= info->start[sector])
1350 /*-----------------------------------------------------------------------
1352 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1359 ctladdr.cp = flash_make_addr (info, 0, 0);
1360 cptr.cp = (uchar *) dest;
1363 /* Check if Flash is (sufficiently) erased */
1364 switch (info->portwidth) {
1365 case FLASH_CFI_8BIT:
1366 flag = ((cptr.cp[0] & cword.c) == cword.c);
1368 case FLASH_CFI_16BIT:
1369 flag = ((cptr.wp[0] & cword.w) == cword.w);
1371 case FLASH_CFI_32BIT:
1372 flag = ((cptr.lp[0] & cword.l) == cword.l);
1374 case FLASH_CFI_64BIT:
1375 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1383 /* Disable interrupts which might cause a timeout here */
1384 flag = disable_interrupts ();
1386 switch (info->vendor) {
1387 case CFI_CMDSET_INTEL_EXTENDED:
1388 case CFI_CMDSET_INTEL_STANDARD:
1389 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1390 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1392 case CFI_CMDSET_AMD_EXTENDED:
1393 case CFI_CMDSET_AMD_STANDARD:
1394 flash_unlock_seq (info, 0);
1395 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1399 switch (info->portwidth) {
1400 case FLASH_CFI_8BIT:
1401 cptr.cp[0] = cword.c;
1403 case FLASH_CFI_16BIT:
1404 cptr.wp[0] = cword.w;
1406 case FLASH_CFI_32BIT:
1407 cptr.lp[0] = cword.l;
1409 case FLASH_CFI_64BIT:
1410 cptr.llp[0] = cword.ll;
1414 /* re-enable interrupts if necessary */
1416 enable_interrupts ();
1418 return flash_full_status_check (info, find_sector (info, dest),
1419 info->write_tout, "write");
1422 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1424 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1427 flash_sect_t sector;
1430 volatile cfiptr_t src;
1431 volatile cfiptr_t dst;
1433 switch (info->vendor) {
1434 case CFI_CMDSET_INTEL_STANDARD:
1435 case CFI_CMDSET_INTEL_EXTENDED:
1437 dst.cp = (uchar *) dest;
1438 sector = find_sector (info, dest);
1439 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1440 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1441 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1442 "write to buffer")) == ERR_OK) {
1443 /* reduce the number of loops by the width of the port */
1444 switch (info->portwidth) {
1445 case FLASH_CFI_8BIT:
1448 case FLASH_CFI_16BIT:
1451 case FLASH_CFI_32BIT:
1454 case FLASH_CFI_64BIT:
1461 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1463 switch (info->portwidth) {
1464 case FLASH_CFI_8BIT:
1465 *dst.cp++ = *src.cp++;
1467 case FLASH_CFI_16BIT:
1468 *dst.wp++ = *src.wp++;
1470 case FLASH_CFI_32BIT:
1471 *dst.lp++ = *src.lp++;
1473 case FLASH_CFI_64BIT:
1474 *dst.llp++ = *src.llp++;
1481 flash_write_cmd (info, sector, 0,
1482 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1483 retcode = flash_full_status_check (info, sector,
1484 info->buffer_write_tout,
1489 case CFI_CMDSET_AMD_STANDARD:
1490 case CFI_CMDSET_AMD_EXTENDED:
1492 dst.cp = (uchar *) dest;
1493 sector = find_sector (info, dest);
1495 flash_unlock_seq(info,0);
1496 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1498 switch (info->portwidth) {
1499 case FLASH_CFI_8BIT:
1501 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1502 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1504 case FLASH_CFI_16BIT:
1506 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1507 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1509 case FLASH_CFI_32BIT:
1511 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1512 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1514 case FLASH_CFI_64BIT:
1516 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1517 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1523 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1524 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1529 debug ("Unknown Command Set\n");
1533 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1534 #endif /* CFG_FLASH_CFI */