2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
39 #include <asm/byteorder.h>
40 #include <environment.h>
41 #ifdef CFG_FLASH_CFI_DRIVER
43 #if defined(CONFIG_SOLIDCARD3)
44 #define __LITTLE_ENDIAN
48 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
49 * The width of the port and the width of the chips are determined at initialization.
50 * These widths are used to calculate the address for access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
63 #ifndef CFG_FLASH_BANKS_LIST
64 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
67 #define FLASH_CMD_CFI 0x98
68 #define FLASH_CMD_READ_ID 0x90
69 #define FLASH_CMD_RESET 0xff
70 #define FLASH_CMD_BLOCK_ERASE 0x20
71 #define FLASH_CMD_ERASE_CONFIRM 0xD0
72 #define FLASH_CMD_WRITE 0x40
73 #define FLASH_CMD_PROTECT 0x60
74 #define FLASH_CMD_PROTECT_SET 0x01
75 #define FLASH_CMD_PROTECT_CLEAR 0xD0
76 #define FLASH_CMD_CLEAR_STATUS 0x50
77 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
78 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
80 #define FLASH_STATUS_DONE 0x80
81 #define FLASH_STATUS_ESS 0x40
82 #define FLASH_STATUS_ECLBS 0x20
83 #define FLASH_STATUS_PSLBS 0x10
84 #define FLASH_STATUS_VPENS 0x08
85 #define FLASH_STATUS_PSS 0x04
86 #define FLASH_STATUS_DPS 0x02
87 #define FLASH_STATUS_R 0x01
88 #define FLASH_STATUS_PROTECT 0x01
90 #define AMD_CMD_RESET 0xF0
91 #define AMD_CMD_WRITE 0xA0
92 #define AMD_CMD_ERASE_START 0x80
93 #define AMD_CMD_ERASE_SECTOR 0x30
94 #define AMD_CMD_UNLOCK_START 0xAA
95 #define AMD_CMD_UNLOCK_ACK 0x55
96 #define AMD_CMD_WRITE_TO_BUFFER 0x25
97 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
99 #define AMD_STATUS_TOGGLE 0x40
100 #define AMD_STATUS_ERROR 0x20
102 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
103 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
104 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
106 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
107 #define FLASH_OFFSET_DEVICE_ID 0x01
108 #define FLASH_OFFSET_DEVICE_ID2 0x0E
109 #define FLASH_OFFSET_DEVICE_ID3 0x0F
110 #define FLASH_OFFSET_CFI 0x55
111 #define FLASH_OFFSET_CFI_ALT 0x555
112 #define FLASH_OFFSET_CFI_RESP 0x10
113 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
114 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
115 #define FLASH_OFFSET_WTOUT 0x1F
116 #define FLASH_OFFSET_WBTOUT 0x20
117 #define FLASH_OFFSET_ETOUT 0x21
118 #define FLASH_OFFSET_CETOUT 0x22
119 #define FLASH_OFFSET_WMAX_TOUT 0x23
120 #define FLASH_OFFSET_WBMAX_TOUT 0x24
121 #define FLASH_OFFSET_EMAX_TOUT 0x25
122 #define FLASH_OFFSET_CEMAX_TOUT 0x26
123 #define FLASH_OFFSET_SIZE 0x27
124 #define FLASH_OFFSET_INTERFACE 0x28
125 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
126 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
127 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
128 #define FLASH_OFFSET_PROTECT 0x02
129 #define FLASH_OFFSET_USER_PROTECTION 0x85
130 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
132 #define CFI_CMDSET_NONE 0
133 #define CFI_CMDSET_INTEL_EXTENDED 1
134 #define CFI_CMDSET_AMD_STANDARD 2
135 #define CFI_CMDSET_INTEL_STANDARD 3
136 #define CFI_CMDSET_AMD_EXTENDED 4
137 #define CFI_CMDSET_MITSU_STANDARD 256
138 #define CFI_CMDSET_MITSU_EXTENDED 257
139 #define CFI_CMDSET_SST 258
141 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
142 # undef FLASH_CMD_RESET
143 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
150 unsigned long long ll;
154 volatile unsigned char *cp;
155 volatile unsigned short *wp;
156 volatile unsigned long *lp;
157 volatile unsigned long long *llp;
160 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
162 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
164 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
165 #ifdef CFG_MAX_FLASH_BANKS_DETECT
166 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
167 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
169 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
170 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
174 * Check if chip width is defined. If not, start detecting with 8bit.
176 #ifndef CFG_FLASH_CFI_WIDTH
177 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
181 /*-----------------------------------------------------------------------
185 typedef unsigned long flash_sect_t;
187 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
188 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
189 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
191 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
192 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
193 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
194 static void flash_read_jedec_ids (flash_info_t * info);
195 static int flash_detect_cfi (flash_info_t * info);
196 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
197 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
198 ulong tout, char *prompt);
199 ulong flash_get_size (ulong base, int banknum);
200 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
201 static flash_info_t *flash_get_info(ulong base);
203 #ifdef CFG_FLASH_USE_BUFFER_WRITE
204 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
207 /*-----------------------------------------------------------------------
208 * create an address based on the offset and the port width
210 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
212 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
216 /*-----------------------------------------------------------------------
219 void print_longlong (char *str, unsigned long long data)
224 cp = (unsigned char *) &data;
225 for (i = 0; i < 8; i++)
226 sprintf (&str[i * 2], "%2.2x", *cp++);
228 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
233 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
235 flash_make_addr (info, sect,
236 x + FLASH_OFFSET_CFI_RESP);
237 debug ("%p : ", cptr.cp);
238 for (y = 0; y < 16; y++) {
239 debug ("%2.2x ", cptr.cp[y]);
242 for (y = 0; y < 16; y++) {
243 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
244 debug ("%c", cptr.cp[y]);
255 /*-----------------------------------------------------------------------
256 * read a character at a port width address
258 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
262 cp = flash_make_addr (info, 0, offset);
263 #if defined(__LITTLE_ENDIAN)
266 return (cp[info->portwidth - 1]);
270 /*-----------------------------------------------------------------------
271 * read a short word by swapping for ppc format.
273 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
281 addr = flash_make_addr (info, sect, offset);
284 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
286 for (x = 0; x < 2 * info->portwidth; x++) {
287 debug ("addr[%x] = 0x%x\n", x, addr[x]);
290 #if defined(__LITTLE_ENDIAN)
291 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
293 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
294 addr[info->portwidth - 1]);
297 debug ("retval = 0x%x\n", retval);
301 /*-----------------------------------------------------------------------
302 * read a long word by picking the least significant byte of each maximum
303 * port size word. Swap for ppc format.
305 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
313 addr = flash_make_addr (info, sect, offset);
316 debug ("long addr is at %p info->portwidth = %d\n", addr,
318 for (x = 0; x < 4 * info->portwidth; x++) {
319 debug ("addr[%x] = 0x%x\n", x, addr[x]);
322 #if defined(__LITTLE_ENDIAN)
323 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
324 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
326 retval = (addr[(2 * info->portwidth) - 1] << 24) |
327 (addr[(info->portwidth) - 1] << 16) |
328 (addr[(4 * info->portwidth) - 1] << 8) |
329 addr[(3 * info->portwidth) - 1];
335 /*-----------------------------------------------------------------------
337 unsigned long flash_init (void)
339 unsigned long size = 0;
342 #ifdef CFG_FLASH_PROTECTION
343 char *s = getenv("unlock");
346 /* Init: no FLASHes known */
347 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
348 flash_info[i].flash_id = FLASH_UNKNOWN;
349 size += flash_info[i].size = flash_get_size (bank_base[i], i);
350 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
351 #ifndef CFG_FLASH_QUIET_TEST
352 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
353 i+1, flash_info[i].size, flash_info[i].size << 20);
354 #endif /* CFG_FLASH_QUIET_TEST */
356 #ifdef CFG_FLASH_PROTECTION
357 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
359 * Only the U-Boot image and it's environment is protected,
360 * all other sectors are unprotected (unlocked) if flash
361 * hardware protection is used (CFG_FLASH_PROTECTION) and
362 * the environment variable "unlock" is set to "yes".
364 if (flash_info[i].legacy_unlock) {
368 * Disable legacy_unlock temporarily, since
369 * flash_real_protect would relock all other sectors
372 flash_info[i].legacy_unlock = 0;
375 * Legacy unlocking (e.g. Intel J3) -> unlock only one
376 * sector. This will unlock all sectors.
378 flash_real_protect (&flash_info[i], 0, 0);
380 flash_info[i].legacy_unlock = 1;
383 * Manually mark other sectors as unlocked (unprotected)
385 for (k = 1; k < flash_info[i].sector_count; k++)
386 flash_info[i].protect[k] = 0;
389 * No legancy unlocking -> unlock all sectors
391 flash_protect (FLAG_PROTECT_CLEAR,
392 flash_info[i].start[0],
393 flash_info[i].start[0] + flash_info[i].size - 1,
397 #endif /* CFG_FLASH_PROTECTION */
400 /* Monitor protection ON by default */
401 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
402 flash_protect (FLAG_PROTECT_SET,
404 CFG_MONITOR_BASE + monitor_flash_len - 1,
405 flash_get_info(CFG_MONITOR_BASE));
408 /* Environment protection ON by default */
409 #ifdef CFG_ENV_IS_IN_FLASH
410 flash_protect (FLAG_PROTECT_SET,
412 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
413 flash_get_info(CFG_ENV_ADDR));
416 /* Redundant environment protection ON by default */
417 #ifdef CFG_ENV_ADDR_REDUND
418 flash_protect (FLAG_PROTECT_SET,
420 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
421 flash_get_info(CFG_ENV_ADDR_REDUND));
426 /*-----------------------------------------------------------------------
428 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
429 static flash_info_t *flash_get_info(ulong base)
432 flash_info_t * info = 0;
434 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
435 info = & flash_info[i];
436 if (info->size && info->start[0] <= base &&
437 base <= info->start[0] + info->size - 1)
441 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
445 /*-----------------------------------------------------------------------
447 int flash_erase (flash_info_t * info, int s_first, int s_last)
453 if (info->flash_id != FLASH_MAN_CFI) {
454 puts ("Can't erase unknown flash type - aborted\n");
457 if ((s_first < 0) || (s_first > s_last)) {
458 puts ("- no sectors to erase\n");
463 for (sect = s_first; sect <= s_last; ++sect) {
464 if (info->protect[sect]) {
469 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
475 for (sect = s_first; sect <= s_last; sect++) {
476 if (info->protect[sect] == 0) { /* not protected */
477 switch (info->vendor) {
478 case CFI_CMDSET_INTEL_STANDARD:
479 case CFI_CMDSET_INTEL_EXTENDED:
480 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
481 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
482 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
484 case CFI_CMDSET_AMD_STANDARD:
485 case CFI_CMDSET_AMD_EXTENDED:
486 flash_unlock_seq (info, sect);
487 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
488 AMD_CMD_ERASE_START);
489 flash_unlock_seq (info, sect);
490 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
493 debug ("Unkown flash vendor %d\n",
498 if (flash_full_status_check
499 (info, sect, info->erase_blk_tout, "erase")) {
509 /*-----------------------------------------------------------------------
511 void flash_print_info (flash_info_t * info)
515 if (info->flash_id != FLASH_MAN_CFI) {
516 puts ("missing or unknown FLASH type\n");
520 printf ("CFI conformant FLASH (%d x %d)",
521 (info->portwidth << 3), (info->chipwidth << 3));
522 printf (" Size: %ld MB in %d Sectors\n",
523 info->size >> 20, info->sector_count);
525 switch (info->vendor) {
526 case CFI_CMDSET_INTEL_STANDARD:
527 printf ("Intel Standard");
529 case CFI_CMDSET_INTEL_EXTENDED:
530 printf ("Intel Extended");
532 case CFI_CMDSET_AMD_STANDARD:
533 printf ("AMD Standard");
535 case CFI_CMDSET_AMD_EXTENDED:
536 printf ("AMD Extended");
539 printf ("Unknown (%d)", info->vendor);
542 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
543 info->manufacturer_id, info->device_id);
544 if (info->device_id == 0x7E) {
545 printf("%04X", info->device_id2);
547 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
548 info->erase_blk_tout,
550 if (info->buffer_size > 1) {
551 printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n",
552 info->buffer_write_tout,
556 puts ("\n Sector Start Addresses:");
557 for (i = 0; i < info->sector_count; ++i) {
560 #ifdef CFG_FLASH_EMPTY_INFO
564 volatile unsigned long *flash;
567 * Check if whole sector is erased
569 if (i != (info->sector_count - 1))
570 size = info->start[i + 1] - info->start[i];
572 size = info->start[0] + info->size - info->start[i];
574 flash = (volatile unsigned long *) info->start[i];
575 size = size >> 2; /* divide by 4 for longword access */
576 for (k = 0; k < size; k++) {
577 if (*flash++ != 0xffffffff) {
583 /* print empty and read-only info */
584 printf (" %08lX %c %s ",
587 info->protect[i] ? "RO" : " ");
588 #else /* ! CFG_FLASH_EMPTY_INFO */
589 printf (" %08lX %s ",
591 info->protect[i] ? "RO" : " ");
598 /*-----------------------------------------------------------------------
599 * Copy memory to flash, returns:
602 * 2 - Flash not erased
604 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
612 #ifdef CFG_FLASH_USE_BUFFER_WRITE
615 /* get lower aligned address */
616 /* get lower aligned address */
617 wp = (addr & ~(info->portwidth - 1));
619 /* handle unaligned start */
620 if ((aln = addr - wp) != 0) {
623 for (i = 0; i < aln; ++i, ++cp)
624 flash_add_byte (info, &cword, (*(uchar *) cp));
626 for (; (i < info->portwidth) && (cnt > 0); i++) {
627 flash_add_byte (info, &cword, *src++);
631 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
632 flash_add_byte (info, &cword, (*(uchar *) cp));
633 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
638 /* handle the aligned part */
639 #ifdef CFG_FLASH_USE_BUFFER_WRITE
640 buffered_size = (info->portwidth / info->chipwidth);
641 buffered_size *= info->buffer_size;
642 while (cnt >= info->portwidth) {
643 /* prohibit buffer write when buffer_size is 1 */
644 if (info->buffer_size == 1) {
646 for (i = 0; i < info->portwidth; i++)
647 flash_add_byte (info, &cword, *src++);
648 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
650 wp += info->portwidth;
651 cnt -= info->portwidth;
655 /* write buffer until next buffered_size aligned boundary */
656 i = buffered_size - (wp % buffered_size);
659 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
661 i -= i & (info->portwidth - 1);
667 while (cnt >= info->portwidth) {
669 for (i = 0; i < info->portwidth; i++) {
670 flash_add_byte (info, &cword, *src++);
672 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
674 wp += info->portwidth;
675 cnt -= info->portwidth;
677 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
683 * handle unaligned tail bytes
686 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
687 flash_add_byte (info, &cword, *src++);
690 for (; i < info->portwidth; ++i, ++cp) {
691 flash_add_byte (info, &cword, (*(uchar *) cp));
694 return flash_write_cfiword (info, wp, cword);
697 /*-----------------------------------------------------------------------
699 #ifdef CFG_FLASH_PROTECTION
701 int flash_real_protect (flash_info_t * info, long sector, int prot)
705 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
706 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
708 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
710 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
713 flash_full_status_check (info, sector, info->erase_blk_tout,
714 prot ? "protect" : "unprotect")) == 0) {
716 info->protect[sector] = prot;
719 * On some of Intel's flash chips (marked via legacy_unlock)
720 * unprotect unprotects all locking.
722 if ((prot == 0) && (info->legacy_unlock)) {
725 for (i = 0; i < info->sector_count; i++) {
726 if (info->protect[i])
727 flash_real_protect (info, i, 1);
734 /*-----------------------------------------------------------------------
735 * flash_read_user_serial - read the OneTimeProgramming cells
737 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
744 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
745 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
746 memcpy (dst, src + offset, len);
747 flash_write_cmd (info, 0, 0, info->cmd_reset);
751 * flash_read_factory_serial - read the device Id from the protection area
753 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
758 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
759 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
760 memcpy (buffer, src + offset, len);
761 flash_write_cmd (info, 0, 0, info->cmd_reset);
764 #endif /* CFG_FLASH_PROTECTION */
767 * flash_is_busy - check to see if the flash is busy
768 * This routine checks the status of the chip and returns true if the chip is busy
770 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
774 switch (info->vendor) {
775 case CFI_CMDSET_INTEL_STANDARD:
776 case CFI_CMDSET_INTEL_EXTENDED:
777 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
779 case CFI_CMDSET_AMD_STANDARD:
780 case CFI_CMDSET_AMD_EXTENDED:
781 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
786 debug ("flash_is_busy: %d\n", retval);
790 /*-----------------------------------------------------------------------
791 * wait for XSR.7 to be set. Time out with an error if it does not.
792 * This routine does not set the flash to read-array mode.
794 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
795 ulong tout, char *prompt)
803 /* Wait for command completion */
804 start = get_timer (0);
805 while (flash_is_busy (info, sector)) {
806 if (get_timer (start) > tout) {
807 printf ("Flash %s timeout at address %lx data %lx\n",
808 prompt, info->start[sector],
809 flash_read_long (info, sector, 0));
810 flash_write_cmd (info, sector, 0, info->cmd_reset);
813 udelay (1); /* also triggers watchdog */
818 /*-----------------------------------------------------------------------
819 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
820 * This routine sets the flash to read-array mode.
822 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
823 ulong tout, char *prompt)
827 retcode = flash_status_check (info, sector, tout, prompt);
828 switch (info->vendor) {
829 case CFI_CMDSET_INTEL_EXTENDED:
830 case CFI_CMDSET_INTEL_STANDARD:
831 if ((retcode == ERR_OK)
832 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
834 printf ("Flash %s error at address %lx\n", prompt,
835 info->start[sector]);
836 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
837 puts ("Command Sequence Error.\n");
838 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
839 puts ("Block Erase Error.\n");
840 retcode = ERR_NOT_ERASED;
841 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
842 puts ("Locking Error\n");
844 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
845 puts ("Block locked.\n");
846 retcode = ERR_PROTECTED;
848 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
849 puts ("Vpp Low Error.\n");
851 flash_write_cmd (info, sector, 0, info->cmd_reset);
859 /*-----------------------------------------------------------------------
861 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
863 #if defined(__LITTLE_ENDIAN)
866 unsigned long long ll;
869 switch (info->portwidth) {
873 case FLASH_CFI_16BIT:
874 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
877 cword->w = (cword->w >> 8) | w;
879 cword->w = (cword->w << 8) | c;
882 case FLASH_CFI_32BIT:
883 #if defined(__LITTLE_ENDIAN)
886 cword->l = (cword->l >> 8) | l;
888 cword->l = (cword->l << 8) | c;
891 case FLASH_CFI_64BIT:
892 #if defined(__LITTLE_ENDIAN)
895 cword->ll = (cword->ll >> 8) | ll;
897 cword->ll = (cword->ll << 8) | c;
904 /*-----------------------------------------------------------------------
905 * make a proper sized command based on the port and chip widths
907 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
910 uchar *cp = (uchar *) cmdbuf;
912 #if defined(__LITTLE_ENDIAN)
913 for (i = info->portwidth; i > 0; i--)
915 for (i = 1; i <= info->portwidth; i++)
917 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
921 * Write a proper sized command to the correct address
923 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
926 volatile cfiptr_t addr;
929 addr.cp = flash_make_addr (info, sect, offset);
930 flash_make_cmd (info, cmd, &cword);
931 switch (info->portwidth) {
933 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
934 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
936 #ifdef CONFIG_BLACKFIN
940 case FLASH_CFI_16BIT:
941 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
943 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
945 #ifdef CONFIG_BLACKFIN
949 case FLASH_CFI_32BIT:
950 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
952 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
954 #ifdef CONFIG_BLACKFIN
958 case FLASH_CFI_64BIT:
963 print_longlong (str, cword.ll);
965 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
967 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
970 *addr.llp = cword.ll;
971 #ifdef CONFIG_BLACKFIN
978 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
980 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
981 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
984 /*-----------------------------------------------------------------------
986 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
992 cptr.cp = flash_make_addr (info, sect, offset);
993 flash_make_cmd (info, cmd, &cword);
995 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
996 switch (info->portwidth) {
998 debug ("is= %x %x\n", cptr.cp[0], cword.c);
999 retval = (cptr.cp[0] == cword.c);
1001 case FLASH_CFI_16BIT:
1002 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1003 retval = (cptr.wp[0] == cword.w);
1005 case FLASH_CFI_32BIT:
1006 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1007 retval = (cptr.lp[0] == cword.l);
1009 case FLASH_CFI_64BIT:
1015 print_longlong (str1, cptr.llp[0]);
1016 print_longlong (str2, cword.ll);
1017 debug ("is= %s %s\n", str1, str2);
1020 retval = (cptr.llp[0] == cword.ll);
1029 /*-----------------------------------------------------------------------
1031 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1037 cptr.cp = flash_make_addr (info, sect, offset);
1038 flash_make_cmd (info, cmd, &cword);
1039 switch (info->portwidth) {
1040 case FLASH_CFI_8BIT:
1041 retval = ((cptr.cp[0] & cword.c) == cword.c);
1043 case FLASH_CFI_16BIT:
1044 retval = ((cptr.wp[0] & cword.w) == cword.w);
1046 case FLASH_CFI_32BIT:
1047 retval = ((cptr.lp[0] & cword.l) == cword.l);
1049 case FLASH_CFI_64BIT:
1050 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1059 /*-----------------------------------------------------------------------
1061 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1067 cptr.cp = flash_make_addr (info, sect, offset);
1068 flash_make_cmd (info, cmd, &cword);
1069 switch (info->portwidth) {
1070 case FLASH_CFI_8BIT:
1071 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1073 case FLASH_CFI_16BIT:
1074 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1076 case FLASH_CFI_32BIT:
1077 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1079 case FLASH_CFI_64BIT:
1080 retval = ((cptr.llp[0] & cword.ll) !=
1081 (cptr.llp[0] & cword.ll));
1090 /*-----------------------------------------------------------------------
1091 * read jedec ids from device and set corresponding fields in info struct
1093 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1096 static void flash_read_jedec_ids (flash_info_t * info)
1098 info->manufacturer_id = 0;
1099 info->device_id = 0;
1100 info->device_id2 = 0;
1102 switch (info->vendor) {
1103 case CFI_CMDSET_INTEL_STANDARD:
1104 case CFI_CMDSET_INTEL_EXTENDED:
1105 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1106 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1107 udelay(1000); /* some flash are slow to respond */
1108 info->manufacturer_id = flash_read_uchar (info,
1109 FLASH_OFFSET_MANUFACTURER_ID);
1110 info->device_id = flash_read_uchar (info,
1111 FLASH_OFFSET_DEVICE_ID);
1112 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1114 case CFI_CMDSET_AMD_STANDARD:
1115 case CFI_CMDSET_AMD_EXTENDED:
1116 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1117 flash_unlock_seq(info, 0);
1118 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1119 udelay(1000); /* some flash are slow to respond */
1120 info->manufacturer_id = flash_read_uchar (info,
1121 FLASH_OFFSET_MANUFACTURER_ID);
1122 info->device_id = flash_read_uchar (info,
1123 FLASH_OFFSET_DEVICE_ID);
1124 if (info->device_id == 0x7E) {
1125 /* AMD 3-byte (expanded) device ids */
1126 info->device_id2 = flash_read_uchar (info,
1127 FLASH_OFFSET_DEVICE_ID2);
1128 info->device_id2 <<= 8;
1129 info->device_id2 |= flash_read_uchar (info,
1130 FLASH_OFFSET_DEVICE_ID3);
1132 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1139 /*-----------------------------------------------------------------------
1140 * detect if flash is compatible with the Common Flash Interface (CFI)
1141 * http://www.jedec.org/download/search/jesd68.pdf
1144 static int flash_detect_cfi (flash_info_t * info)
1147 debug ("flash detect cfi\n");
1149 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1150 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1151 for (info->chipwidth = FLASH_CFI_BY8;
1152 info->chipwidth <= info->portwidth;
1153 info->chipwidth <<= 1) {
1154 flash_write_cmd (info, 0, 0, info->cmd_reset);
1155 for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1156 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1157 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1158 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1159 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1160 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1161 info->cfi_offset=flash_offset_cfi[cfi_offset];
1162 debug ("device interface is %d\n",
1164 debug ("found port %d chip %d ",
1165 info->portwidth, info->chipwidth);
1166 debug ("port %d bits chip %d bits\n",
1167 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1168 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1174 debug ("not found\n");
1179 * The following code cannot be run from FLASH!
1182 ulong flash_get_size (ulong base, int banknum)
1184 flash_info_t *info = &flash_info[banknum];
1186 flash_sect_t sect_cnt;
1187 unsigned long sector;
1190 uchar num_erase_regions;
1191 int erase_region_size;
1192 int erase_region_count;
1193 int geometry_reversed = 0;
1196 info->cfi_version = 0;
1197 #ifdef CFG_FLASH_PROTECTION
1198 info->legacy_unlock = 0;
1201 info->start[0] = base;
1203 if (flash_detect_cfi (info)) {
1204 info->vendor = flash_read_ushort (info, 0,
1205 FLASH_OFFSET_PRIMARY_VENDOR);
1206 flash_read_jedec_ids (info);
1207 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1208 num_erase_regions = flash_read_uchar (info,
1209 FLASH_OFFSET_NUM_ERASE_REGIONS);
1210 info->ext_addr = flash_read_ushort (info, 0,
1211 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1212 if (info->ext_addr) {
1213 info->cfi_version = (ushort) flash_read_uchar (info,
1214 info->ext_addr + 3) << 8;
1215 info->cfi_version |= (ushort) flash_read_uchar (info,
1216 info->ext_addr + 4);
1219 flash_printqry (info, 0);
1221 switch (info->vendor) {
1222 case CFI_CMDSET_INTEL_STANDARD:
1223 case CFI_CMDSET_INTEL_EXTENDED:
1225 info->cmd_reset = FLASH_CMD_RESET;
1226 #ifdef CFG_FLASH_PROTECTION
1227 /* read legacy lock/unlock bit from intel flash */
1228 if (info->ext_addr) {
1229 info->legacy_unlock = flash_read_uchar (info,
1230 info->ext_addr + 5) & 0x08;
1234 case CFI_CMDSET_AMD_STANDARD:
1235 case CFI_CMDSET_AMD_EXTENDED:
1236 info->cmd_reset = AMD_CMD_RESET;
1237 /* check if flash geometry needs reversal */
1238 if (num_erase_regions <= 1)
1240 /* reverse geometry if top boot part */
1241 if (info->cfi_version < 0x3131) {
1242 /* CFI < 1.1, try to guess from device id */
1243 if ((info->device_id & 0x80) != 0) {
1244 geometry_reversed = 1;
1248 /* CFI >= 1.1, deduct from top/bottom flag */
1249 /* note: ext_addr is valid since cfi_version > 0 */
1250 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1251 geometry_reversed = 1;
1256 debug ("manufacturer is %d\n", info->vendor);
1257 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1258 debug ("device id is 0x%x\n", info->device_id);
1259 debug ("device id2 is 0x%x\n", info->device_id2);
1260 debug ("cfi version is 0x%04x\n", info->cfi_version);
1262 size_ratio = info->portwidth / info->chipwidth;
1263 /* if the chip is x8/x16 reduce the ratio by half */
1264 if ((info->interface == FLASH_CFI_X8X16)
1265 && (info->chipwidth == FLASH_CFI_BY8)) {
1268 debug ("size_ratio %d port %d bits chip %d bits\n",
1269 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1270 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1271 debug ("found %d erase regions\n", num_erase_regions);
1274 for (i = 0; i < num_erase_regions; i++) {
1275 if (i > NUM_ERASE_REGIONS) {
1276 printf ("%d erase regions found, only %d used\n",
1277 num_erase_regions, NUM_ERASE_REGIONS);
1280 if (geometry_reversed)
1281 tmp = flash_read_long (info, 0,
1282 FLASH_OFFSET_ERASE_REGIONS +
1283 (num_erase_regions - 1 - i) * 4);
1285 tmp = flash_read_long (info, 0,
1286 FLASH_OFFSET_ERASE_REGIONS +
1289 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1291 erase_region_count = (tmp & 0xffff) + 1;
1292 debug ("erase_region_count = %d erase_region_size = %d\n",
1293 erase_region_count, erase_region_size);
1294 for (j = 0; j < erase_region_count; j++) {
1295 info->start[sect_cnt] = sector;
1296 sector += (erase_region_size * size_ratio);
1299 * Only read protection status from supported devices (intel...)
1301 switch (info->vendor) {
1302 case CFI_CMDSET_INTEL_EXTENDED:
1303 case CFI_CMDSET_INTEL_STANDARD:
1304 info->protect[sect_cnt] =
1305 flash_isset (info, sect_cnt,
1306 FLASH_OFFSET_PROTECT,
1307 FLASH_STATUS_PROTECT);
1310 info->protect[sect_cnt] = 0; /* default: not protected */
1317 info->sector_count = sect_cnt;
1318 /* multiply the size by the number of chips */
1319 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1320 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1321 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1322 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1323 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1324 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1325 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1326 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1327 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1328 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1329 info->flash_id = FLASH_MAN_CFI;
1330 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1331 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1335 flash_write_cmd (info, 0, 0, info->cmd_reset);
1336 return (info->size);
1339 /* loop through the sectors from the highest address
1340 * when the passed address is greater or equal to the sector address
1343 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1345 flash_sect_t sector;
1347 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1348 if (addr >= info->start[sector])
1354 /*-----------------------------------------------------------------------
1356 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1363 ctladdr.cp = flash_make_addr (info, 0, 0);
1364 cptr.cp = (uchar *) dest;
1366 /* Check if Flash is (sufficiently) erased */
1367 switch (info->portwidth) {
1368 case FLASH_CFI_8BIT:
1369 flag = ((cptr.cp[0] & cword.c) == cword.c);
1371 case FLASH_CFI_16BIT:
1372 flag = ((cptr.wp[0] & cword.w) == cword.w);
1374 case FLASH_CFI_32BIT:
1375 flag = ((cptr.lp[0] & cword.l) == cword.l);
1377 case FLASH_CFI_64BIT:
1378 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1386 /* Disable interrupts which might cause a timeout here */
1387 flag = disable_interrupts ();
1389 switch (info->vendor) {
1390 case CFI_CMDSET_INTEL_EXTENDED:
1391 case CFI_CMDSET_INTEL_STANDARD:
1392 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1393 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1395 case CFI_CMDSET_AMD_EXTENDED:
1396 case CFI_CMDSET_AMD_STANDARD:
1397 flash_unlock_seq (info, 0);
1398 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1402 switch (info->portwidth) {
1403 case FLASH_CFI_8BIT:
1404 cptr.cp[0] = cword.c;
1406 case FLASH_CFI_16BIT:
1407 cptr.wp[0] = cword.w;
1409 case FLASH_CFI_32BIT:
1410 cptr.lp[0] = cword.l;
1412 case FLASH_CFI_64BIT:
1413 cptr.llp[0] = cword.ll;
1417 /* re-enable interrupts if necessary */
1419 enable_interrupts ();
1421 return flash_full_status_check (info, find_sector (info, dest),
1422 info->write_tout, "write");
1425 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1427 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1430 flash_sect_t sector;
1433 volatile cfiptr_t src;
1434 volatile cfiptr_t dst;
1436 switch (info->vendor) {
1437 case CFI_CMDSET_INTEL_STANDARD:
1438 case CFI_CMDSET_INTEL_EXTENDED:
1440 dst.cp = (uchar *) dest;
1441 sector = find_sector (info, dest);
1442 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1443 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1444 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1445 "write to buffer")) == ERR_OK) {
1446 /* reduce the number of loops by the width of the port */
1447 switch (info->portwidth) {
1448 case FLASH_CFI_8BIT:
1451 case FLASH_CFI_16BIT:
1454 case FLASH_CFI_32BIT:
1457 case FLASH_CFI_64BIT:
1464 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1466 switch (info->portwidth) {
1467 case FLASH_CFI_8BIT:
1468 *dst.cp++ = *src.cp++;
1470 case FLASH_CFI_16BIT:
1471 *dst.wp++ = *src.wp++;
1473 case FLASH_CFI_32BIT:
1474 *dst.lp++ = *src.lp++;
1476 case FLASH_CFI_64BIT:
1477 *dst.llp++ = *src.llp++;
1484 flash_write_cmd (info, sector, 0,
1485 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1486 retcode = flash_full_status_check (info, sector,
1487 info->buffer_write_tout,
1492 case CFI_CMDSET_AMD_STANDARD:
1493 case CFI_CMDSET_AMD_EXTENDED:
1495 dst.cp = (uchar *) dest;
1496 sector = find_sector (info, dest);
1498 flash_unlock_seq(info,0);
1499 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1501 switch (info->portwidth) {
1502 case FLASH_CFI_8BIT:
1504 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1505 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1507 case FLASH_CFI_16BIT:
1509 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1510 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1512 case FLASH_CFI_32BIT:
1514 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1515 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1517 case FLASH_CFI_64BIT:
1519 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1520 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1526 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1527 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1532 debug ("Unknown Command Set\n");
1536 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1538 #if defined(CONFIG_SOLIDCARD3)
1539 #undef __LITTLE_ENDIAN
1542 #endif /* CFG_FLASH_CFI */